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git01.mediatek.com / filogic / uboot / 7f1843228b92ea6a1149c1dc907df49b2e0b423e / . / include / configs / ls1028a_common.h
blob: 24422665e8763026c3809a2387207baee076c1b9 [file] [log] [blame]
Yuantian Tang92f18ff2019-04-10 16:43:34 +0800[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
Yangbo Lubb32e682021-06-03 10:51:19 +0800[diff] [blame]3 * Copyright 2019-2021 NXP
Yuantian Tang92f18ff2019-04-10 16:43:34 +0800[diff] [blame]4 */
5
6#ifndef __L1028A_COMMON_H
7#define __L1028A_COMMON_H
8
Yuantian Tang92f18ff2019-04-10 16:43:34 +0800[diff] [blame]9#include <asm/arch/stream_id_lsch3.h>
10#include <asm/arch/config.h>
11#include <asm/arch/soc.h>
12
13/* Link Definitions */
Yuantian Tang92f18ff2019-04-10 16:43:34 +0800[diff] [blame]14
Yuantian Tang92f18ff2019-04-10 16:43:34 +0800[diff] [blame]15#define CONFIG_VERY_BIG_RAM
16#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL
17#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
18#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
19#define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL
Yuantian Tang92f18ff2019-04-10 16:43:34 +0800[diff] [blame]20
Yuantian Tang92f18ff2019-04-10 16:43:34 +0800[diff] [blame]21/*
22 * SMP Definitinos
23 */
Michael Wallef056e0f2020-06-01 21:53:26 +0200[diff] [blame]24#define CPU_RELEASE_ADDR secondary_boot_addr
Yuantian Tang92f18ff2019-04-10 16:43:34 +0800[diff] [blame]25
Biwen Lie7c3b042021-02-05 19:01:57 +0800[diff] [blame]26/* GPIO */
Biwen Lie7c3b042021-02-05 19:01:57 +0800[diff] [blame]27
Yuantian Tang92f18ff2019-04-10 16:43:34 +0800[diff] [blame]28/* I2C */
Yuantian Tang92f18ff2019-04-10 16:43:34 +0800[diff] [blame]29
30/* Serial Port */
Yuantian Tang92f18ff2019-04-10 16:43:34 +0800[diff] [blame]31#define CONFIG_SYS_NS16550_SERIAL
32#define CONFIG_SYS_NS16550_REG_SIZE 1
33#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2)
34
Yuantian Tang92f18ff2019-04-10 16:43:34 +0800[diff] [blame]35/* Miscellaneous configurable options */
Yuantian Tang92f18ff2019-04-10 16:43:34 +0800[diff] [blame]36
37/* Physical Memory Map */
Yuantian Tang92f18ff2019-04-10 16:43:34 +0800[diff] [blame]38
39#define CONFIG_HWCONFIG
40#define HWCONFIG_BUFFER_SIZE 128
41
Yuantian Tang92f18ff2019-04-10 16:43:34 +0800[diff] [blame]42#define BOOT_TARGET_DEVICES(func) \
43 func(MMC, mmc, 0) \
Yuantian Tang7f3da7b2019-11-04 15:10:45 +0800[diff] [blame]44 func(MMC, mmc, 1) \
Yuantian Tang7a224e72020-03-10 11:31:05 +0800[diff] [blame]45 func(USB, usb, 0) \
46 func(DHCP, dhcp, na)
Yuantian Tang92f18ff2019-04-10 16:43:34 +0800[diff] [blame]47#include <config_distro_bootcmd.h>
48
Yuantian Tang7f3da7b2019-11-04 15:10:45 +0800[diff] [blame]49#define XSPI_NOR_BOOTCOMMAND \
50 "run xspi_hdploadcmd; run distro_bootcmd; run xspi_bootcmd; " \
51 "env exists secureboot && esbc_halt;;"
Yuantian Tang92f18ff2019-04-10 16:43:34 +0800[diff] [blame]52#define SD_BOOTCOMMAND \
Yuantian Tang7f3da7b2019-11-04 15:10:45 +0800[diff] [blame]53 "run sd_hdploadcmd; run distro_bootcmd;run sd_bootcmd; " \
54 "env exists secureboot && esbc_halt;"
55#define SD2_BOOTCOMMAND \
56 "run emmc_hdploadcmd; run distro_bootcmd;run emmc_bootcmd; " \
Yuantian Tang92f18ff2019-04-10 16:43:34 +0800[diff] [blame]57 "env exists secureboot && esbc_halt;"
58
Yuantian Tang92f18ff2019-04-10 16:43:34 +0800[diff] [blame]59#define OCRAM_NONSECURE_SIZE 0x00010000
Yuantian Tang92f18ff2019-04-10 16:43:34 +0800[diff] [blame]60#define CONFIG_SYS_FSL_QSPI_BASE 0x20000000
Yuantian Tang92f18ff2019-04-10 16:43:34 +0800[diff] [blame]61
Yuantian Tang92f18ff2019-04-10 16:43:34 +0800[diff] [blame]62/* I2C bus multiplexer */
63#define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/
64#define I2C_MUX_CH_DEFAULT 0x8
65
Wen He41e63db2019-11-18 13:26:09 +0800[diff] [blame]66/* DisplayPort */
67#define DP_PWD_EN_DEFAULT_MASK 0x8
68
Udit Agarwal22ec2382019-11-07 16:11:32 +0000[diff] [blame]69#ifdef CONFIG_NXP_ESBC
Yuantian Tang029d8ab2019-05-24 14:36:27 +0800[diff] [blame]70#include <asm/fsl_secure_boot.h>
71#endif
72
Yuantian Tang92f18ff2019-04-10 16:43:34 +0800[diff] [blame]73#endif /* __L1028A_COMMON_H */