blob: d3ed10335dfdff41ff4793cf4e5760a82609b235 [file] [log] [blame]
Patrick Delaunay48c5e902020-03-06 17:54:41 +01001// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/*
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
4 * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
5 */
6#include <dt-bindings/pinctrl/stm32-pinfunc.h>
7
8&pinctrl {
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +02009 adc1_in6_pins_a: adc1-in6-0 {
Patrick Delaunay48c5e902020-03-06 17:54:41 +010010 pins {
11 pinmux = <STM32_PINMUX('F', 12, ANALOG)>;
12 };
13 };
14
15 adc12_ain_pins_a: adc12-ain-0 {
16 pins {
17 pinmux = <STM32_PINMUX('C', 3, ANALOG)>, /* ADC1 in13 */
18 <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
19 <STM32_PINMUX('F', 13, ANALOG)>, /* ADC2 in2 */
20 <STM32_PINMUX('F', 14, ANALOG)>; /* ADC2 in6 */
21 };
22 };
23
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +020024 adc12_ain_pins_b: adc12-ain-1 {
25 pins {
26 pinmux = <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
27 <STM32_PINMUX('F', 13, ANALOG)>; /* ADC2 in2 */
28 };
29 };
30
Patrick Delaunay48c5e902020-03-06 17:54:41 +010031 adc12_usb_cc_pins_a: adc12-usb-cc-pins-0 {
32 pins {
33 pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* ADC12 in18 */
34 <STM32_PINMUX('A', 5, ANALOG)>; /* ADC12 in19 */
35 };
36 };
37
38 cec_pins_a: cec-0 {
39 pins {
40 pinmux = <STM32_PINMUX('A', 15, AF4)>;
41 bias-disable;
42 drive-open-drain;
43 slew-rate = <0>;
44 };
45 };
46
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +020047 cec_sleep_pins_a: cec-sleep-0 {
Patrick Delaunay48c5e902020-03-06 17:54:41 +010048 pins {
49 pinmux = <STM32_PINMUX('A', 15, ANALOG)>; /* HDMI_CEC */
50 };
51 };
52
53 cec_pins_b: cec-1 {
54 pins {
55 pinmux = <STM32_PINMUX('B', 6, AF5)>;
56 bias-disable;
57 drive-open-drain;
58 slew-rate = <0>;
59 };
60 };
61
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +020062 cec_sleep_pins_b: cec-sleep-1 {
Patrick Delaunay48c5e902020-03-06 17:54:41 +010063 pins {
64 pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* HDMI_CEC */
65 };
66 };
67
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +020068 dac_ch1_pins_a: dac-ch1-0 {
Patrick Delaunay48c5e902020-03-06 17:54:41 +010069 pins {
70 pinmux = <STM32_PINMUX('A', 4, ANALOG)>;
71 };
72 };
73
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +020074 dac_ch2_pins_a: dac-ch2-0 {
Patrick Delaunay48c5e902020-03-06 17:54:41 +010075 pins {
76 pinmux = <STM32_PINMUX('A', 5, ANALOG)>;
77 };
78 };
79
80 dcmi_pins_a: dcmi-0 {
81 pins {
82 pinmux = <STM32_PINMUX('H', 8, AF13)>,/* DCMI_HSYNC */
83 <STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */
84 <STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */
85 <STM32_PINMUX('H', 9, AF13)>,/* DCMI_D0 */
86 <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
87 <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */
88 <STM32_PINMUX('H', 12, AF13)>,/* DCMI_D3 */
89 <STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */
90 <STM32_PINMUX('I', 4, AF13)>,/* DCMI_D5 */
91 <STM32_PINMUX('B', 8, AF13)>,/* DCMI_D6 */
92 <STM32_PINMUX('E', 6, AF13)>,/* DCMI_D7 */
93 <STM32_PINMUX('I', 1, AF13)>,/* DCMI_D8 */
94 <STM32_PINMUX('H', 7, AF13)>,/* DCMI_D9 */
95 <STM32_PINMUX('I', 3, AF13)>,/* DCMI_D10 */
96 <STM32_PINMUX('H', 15, AF13)>;/* DCMI_D11 */
97 bias-disable;
98 };
99 };
100
101 dcmi_sleep_pins_a: dcmi-sleep-0 {
102 pins {
103 pinmux = <STM32_PINMUX('H', 8, ANALOG)>,/* DCMI_HSYNC */
104 <STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_VSYNC */
105 <STM32_PINMUX('A', 6, ANALOG)>,/* DCMI_PIXCLK */
106 <STM32_PINMUX('H', 9, ANALOG)>,/* DCMI_D0 */
107 <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
108 <STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */
109 <STM32_PINMUX('H', 12, ANALOG)>,/* DCMI_D3 */
110 <STM32_PINMUX('H', 14, ANALOG)>,/* DCMI_D4 */
111 <STM32_PINMUX('I', 4, ANALOG)>,/* DCMI_D5 */
112 <STM32_PINMUX('B', 8, ANALOG)>,/* DCMI_D6 */
113 <STM32_PINMUX('E', 6, ANALOG)>,/* DCMI_D7 */
114 <STM32_PINMUX('I', 1, ANALOG)>,/* DCMI_D8 */
115 <STM32_PINMUX('H', 7, ANALOG)>,/* DCMI_D9 */
116 <STM32_PINMUX('I', 3, ANALOG)>,/* DCMI_D10 */
117 <STM32_PINMUX('H', 15, ANALOG)>;/* DCMI_D11 */
118 };
119 };
120
Patrick Delaunayb22fa9d2021-07-27 12:15:12 +0200121 dcmi_pins_b: dcmi-1 {
122 pins {
123 pinmux = <STM32_PINMUX('A', 4, AF13)>,/* DCMI_HSYNC */
124 <STM32_PINMUX('B', 7, AF13)>,/* DCMI_VSYNC */
125 <STM32_PINMUX('A', 6, AF13)>,/* DCMI_PIXCLK */
126 <STM32_PINMUX('C', 6, AF13)>,/* DCMI_D0 */
127 <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */
128 <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */
129 <STM32_PINMUX('E', 1, AF13)>,/* DCMI_D3 */
130 <STM32_PINMUX('E', 11, AF13)>,/* DCMI_D4 */
131 <STM32_PINMUX('D', 3, AF13)>,/* DCMI_D5 */
132 <STM32_PINMUX('E', 13, AF13)>,/* DCMI_D6 */
133 <STM32_PINMUX('B', 9, AF13)>;/* DCMI_D7 */
134 bias-disable;
135 };
136 };
137
138 dcmi_sleep_pins_b: dcmi-sleep-1 {
139 pins {
140 pinmux = <STM32_PINMUX('A', 4, ANALOG)>,/* DCMI_HSYNC */
141 <STM32_PINMUX('B', 7, ANALOG)>,/* DCMI_VSYNC */
142 <STM32_PINMUX('A', 6, ANALOG)>,/* DCMI_PIXCLK */
143 <STM32_PINMUX('C', 6, ANALOG)>,/* DCMI_D0 */
144 <STM32_PINMUX('H', 10, ANALOG)>,/* DCMI_D1 */
145 <STM32_PINMUX('H', 11, ANALOG)>,/* DCMI_D2 */
146 <STM32_PINMUX('E', 1, ANALOG)>,/* DCMI_D3 */
147 <STM32_PINMUX('E', 11, ANALOG)>,/* DCMI_D4 */
148 <STM32_PINMUX('D', 3, ANALOG)>,/* DCMI_D5 */
149 <STM32_PINMUX('E', 13, ANALOG)>,/* DCMI_D6 */
150 <STM32_PINMUX('B', 9, ANALOG)>;/* DCMI_D7 */
151 };
152 };
153
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100154 ethernet0_rgmii_pins_a: rgmii-0 {
155 pins1 {
156 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
157 <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
158 <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
159 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
160 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
161 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
162 <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
163 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
164 bias-disable;
165 drive-push-pull;
166 slew-rate = <2>;
167 };
168 pins2 {
169 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
170 bias-disable;
171 drive-push-pull;
172 slew-rate = <0>;
173 };
174 pins3 {
175 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
176 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
177 <STM32_PINMUX('B', 0, AF11)>, /* ETH_RGMII_RXD2 */
178 <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
179 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
180 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
181 bias-disable;
182 };
183 };
184
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200185 ethernet0_rgmii_sleep_pins_a: rgmii-sleep-0 {
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100186 pins1 {
187 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
188 <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
189 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
190 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
191 <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
192 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
193 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
194 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
195 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
196 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
197 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
198 <STM32_PINMUX('B', 0, ANALOG)>, /* ETH_RGMII_RXD2 */
199 <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
200 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
201 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
202 };
203 };
204
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200205 ethernet0_rgmii_pins_b: rgmii-1 {
206 pins1 {
207 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
208 <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
209 <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
210 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
211 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
212 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
213 <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
214 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
215 bias-disable;
216 drive-push-pull;
217 slew-rate = <2>;
218 };
219 pins2 {
220 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
221 bias-disable;
222 drive-push-pull;
223 slew-rate = <0>;
224 };
225 pins3 {
226 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
227 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
228 <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
229 <STM32_PINMUX('H', 7, AF11)>, /* ETH_RGMII_RXD3 */
230 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
231 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
232 bias-disable;
233 };
234 };
235
236 ethernet0_rgmii_sleep_pins_b: rgmii-sleep-1 {
237 pins1 {
238 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
239 <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
240 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
241 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
242 <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
243 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
244 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
245 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
246 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
247 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
248 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
249 <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
250 <STM32_PINMUX('H', 7, ANALOG)>, /* ETH_RGMII_RXD3 */
251 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
252 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
253 };
254 };
255
Patrick Delaunay2b2d0b62020-07-06 13:26:51 +0200256 ethernet0_rgmii_pins_c: rgmii-2 {
Patrick Delaunay8aee15d2020-04-21 12:27:35 +0200257 pins1 {
258 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
259 <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
260 <STM32_PINMUX('B', 12, AF11)>, /* ETH_RGMII_TXD0 */
261 <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
262 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
263 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
264 <STM32_PINMUX('G', 11, AF11)>, /* ETH_RGMII_TX_CTL */
265 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
266 bias-disable;
267 drive-push-pull;
268 slew-rate = <2>;
269 };
270 pins2 {
271 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
272 bias-disable;
273 drive-push-pull;
274 slew-rate = <0>;
275 };
276 pins3 {
277 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
278 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
279 <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
280 <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
281 <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
282 <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
283 bias-disable;
284 };
285 };
286
Patrick Delaunay2b2d0b62020-07-06 13:26:51 +0200287 ethernet0_rgmii_sleep_pins_c: rgmii-sleep-2 {
Patrick Delaunay8aee15d2020-04-21 12:27:35 +0200288 pins1 {
289 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
290 <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
291 <STM32_PINMUX('B', 12, ANALOG)>, /* ETH_RGMII_TXD0 */
292 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
293 <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
294 <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
295 <STM32_PINMUX('G', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
296 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
297 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
298 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
299 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
300 <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
301 <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
302 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
303 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
304 };
305 };
306
Patrick Delaunaydf0d20a2020-04-30 15:52:46 +0200307 ethernet0_rmii_pins_a: rmii-0 {
308 pins1 {
309 pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
310 <STM32_PINMUX('G', 14, AF11)>, /* ETH1_RMII_TXD1 */
311 <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */
312 <STM32_PINMUX('A', 1, AF0)>, /* ETH1_RMII_REF_CLK */
313 <STM32_PINMUX('A', 2, AF11)>, /* ETH1_MDIO */
314 <STM32_PINMUX('C', 1, AF11)>; /* ETH1_MDC */
315 bias-disable;
316 drive-push-pull;
317 slew-rate = <2>;
318 };
319 pins2 {
320 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */
321 <STM32_PINMUX('C', 5, AF11)>, /* ETH1_RMII_RXD1 */
322 <STM32_PINMUX('A', 7, AF11)>; /* ETH1_RMII_CRS_DV */
323 bias-disable;
324 };
325 };
326
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200327 ethernet0_rmii_sleep_pins_a: rmii-sleep-0 {
Patrick Delaunaydf0d20a2020-04-30 15:52:46 +0200328 pins1 {
329 pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */
330 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH1_RMII_TXD1 */
331 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */
332 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */
333 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */
334 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RMII_RXD0 */
335 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RMII_RXD1 */
336 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH1_RMII_REF_CLK */
337 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH1_RMII_CRS_DV */
338 };
339 };
340
Patrick Delaunay6f182192022-04-26 15:38:05 +0200341 ethernet0_rmii_pins_b: rmii-1 {
342 pins1 {
343 pinmux = <STM32_PINMUX('B', 5, AF0)>, /* ETH1_CLK */
344 <STM32_PINMUX('C', 1, AF11)>, /* ETH1_MDC */
345 <STM32_PINMUX('G', 13, AF11)>, /* ETH1_TXD0 */
346 <STM32_PINMUX('G', 14, AF11)>; /* ETH1_TXD1 */
347 bias-disable;
348 drive-push-pull;
349 slew-rate = <1>;
350 };
351 pins2 {
352 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH1_MDIO */
353 bias-disable;
354 drive-push-pull;
355 slew-rate = <0>;
356 };
357 pins3 {
358 pinmux = <STM32_PINMUX('A', 7, AF11)>, /* ETH1_CRS_DV */
359 <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RXD0 */
360 <STM32_PINMUX('C', 5, AF11)>; /* ETH1_RXD1 */
361 bias-disable;
362 };
363 pins4 {
364 pinmux = <STM32_PINMUX('B', 11, AF11)>; /* ETH1_TX_EN */
365 };
366 };
367
368 ethernet0_rmii_sleep_pins_b: rmii-sleep-1 {
369 pins1 {
370 pinmux = <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */
371 <STM32_PINMUX('A', 7, ANALOG)>, /* ETH1_CRS_DV */
372 <STM32_PINMUX('B', 5, ANALOG)>, /* ETH1_CLK */
373 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_TX_EN */
374 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */
375 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RXD0 */
376 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RXD1 */
377 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_TXD0 */
378 <STM32_PINMUX('G', 14, ANALOG)>; /* ETH1_TXD1 */
379 };
380 };
381
Patrick Delaunaye25cbd42022-07-05 16:55:54 +0200382 ethernet0_rmii_pins_c: rmii-2 {
383 pins1 {
384 pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
385 <STM32_PINMUX('G', 14, AF11)>, /* ETH1_RMII_TXD1 */
386 <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */
387 <STM32_PINMUX('A', 1, AF11)>, /* ETH1_RMII_REF_CLK */
388 <STM32_PINMUX('A', 2, AF11)>, /* ETH1_MDIO */
389 <STM32_PINMUX('C', 1, AF11)>; /* ETH1_MDC */
390 bias-disable;
391 drive-push-pull;
392 slew-rate = <2>;
393 };
394 pins2 {
395 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */
396 <STM32_PINMUX('C', 5, AF11)>, /* ETH1_RMII_RXD1 */
397 <STM32_PINMUX('A', 7, AF11)>; /* ETH1_RMII_CRS_DV */
398 bias-disable;
399 };
400 };
401
402 ethernet0_rmii_sleep_pins_c: rmii-sleep-2 {
403 pins1 {
404 pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */
405 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH1_RMII_TXD1 */
406 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */
407 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */
408 <STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */
409 <STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RMII_RXD0 */
410 <STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RMII_RXD1 */
411 <STM32_PINMUX('A', 1, ANALOG)>, /* ETH1_RMII_REF_CLK */
412 <STM32_PINMUX('A', 7, ANALOG)>; /* ETH1_RMII_CRS_DV */
413 };
414 };
415
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100416 fmc_pins_a: fmc-0 {
417 pins1 {
418 pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
419 <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
420 <STM32_PINMUX('D', 11, AF12)>, /* FMC_A16_FMC_CLE */
421 <STM32_PINMUX('D', 12, AF12)>, /* FMC_A17_FMC_ALE */
422 <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
423 <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
424 <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
425 <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
426 <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
427 <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
428 <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
429 <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
430 <STM32_PINMUX('G', 9, AF12)>; /* FMC_NE2_FMC_NCE */
431 bias-disable;
432 drive-push-pull;
433 slew-rate = <1>;
434 };
435 pins2 {
436 pinmux = <STM32_PINMUX('D', 6, AF12)>; /* FMC_NWAIT */
437 bias-pull-up;
438 };
439 };
440
441 fmc_sleep_pins_a: fmc-sleep-0 {
442 pins {
443 pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */
444 <STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */
445 <STM32_PINMUX('D', 11, ANALOG)>, /* FMC_A16_FMC_CLE */
446 <STM32_PINMUX('D', 12, ANALOG)>, /* FMC_A17_FMC_ALE */
447 <STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */
448 <STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */
449 <STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */
450 <STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */
451 <STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */
452 <STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */
453 <STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */
454 <STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */
455 <STM32_PINMUX('D', 6, ANALOG)>, /* FMC_NWAIT */
456 <STM32_PINMUX('G', 9, ANALOG)>; /* FMC_NE2_FMC_NCE */
457 };
458 };
459
Patrick Delaunay6d397052021-01-11 12:33:36 +0100460 fmc_pins_b: fmc-1 {
461 pins {
462 pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
463 <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
464 <STM32_PINMUX('B', 7, AF12)>, /* FMC_NL */
465 <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
466 <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
467 <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
468 <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
469 <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
470 <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
471 <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
472 <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
473 <STM32_PINMUX('E', 11, AF12)>, /* FMC_D8 */
474 <STM32_PINMUX('E', 12, AF12)>, /* FMC_D9 */
475 <STM32_PINMUX('E', 13, AF12)>, /* FMC_D10 */
476 <STM32_PINMUX('E', 14, AF12)>, /* FMC_D11 */
477 <STM32_PINMUX('E', 15, AF12)>, /* FMC_D12 */
478 <STM32_PINMUX('D', 8, AF12)>, /* FMC_D13 */
479 <STM32_PINMUX('D', 9, AF12)>, /* FMC_D14 */
480 <STM32_PINMUX('D', 10, AF12)>, /* FMC_D15 */
481 <STM32_PINMUX('G', 9, AF12)>, /* FMC_NE2_FMC_NCE */
482 <STM32_PINMUX('G', 12, AF12)>; /* FMC_NE4 */
483 bias-disable;
484 drive-push-pull;
485 slew-rate = <3>;
486 };
487 };
488
489 fmc_sleep_pins_b: fmc-sleep-1 {
490 pins {
491 pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */
492 <STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */
493 <STM32_PINMUX('B', 7, ANALOG)>, /* FMC_NL */
494 <STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */
495 <STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */
496 <STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */
497 <STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */
498 <STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */
499 <STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */
500 <STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */
501 <STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */
502 <STM32_PINMUX('E', 11, ANALOG)>, /* FMC_D8 */
503 <STM32_PINMUX('E', 12, ANALOG)>, /* FMC_D9 */
504 <STM32_PINMUX('E', 13, ANALOG)>, /* FMC_D10 */
505 <STM32_PINMUX('E', 14, ANALOG)>, /* FMC_D11 */
506 <STM32_PINMUX('E', 15, ANALOG)>, /* FMC_D12 */
507 <STM32_PINMUX('D', 8, ANALOG)>, /* FMC_D13 */
508 <STM32_PINMUX('D', 9, ANALOG)>, /* FMC_D14 */
509 <STM32_PINMUX('D', 10, ANALOG)>, /* FMC_D15 */
510 <STM32_PINMUX('G', 9, ANALOG)>, /* FMC_NE2_FMC_NCE */
511 <STM32_PINMUX('G', 12, ANALOG)>; /* FMC_NE4 */
512 };
513 };
514
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100515 i2c1_pins_a: i2c1-0 {
516 pins {
517 pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
518 <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
519 bias-disable;
520 drive-open-drain;
521 slew-rate = <0>;
522 };
523 };
524
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200525 i2c1_sleep_pins_a: i2c1-sleep-0 {
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100526 pins {
527 pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */
528 <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
529 };
530 };
531
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200532 i2c1_pins_b: i2c1-1 {
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100533 pins {
534 pinmux = <STM32_PINMUX('F', 14, AF5)>, /* I2C1_SCL */
535 <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
536 bias-disable;
537 drive-open-drain;
538 slew-rate = <0>;
539 };
540 };
541
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200542 i2c1_sleep_pins_b: i2c1-sleep-1 {
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100543 pins {
544 pinmux = <STM32_PINMUX('F', 14, ANALOG)>, /* I2C1_SCL */
545 <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
546 };
547 };
548
549 i2c2_pins_a: i2c2-0 {
550 pins {
551 pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
552 <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
553 bias-disable;
554 drive-open-drain;
555 slew-rate = <0>;
556 };
557 };
558
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200559 i2c2_sleep_pins_a: i2c2-sleep-0 {
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100560 pins {
561 pinmux = <STM32_PINMUX('H', 4, ANALOG)>, /* I2C2_SCL */
562 <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
563 };
564 };
565
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200566 i2c2_pins_b1: i2c2-1 {
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100567 pins {
568 pinmux = <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
569 bias-disable;
570 drive-open-drain;
571 slew-rate = <0>;
572 };
573 };
574
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200575 i2c2_sleep_pins_b1: i2c2-sleep-1 {
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100576 pins {
577 pinmux = <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
578 };
579 };
580
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200581 i2c2_pins_c: i2c2-2 {
Marek Vasutda779092020-05-26 04:30:21 +0200582 pins {
583 pinmux = <STM32_PINMUX('F', 1, AF4)>, /* I2C2_SCL */
584 <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
585 bias-disable;
586 drive-open-drain;
587 slew-rate = <0>;
588 };
589 };
590
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200591 i2c2_pins_sleep_c: i2c2-sleep-2 {
Marek Vasutda779092020-05-26 04:30:21 +0200592 pins {
593 pinmux = <STM32_PINMUX('F', 1, ANALOG)>, /* I2C2_SCL */
594 <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
595 };
596 };
597
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100598 i2c5_pins_a: i2c5-0 {
599 pins {
600 pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */
601 <STM32_PINMUX('A', 12, AF4)>; /* I2C5_SDA */
602 bias-disable;
603 drive-open-drain;
604 slew-rate = <0>;
605 };
606 };
607
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200608 i2c5_sleep_pins_a: i2c5-sleep-0 {
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100609 pins {
610 pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* I2C5_SCL */
611 <STM32_PINMUX('A', 12, ANALOG)>; /* I2C5_SDA */
612
613 };
614 };
615
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200616 i2c5_pins_b: i2c5-1 {
617 pins {
618 pinmux = <STM32_PINMUX('D', 0, AF4)>, /* I2C5_SCL */
619 <STM32_PINMUX('D', 1, AF4)>; /* I2C5_SDA */
620 bias-disable;
621 drive-open-drain;
622 slew-rate = <0>;
623 };
624 };
625
626 i2c5_sleep_pins_b: i2c5-sleep-1 {
627 pins {
628 pinmux = <STM32_PINMUX('D', 0, ANALOG)>, /* I2C5_SCL */
629 <STM32_PINMUX('D', 1, ANALOG)>; /* I2C5_SDA */
630 };
631 };
632
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100633 i2s2_pins_a: i2s2-0 {
634 pins {
635 pinmux = <STM32_PINMUX('I', 3, AF5)>, /* I2S2_SDO */
636 <STM32_PINMUX('B', 9, AF5)>, /* I2S2_WS */
637 <STM32_PINMUX('A', 9, AF5)>; /* I2S2_CK */
638 slew-rate = <1>;
639 drive-push-pull;
640 bias-disable;
641 };
642 };
643
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200644 i2s2_sleep_pins_a: i2s2-sleep-0 {
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100645 pins {
646 pinmux = <STM32_PINMUX('I', 3, ANALOG)>, /* I2S2_SDO */
647 <STM32_PINMUX('B', 9, ANALOG)>, /* I2S2_WS */
648 <STM32_PINMUX('A', 9, ANALOG)>; /* I2S2_CK */
649 };
650 };
651
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200652 ltdc_pins_a: ltdc-0 {
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100653 pins {
654 pinmux = <STM32_PINMUX('G', 7, AF14)>, /* LCD_CLK */
655 <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
656 <STM32_PINMUX('I', 9, AF14)>, /* LCD_VSYNC */
657 <STM32_PINMUX('F', 10, AF14)>, /* LCD_DE */
658 <STM32_PINMUX('H', 2, AF14)>, /* LCD_R0 */
659 <STM32_PINMUX('H', 3, AF14)>, /* LCD_R1 */
660 <STM32_PINMUX('H', 8, AF14)>, /* LCD_R2 */
661 <STM32_PINMUX('H', 9, AF14)>, /* LCD_R3 */
662 <STM32_PINMUX('H', 10, AF14)>, /* LCD_R4 */
663 <STM32_PINMUX('C', 0, AF14)>, /* LCD_R5 */
664 <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
665 <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
666 <STM32_PINMUX('E', 5, AF14)>, /* LCD_G0 */
667 <STM32_PINMUX('E', 6, AF14)>, /* LCD_G1 */
668 <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
669 <STM32_PINMUX('H', 14, AF14)>, /* LCD_G3 */
670 <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
671 <STM32_PINMUX('I', 0, AF14)>, /* LCD_G5 */
672 <STM32_PINMUX('I', 1, AF14)>, /* LCD_G6 */
673 <STM32_PINMUX('I', 2, AF14)>, /* LCD_G7 */
674 <STM32_PINMUX('D', 9, AF14)>, /* LCD_B0 */
675 <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */
676 <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */
677 <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
678 <STM32_PINMUX('I', 4, AF14)>, /* LCD_B4 */
679 <STM32_PINMUX('A', 3, AF14)>, /* LCD_B5 */
680 <STM32_PINMUX('B', 8, AF14)>, /* LCD_B6 */
681 <STM32_PINMUX('D', 8, AF14)>; /* LCD_B7 */
682 bias-disable;
683 drive-push-pull;
684 slew-rate = <1>;
685 };
686 };
687
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200688 ltdc_sleep_pins_a: ltdc-sleep-0 {
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100689 pins {
690 pinmux = <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_CLK */
691 <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
692 <STM32_PINMUX('I', 9, ANALOG)>, /* LCD_VSYNC */
693 <STM32_PINMUX('F', 10, ANALOG)>, /* LCD_DE */
694 <STM32_PINMUX('H', 2, ANALOG)>, /* LCD_R0 */
695 <STM32_PINMUX('H', 3, ANALOG)>, /* LCD_R1 */
696 <STM32_PINMUX('H', 8, ANALOG)>, /* LCD_R2 */
697 <STM32_PINMUX('H', 9, ANALOG)>, /* LCD_R3 */
698 <STM32_PINMUX('H', 10, ANALOG)>, /* LCD_R4 */
699 <STM32_PINMUX('C', 0, ANALOG)>, /* LCD_R5 */
700 <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
701 <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
702 <STM32_PINMUX('E', 5, ANALOG)>, /* LCD_G0 */
703 <STM32_PINMUX('E', 6, ANALOG)>, /* LCD_G1 */
704 <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
705 <STM32_PINMUX('H', 14, ANALOG)>, /* LCD_G3 */
706 <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
707 <STM32_PINMUX('I', 0, ANALOG)>, /* LCD_G5 */
708 <STM32_PINMUX('I', 1, ANALOG)>, /* LCD_G6 */
709 <STM32_PINMUX('I', 2, ANALOG)>, /* LCD_G7 */
710 <STM32_PINMUX('D', 9, ANALOG)>, /* LCD_B0 */
711 <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */
712 <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */
713 <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */
714 <STM32_PINMUX('I', 4, ANALOG)>, /* LCD_B4 */
715 <STM32_PINMUX('A', 3, ANALOG)>, /* LCD_B5 */
716 <STM32_PINMUX('B', 8, ANALOG)>, /* LCD_B6 */
717 <STM32_PINMUX('D', 8, ANALOG)>; /* LCD_B7 */
718 };
719 };
720
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200721 ltdc_pins_b: ltdc-1 {
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100722 pins {
723 pinmux = <STM32_PINMUX('I', 14, AF14)>, /* LCD_CLK */
724 <STM32_PINMUX('I', 12, AF14)>, /* LCD_HSYNC */
725 <STM32_PINMUX('I', 13, AF14)>, /* LCD_VSYNC */
726 <STM32_PINMUX('K', 7, AF14)>, /* LCD_DE */
727 <STM32_PINMUX('I', 15, AF14)>, /* LCD_R0 */
728 <STM32_PINMUX('J', 0, AF14)>, /* LCD_R1 */
729 <STM32_PINMUX('J', 1, AF14)>, /* LCD_R2 */
730 <STM32_PINMUX('J', 2, AF14)>, /* LCD_R3 */
731 <STM32_PINMUX('J', 3, AF14)>, /* LCD_R4 */
732 <STM32_PINMUX('J', 4, AF14)>, /* LCD_R5 */
733 <STM32_PINMUX('J', 5, AF14)>, /* LCD_R6 */
734 <STM32_PINMUX('J', 6, AF14)>, /* LCD_R7 */
735 <STM32_PINMUX('J', 7, AF14)>, /* LCD_G0 */
736 <STM32_PINMUX('J', 8, AF14)>, /* LCD_G1 */
737 <STM32_PINMUX('J', 9, AF14)>, /* LCD_G2 */
738 <STM32_PINMUX('J', 10, AF14)>, /* LCD_G3 */
739 <STM32_PINMUX('J', 11, AF14)>, /* LCD_G4 */
740 <STM32_PINMUX('K', 0, AF14)>, /* LCD_G5 */
741 <STM32_PINMUX('K', 1, AF14)>, /* LCD_G6 */
742 <STM32_PINMUX('K', 2, AF14)>, /* LCD_G7 */
743 <STM32_PINMUX('J', 12, AF14)>, /* LCD_B0 */
744 <STM32_PINMUX('J', 13, AF14)>, /* LCD_B1 */
745 <STM32_PINMUX('J', 14, AF14)>, /* LCD_B2 */
746 <STM32_PINMUX('J', 15, AF14)>, /* LCD_B3 */
747 <STM32_PINMUX('K', 3, AF14)>, /* LCD_B4 */
748 <STM32_PINMUX('K', 4, AF14)>, /* LCD_B5 */
749 <STM32_PINMUX('K', 5, AF14)>, /* LCD_B6 */
750 <STM32_PINMUX('K', 6, AF14)>; /* LCD_B7 */
751 bias-disable;
752 drive-push-pull;
753 slew-rate = <1>;
754 };
755 };
756
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200757 ltdc_sleep_pins_b: ltdc-sleep-1 {
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100758 pins {
759 pinmux = <STM32_PINMUX('I', 14, ANALOG)>, /* LCD_CLK */
760 <STM32_PINMUX('I', 12, ANALOG)>, /* LCD_HSYNC */
761 <STM32_PINMUX('I', 13, ANALOG)>, /* LCD_VSYNC */
762 <STM32_PINMUX('K', 7, ANALOG)>, /* LCD_DE */
763 <STM32_PINMUX('I', 15, ANALOG)>, /* LCD_R0 */
764 <STM32_PINMUX('J', 0, ANALOG)>, /* LCD_R1 */
765 <STM32_PINMUX('J', 1, ANALOG)>, /* LCD_R2 */
766 <STM32_PINMUX('J', 2, ANALOG)>, /* LCD_R3 */
767 <STM32_PINMUX('J', 3, ANALOG)>, /* LCD_R4 */
768 <STM32_PINMUX('J', 4, ANALOG)>, /* LCD_R5 */
769 <STM32_PINMUX('J', 5, ANALOG)>, /* LCD_R6 */
770 <STM32_PINMUX('J', 6, ANALOG)>, /* LCD_R7 */
771 <STM32_PINMUX('J', 7, ANALOG)>, /* LCD_G0 */
772 <STM32_PINMUX('J', 8, ANALOG)>, /* LCD_G1 */
773 <STM32_PINMUX('J', 9, ANALOG)>, /* LCD_G2 */
774 <STM32_PINMUX('J', 10, ANALOG)>, /* LCD_G3 */
775 <STM32_PINMUX('J', 11, ANALOG)>, /* LCD_G4 */
776 <STM32_PINMUX('K', 0, ANALOG)>, /* LCD_G5 */
777 <STM32_PINMUX('K', 1, ANALOG)>, /* LCD_G6 */
778 <STM32_PINMUX('K', 2, ANALOG)>, /* LCD_G7 */
779 <STM32_PINMUX('J', 12, ANALOG)>, /* LCD_B0 */
780 <STM32_PINMUX('J', 13, ANALOG)>, /* LCD_B1 */
781 <STM32_PINMUX('J', 14, ANALOG)>, /* LCD_B2 */
782 <STM32_PINMUX('J', 15, ANALOG)>, /* LCD_B3 */
783 <STM32_PINMUX('K', 3, ANALOG)>, /* LCD_B4 */
784 <STM32_PINMUX('K', 4, ANALOG)>, /* LCD_B5 */
785 <STM32_PINMUX('K', 5, ANALOG)>, /* LCD_B6 */
786 <STM32_PINMUX('K', 6, ANALOG)>; /* LCD_B7 */
787 };
788 };
789
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200790 ltdc_pins_c: ltdc-2 {
791 pins1 {
792 pinmux = <STM32_PINMUX('B', 1, AF9)>, /* LTDC_R6 */
793 <STM32_PINMUX('B', 9, AF14)>, /* LTDC_B7 */
794 <STM32_PINMUX('C', 0, AF14)>, /* LTDC_R5 */
795 <STM32_PINMUX('D', 3, AF14)>, /* LTDC_G7 */
796 <STM32_PINMUX('D', 6, AF14)>, /* LTDC_B2 */
797 <STM32_PINMUX('D', 10, AF14)>, /* LTDC_B3 */
798 <STM32_PINMUX('E', 11, AF14)>, /* LTDC_G3 */
799 <STM32_PINMUX('E', 12, AF14)>, /* LTDC_B4 */
800 <STM32_PINMUX('E', 13, AF14)>, /* LTDC_DE */
801 <STM32_PINMUX('E', 15, AF14)>, /* LTDC_R7 */
802 <STM32_PINMUX('H', 4, AF9)>, /* LTDC_G5 */
803 <STM32_PINMUX('H', 8, AF14)>, /* LTDC_R2 */
804 <STM32_PINMUX('H', 9, AF14)>, /* LTDC_R3 */
805 <STM32_PINMUX('H', 10, AF14)>, /* LTDC_R4 */
806 <STM32_PINMUX('H', 13, AF14)>, /* LTDC_G2 */
807 <STM32_PINMUX('H', 15, AF14)>, /* LTDC_G4 */
808 <STM32_PINMUX('I', 1, AF14)>, /* LTDC_G6 */
809 <STM32_PINMUX('I', 5, AF14)>, /* LTDC_B5 */
810 <STM32_PINMUX('I', 6, AF14)>, /* LTDC_B6 */
811 <STM32_PINMUX('I', 9, AF14)>, /* LTDC_VSYNC */
812 <STM32_PINMUX('I', 10, AF14)>; /* LTDC_HSYNC */
813 bias-disable;
814 drive-push-pull;
815 slew-rate = <0>;
816 };
817 pins2 {
818 pinmux = <STM32_PINMUX('E', 14, AF14)>; /* LTDC_CLK */
819 bias-disable;
820 drive-push-pull;
821 slew-rate = <1>;
822 };
823 };
824
825 ltdc_sleep_pins_c: ltdc-sleep-2 {
826 pins1 {
827 pinmux = <STM32_PINMUX('B', 1, ANALOG)>, /* LTDC_R6 */
828 <STM32_PINMUX('B', 9, ANALOG)>, /* LTDC_B7 */
829 <STM32_PINMUX('C', 0, ANALOG)>, /* LTDC_R5 */
830 <STM32_PINMUX('D', 3, ANALOG)>, /* LTDC_G7 */
831 <STM32_PINMUX('D', 6, ANALOG)>, /* LTDC_B2 */
832 <STM32_PINMUX('D', 10, ANALOG)>, /* LTDC_B3 */
833 <STM32_PINMUX('E', 11, ANALOG)>, /* LTDC_G3 */
834 <STM32_PINMUX('E', 12, ANALOG)>, /* LTDC_B4 */
835 <STM32_PINMUX('E', 13, ANALOG)>, /* LTDC_DE */
836 <STM32_PINMUX('E', 15, ANALOG)>, /* LTDC_R7 */
837 <STM32_PINMUX('H', 4, ANALOG)>, /* LTDC_G5 */
838 <STM32_PINMUX('H', 8, ANALOG)>, /* LTDC_R2 */
839 <STM32_PINMUX('H', 9, ANALOG)>, /* LTDC_R3 */
840 <STM32_PINMUX('H', 10, ANALOG)>, /* LTDC_R4 */
841 <STM32_PINMUX('H', 13, ANALOG)>, /* LTDC_G2 */
842 <STM32_PINMUX('H', 15, ANALOG)>, /* LTDC_G4 */
843 <STM32_PINMUX('I', 1, ANALOG)>, /* LTDC_G6 */
844 <STM32_PINMUX('I', 5, ANALOG)>, /* LTDC_B5 */
845 <STM32_PINMUX('I', 6, ANALOG)>, /* LTDC_B6 */
846 <STM32_PINMUX('I', 9, ANALOG)>, /* LTDC_VSYNC */
847 <STM32_PINMUX('I', 10, ANALOG)>, /* LTDC_HSYNC */
848 <STM32_PINMUX('E', 14, ANALOG)>; /* LTDC_CLK */
849 };
850 };
851
852 ltdc_pins_d: ltdc-3 {
853 pins1 {
854 pinmux = <STM32_PINMUX('G', 7, AF14)>; /* LCD_CLK */
855 bias-disable;
856 drive-push-pull;
857 slew-rate = <3>;
858 };
859 pins2 {
860 pinmux = <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
861 <STM32_PINMUX('I', 9, AF14)>, /* LCD_VSYNC */
862 <STM32_PINMUX('E', 13, AF14)>, /* LCD_DE */
863 <STM32_PINMUX('G', 13, AF14)>, /* LCD_R0 */
864 <STM32_PINMUX('H', 3, AF14)>, /* LCD_R1 */
865 <STM32_PINMUX('H', 8, AF14)>, /* LCD_R2 */
866 <STM32_PINMUX('H', 9, AF14)>, /* LCD_R3 */
867 <STM32_PINMUX('A', 5, AF14)>, /* LCD_R4 */
868 <STM32_PINMUX('H', 11, AF14)>, /* LCD_R5 */
869 <STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
870 <STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
871 <STM32_PINMUX('E', 5, AF14)>, /* LCD_G0 */
872 <STM32_PINMUX('B', 0, AF14)>, /* LCD_G1 */
873 <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
874 <STM32_PINMUX('E', 11, AF14)>, /* LCD_G3 */
875 <STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
876 <STM32_PINMUX('H', 4, AF9)>, /* LCD_G5 */
877 <STM32_PINMUX('I', 11, AF9)>, /* LCD_G6 */
878 <STM32_PINMUX('G', 8, AF14)>, /* LCD_G7 */
879 <STM32_PINMUX('D', 9, AF14)>, /* LCD_B0 */
880 <STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */
881 <STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */
882 <STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
883 <STM32_PINMUX('E', 12, AF14)>, /* LCD_B4 */
884 <STM32_PINMUX('A', 3, AF14)>, /* LCD_B5 */
885 <STM32_PINMUX('B', 8, AF14)>, /* LCD_B6 */
886 <STM32_PINMUX('I', 7, AF14)>; /* LCD_B7 */
887 bias-disable;
888 drive-push-pull;
889 slew-rate = <2>;
890 };
891 };
892
893 ltdc_sleep_pins_d: ltdc-sleep-3 {
894 pins {
895 pinmux = <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_CLK */
896 <STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
897 <STM32_PINMUX('I', 9, ANALOG)>, /* LCD_VSYNC */
898 <STM32_PINMUX('E', 13, ANALOG)>, /* LCD_DE */
899 <STM32_PINMUX('G', 13, ANALOG)>, /* LCD_R0 */
900 <STM32_PINMUX('H', 3, ANALOG)>, /* LCD_R1 */
901 <STM32_PINMUX('H', 8, ANALOG)>, /* LCD_R2 */
902 <STM32_PINMUX('H', 9, ANALOG)>, /* LCD_R3 */
903 <STM32_PINMUX('A', 5, ANALOG)>, /* LCD_R4 */
904 <STM32_PINMUX('H', 11, ANALOG)>, /* LCD_R5 */
905 <STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
906 <STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
907 <STM32_PINMUX('E', 5, ANALOG)>, /* LCD_G0 */
908 <STM32_PINMUX('B', 0, ANALOG)>, /* LCD_G1 */
909 <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
910 <STM32_PINMUX('E', 11, ANALOG)>, /* LCD_G3 */
911 <STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
912 <STM32_PINMUX('H', 4, ANALOG)>, /* LCD_G5 */
913 <STM32_PINMUX('I', 11, ANALOG)>, /* LCD_G6 */
914 <STM32_PINMUX('G', 8, ANALOG)>, /* LCD_G7 */
915 <STM32_PINMUX('D', 9, ANALOG)>, /* LCD_B0 */
916 <STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */
917 <STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */
918 <STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */
919 <STM32_PINMUX('E', 12, ANALOG)>, /* LCD_B4 */
920 <STM32_PINMUX('A', 3, ANALOG)>, /* LCD_B5 */
921 <STM32_PINMUX('B', 8, ANALOG)>, /* LCD_B6 */
922 <STM32_PINMUX('I', 7, ANALOG)>; /* LCD_B7 */
923 };
924 };
925
Patrick Delaunaye25cbd42022-07-05 16:55:54 +0200926 mco2_pins_a: mco2-0 {
927 pins {
928 pinmux = <STM32_PINMUX('G', 2, AF1)>; /* MCO2 */
929 bias-disable;
930 drive-push-pull;
931 slew-rate = <2>;
932 };
933 };
934
935 mco2_sleep_pins_a: mco2-sleep-0 {
936 pins {
937 pinmux = <STM32_PINMUX('G', 2, ANALOG)>; /* MCO2 */
938 };
939 };
940
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100941 m_can1_pins_a: m-can1-0 {
942 pins1 {
943 pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
944 slew-rate = <1>;
945 drive-push-pull;
946 bias-disable;
947 };
948 pins2 {
949 pinmux = <STM32_PINMUX('I', 9, AF9)>; /* CAN1_RX */
950 bias-disable;
951 };
952 };
953
954 m_can1_sleep_pins_a: m_can1-sleep-0 {
955 pins {
956 pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */
957 <STM32_PINMUX('I', 9, ANALOG)>; /* CAN1_RX */
958 };
959 };
960
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200961 m_can1_pins_b: m-can1-1 {
962 pins1 {
963 pinmux = <STM32_PINMUX('A', 12, AF9)>; /* CAN1_TX */
964 slew-rate = <1>;
965 drive-push-pull;
966 bias-disable;
967 };
968 pins2 {
969 pinmux = <STM32_PINMUX('A', 11, AF9)>; /* CAN1_RX */
970 bias-disable;
971 };
972 };
973
974 m_can1_sleep_pins_b: m_can1-sleep-1 {
975 pins {
976 pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* CAN1_TX */
977 <STM32_PINMUX('A', 11, ANALOG)>; /* CAN1_RX */
978 };
979 };
980
Marek Vasutd76e0032022-06-13 11:55:19 +0200981 m_can1_pins_c: m-can1-2 {
982 pins1 {
983 pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
984 slew-rate = <1>;
985 drive-push-pull;
986 bias-disable;
987 };
988 pins2 {
989 pinmux = <STM32_PINMUX('H', 14, AF9)>; /* CAN1_RX */
990 bias-disable;
991 };
992 };
993
994 m_can1_sleep_pins_c: m_can1-sleep-2 {
995 pins {
996 pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */
997 <STM32_PINMUX('H', 14, ANALOG)>; /* CAN1_RX */
998 };
999 };
1000
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +02001001 m_can2_pins_a: m-can2-0 {
1002 pins1 {
1003 pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */
1004 slew-rate = <1>;
1005 drive-push-pull;
1006 bias-disable;
1007 };
1008 pins2 {
1009 pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */
1010 bias-disable;
1011 };
1012 };
1013
1014 m_can2_sleep_pins_a: m_can2-sleep-0 {
1015 pins {
1016 pinmux = <STM32_PINMUX('B', 13, ANALOG)>, /* CAN2_TX */
1017 <STM32_PINMUX('B', 5, ANALOG)>; /* CAN2_RX */
1018 };
1019 };
1020
Patrick Delaunay48c5e902020-03-06 17:54:41 +01001021 pwm1_pins_a: pwm1-0 {
1022 pins {
1023 pinmux = <STM32_PINMUX('E', 9, AF1)>, /* TIM1_CH1 */
1024 <STM32_PINMUX('E', 11, AF1)>, /* TIM1_CH2 */
1025 <STM32_PINMUX('E', 14, AF1)>; /* TIM1_CH4 */
1026 bias-pull-down;
1027 drive-push-pull;
1028 slew-rate = <0>;
1029 };
1030 };
1031
1032 pwm1_sleep_pins_a: pwm1-sleep-0 {
1033 pins {
1034 pinmux = <STM32_PINMUX('E', 9, ANALOG)>, /* TIM1_CH1 */
1035 <STM32_PINMUX('E', 11, ANALOG)>, /* TIM1_CH2 */
1036 <STM32_PINMUX('E', 14, ANALOG)>; /* TIM1_CH4 */
1037 };
1038 };
1039
Patrick Delaunay6f182192022-04-26 15:38:05 +02001040 pwm1_pins_b: pwm1-1 {
1041 pins {
1042 pinmux = <STM32_PINMUX('E', 9, AF1)>; /* TIM1_CH1 */
1043 bias-pull-down;
1044 drive-push-pull;
1045 slew-rate = <0>;
1046 };
1047 };
1048
1049 pwm1_sleep_pins_b: pwm1-sleep-1 {
1050 pins {
1051 pinmux = <STM32_PINMUX('E', 9, ANALOG)>; /* TIM1_CH1 */
1052 };
1053 };
1054
Patrick Delaunay48c5e902020-03-06 17:54:41 +01001055 pwm2_pins_a: pwm2-0 {
1056 pins {
1057 pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */
1058 bias-pull-down;
1059 drive-push-pull;
1060 slew-rate = <0>;
1061 };
1062 };
1063
1064 pwm2_sleep_pins_a: pwm2-sleep-0 {
1065 pins {
1066 pinmux = <STM32_PINMUX('A', 3, ANALOG)>; /* TIM2_CH4 */
1067 };
1068 };
1069
1070 pwm3_pins_a: pwm3-0 {
1071 pins {
1072 pinmux = <STM32_PINMUX('C', 7, AF2)>; /* TIM3_CH2 */
1073 bias-pull-down;
1074 drive-push-pull;
1075 slew-rate = <0>;
1076 };
1077 };
1078
1079 pwm3_sleep_pins_a: pwm3-sleep-0 {
1080 pins {
1081 pinmux = <STM32_PINMUX('C', 7, ANALOG)>; /* TIM3_CH2 */
1082 };
1083 };
1084
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +02001085 pwm3_pins_b: pwm3-1 {
1086 pins {
1087 pinmux = <STM32_PINMUX('B', 5, AF2)>; /* TIM3_CH2 */
1088 bias-disable;
1089 drive-push-pull;
1090 slew-rate = <0>;
1091 };
1092 };
1093
1094 pwm3_sleep_pins_b: pwm3-sleep-1 {
1095 pins {
1096 pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* TIM3_CH2 */
1097 };
1098 };
1099
Patrick Delaunay48c5e902020-03-06 17:54:41 +01001100 pwm4_pins_a: pwm4-0 {
1101 pins {
1102 pinmux = <STM32_PINMUX('D', 14, AF2)>, /* TIM4_CH3 */
1103 <STM32_PINMUX('D', 15, AF2)>; /* TIM4_CH4 */
1104 bias-pull-down;
1105 drive-push-pull;
1106 slew-rate = <0>;
1107 };
1108 };
1109
1110 pwm4_sleep_pins_a: pwm4-sleep-0 {
1111 pins {
1112 pinmux = <STM32_PINMUX('D', 14, ANALOG)>, /* TIM4_CH3 */
1113 <STM32_PINMUX('D', 15, ANALOG)>; /* TIM4_CH4 */
1114 };
1115 };
1116
1117 pwm4_pins_b: pwm4-1 {
1118 pins {
1119 pinmux = <STM32_PINMUX('D', 13, AF2)>; /* TIM4_CH2 */
1120 bias-pull-down;
1121 drive-push-pull;
1122 slew-rate = <0>;
1123 };
1124 };
1125
1126 pwm4_sleep_pins_b: pwm4-sleep-1 {
1127 pins {
1128 pinmux = <STM32_PINMUX('D', 13, ANALOG)>; /* TIM4_CH2 */
1129 };
1130 };
1131
1132 pwm5_pins_a: pwm5-0 {
1133 pins {
1134 pinmux = <STM32_PINMUX('H', 11, AF2)>; /* TIM5_CH2 */
1135 bias-pull-down;
1136 drive-push-pull;
1137 slew-rate = <0>;
1138 };
1139 };
1140
1141 pwm5_sleep_pins_a: pwm5-sleep-0 {
1142 pins {
1143 pinmux = <STM32_PINMUX('H', 11, ANALOG)>; /* TIM5_CH2 */
1144 };
1145 };
1146
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +02001147 pwm5_pins_b: pwm5-1 {
1148 pins {
1149 pinmux = <STM32_PINMUX('H', 11, AF2)>, /* TIM5_CH2 */
1150 <STM32_PINMUX('H', 12, AF2)>, /* TIM5_CH3 */
1151 <STM32_PINMUX('I', 0, AF2)>; /* TIM5_CH4 */
1152 bias-disable;
1153 drive-push-pull;
1154 slew-rate = <0>;
1155 };
1156 };
1157
1158 pwm5_sleep_pins_b: pwm5-sleep-1 {
1159 pins {
1160 pinmux = <STM32_PINMUX('H', 11, ANALOG)>, /* TIM5_CH2 */
1161 <STM32_PINMUX('H', 12, ANALOG)>, /* TIM5_CH3 */
1162 <STM32_PINMUX('I', 0, ANALOG)>; /* TIM5_CH4 */
1163 };
1164 };
1165
Patrick Delaunay48c5e902020-03-06 17:54:41 +01001166 pwm8_pins_a: pwm8-0 {
1167 pins {
1168 pinmux = <STM32_PINMUX('I', 2, AF3)>; /* TIM8_CH4 */
1169 bias-pull-down;
1170 drive-push-pull;
1171 slew-rate = <0>;
1172 };
1173 };
1174
1175 pwm8_sleep_pins_a: pwm8-sleep-0 {
1176 pins {
1177 pinmux = <STM32_PINMUX('I', 2, ANALOG)>; /* TIM8_CH4 */
1178 };
1179 };
1180
1181 pwm12_pins_a: pwm12-0 {
1182 pins {
1183 pinmux = <STM32_PINMUX('H', 6, AF2)>; /* TIM12_CH1 */
1184 bias-pull-down;
1185 drive-push-pull;
1186 slew-rate = <0>;
1187 };
1188 };
1189
1190 pwm12_sleep_pins_a: pwm12-sleep-0 {
1191 pins {
1192 pinmux = <STM32_PINMUX('H', 6, ANALOG)>; /* TIM12_CH1 */
1193 };
1194 };
1195
1196 qspi_clk_pins_a: qspi-clk-0 {
1197 pins {
1198 pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
1199 bias-disable;
1200 drive-push-pull;
1201 slew-rate = <3>;
1202 };
1203 };
1204
1205 qspi_clk_sleep_pins_a: qspi-clk-sleep-0 {
1206 pins {
1207 pinmux = <STM32_PINMUX('F', 10, ANALOG)>; /* QSPI_CLK */
1208 };
1209 };
1210
1211 qspi_bk1_pins_a: qspi-bk1-0 {
1212 pins1 {
1213 pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
1214 <STM32_PINMUX('F', 9, AF10)>, /* QSPI_BK1_IO1 */
1215 <STM32_PINMUX('F', 7, AF9)>, /* QSPI_BK1_IO2 */
1216 <STM32_PINMUX('F', 6, AF9)>; /* QSPI_BK1_IO3 */
1217 bias-disable;
1218 drive-push-pull;
1219 slew-rate = <1>;
1220 };
1221 pins2 {
1222 pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
1223 bias-pull-up;
1224 drive-push-pull;
1225 slew-rate = <1>;
1226 };
1227 };
1228
1229 qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 {
1230 pins {
1231 pinmux = <STM32_PINMUX('F', 8, ANALOG)>, /* QSPI_BK1_IO0 */
1232 <STM32_PINMUX('F', 9, ANALOG)>, /* QSPI_BK1_IO1 */
1233 <STM32_PINMUX('F', 7, ANALOG)>, /* QSPI_BK1_IO2 */
1234 <STM32_PINMUX('F', 6, ANALOG)>, /* QSPI_BK1_IO3 */
1235 <STM32_PINMUX('B', 6, ANALOG)>; /* QSPI_BK1_NCS */
1236 };
1237 };
1238
1239 qspi_bk2_pins_a: qspi-bk2-0 {
1240 pins1 {
1241 pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */
1242 <STM32_PINMUX('H', 3, AF9)>, /* QSPI_BK2_IO1 */
1243 <STM32_PINMUX('G', 10, AF11)>, /* QSPI_BK2_IO2 */
1244 <STM32_PINMUX('G', 7, AF11)>; /* QSPI_BK2_IO3 */
1245 bias-disable;
1246 drive-push-pull;
1247 slew-rate = <1>;
1248 };
1249 pins2 {
1250 pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */
1251 bias-pull-up;
1252 drive-push-pull;
1253 slew-rate = <1>;
1254 };
1255 };
1256
1257 qspi_bk2_sleep_pins_a: qspi-bk2-sleep-0 {
1258 pins {
1259 pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* QSPI_BK2_IO0 */
1260 <STM32_PINMUX('H', 3, ANALOG)>, /* QSPI_BK2_IO1 */
1261 <STM32_PINMUX('G', 10, ANALOG)>, /* QSPI_BK2_IO2 */
1262 <STM32_PINMUX('G', 7, ANALOG)>, /* QSPI_BK2_IO3 */
1263 <STM32_PINMUX('C', 0, ANALOG)>; /* QSPI_BK2_NCS */
1264 };
1265 };
1266
1267 sai2a_pins_a: sai2a-0 {
1268 pins {
1269 pinmux = <STM32_PINMUX('I', 5, AF10)>, /* SAI2_SCK_A */
1270 <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */
1271 <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */
1272 <STM32_PINMUX('E', 0, AF10)>; /* SAI2_MCLK_A */
1273 slew-rate = <0>;
1274 drive-push-pull;
1275 bias-disable;
1276 };
1277 };
1278
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +02001279 sai2a_sleep_pins_a: sai2a-sleep-0 {
Patrick Delaunay48c5e902020-03-06 17:54:41 +01001280 pins {
1281 pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* SAI2_SCK_A */
1282 <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */
1283 <STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */
1284 <STM32_PINMUX('E', 0, ANALOG)>; /* SAI2_MCLK_A */
1285 };
1286 };
1287
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +02001288 sai2a_pins_b: sai2a-1 {
Patrick Delaunaydf0d20a2020-04-30 15:52:46 +02001289 pins1 {
1290 pinmux = <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */
1291 <STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */
1292 <STM32_PINMUX('D', 13, AF10)>; /* SAI2_SCK_A */
1293 slew-rate = <0>;
1294 drive-push-pull;
1295 bias-disable;
1296 };
1297 };
1298
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +02001299 sai2a_sleep_pins_b: sai2a-sleep-1 {
Patrick Delaunaydf0d20a2020-04-30 15:52:46 +02001300 pins {
1301 pinmux = <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */
1302 <STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */
1303 <STM32_PINMUX('D', 13, ANALOG)>; /* SAI2_SCK_A */
1304 };
1305 };
1306
Patrick Delaunay37868aa2021-12-17 16:30:22 +01001307 sai2a_pins_c: sai2a-2 {
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +02001308 pins {
1309 pinmux = <STM32_PINMUX('D', 13, AF10)>, /* SAI2_SCK_A */
1310 <STM32_PINMUX('D', 11, AF10)>, /* SAI2_SD_A */
1311 <STM32_PINMUX('D', 12, AF10)>; /* SAI2_FS_A */
1312 slew-rate = <0>;
1313 drive-push-pull;
1314 bias-disable;
1315 };
1316 };
1317
Patrick Delaunay37868aa2021-12-17 16:30:22 +01001318 sai2a_sleep_pins_c: sai2a-sleep-2 {
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +02001319 pins {
1320 pinmux = <STM32_PINMUX('D', 13, ANALOG)>, /* SAI2_SCK_A */
1321 <STM32_PINMUX('D', 11, ANALOG)>, /* SAI2_SD_A */
1322 <STM32_PINMUX('D', 12, ANALOG)>; /* SAI2_FS_A */
1323 };
1324 };
1325
Patrick Delaunay48c5e902020-03-06 17:54:41 +01001326 sai2b_pins_a: sai2b-0 {
1327 pins1 {
1328 pinmux = <STM32_PINMUX('E', 12, AF10)>, /* SAI2_SCK_B */
1329 <STM32_PINMUX('E', 13, AF10)>, /* SAI2_FS_B */
1330 <STM32_PINMUX('E', 14, AF10)>; /* SAI2_MCLK_B */
1331 slew-rate = <0>;
1332 drive-push-pull;
1333 bias-disable;
1334 };
1335 pins2 {
1336 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1337 bias-disable;
1338 };
1339 };
1340
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +02001341 sai2b_sleep_pins_a: sai2b-sleep-0 {
Patrick Delaunay48c5e902020-03-06 17:54:41 +01001342 pins {
1343 pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* SAI2_SD_B */
1344 <STM32_PINMUX('E', 12, ANALOG)>, /* SAI2_SCK_B */
1345 <STM32_PINMUX('E', 13, ANALOG)>, /* SAI2_FS_B */
1346 <STM32_PINMUX('E', 14, ANALOG)>; /* SAI2_MCLK_B */
1347 };
1348 };
1349
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +02001350 sai2b_pins_b: sai2b-1 {
1351 pins {
1352 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1353 bias-disable;
1354 };
1355 };
1356
1357 sai2b_sleep_pins_b: sai2b-sleep-1 {
Patrick Delaunay48c5e902020-03-06 17:54:41 +01001358 pins {
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +02001359 pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
1360 };
1361 };
1362
Patrick Delaunay37868aa2021-12-17 16:30:22 +01001363 sai2b_pins_c: sai2b-2 {
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +02001364 pins1 {
Patrick Delaunay48c5e902020-03-06 17:54:41 +01001365 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1366 bias-disable;
1367 };
1368 };
1369
Patrick Delaunay37868aa2021-12-17 16:30:22 +01001370 sai2b_sleep_pins_c: sai2b-sleep-2 {
Patrick Delaunay48c5e902020-03-06 17:54:41 +01001371 pins {
1372 pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
1373 };
1374 };
1375
1376 sai4a_pins_a: sai4a-0 {
1377 pins {
1378 pinmux = <STM32_PINMUX('B', 5, AF10)>; /* SAI4_SD_A */
1379 slew-rate = <0>;
1380 drive-push-pull;
1381 bias-disable;
1382 };
1383 };
1384
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +02001385 sai4a_sleep_pins_a: sai4a-sleep-0 {
Patrick Delaunay48c5e902020-03-06 17:54:41 +01001386 pins {
1387 pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* SAI4_SD_A */
1388 };
1389 };
1390
1391 sdmmc1_b4_pins_a: sdmmc1-b4-0 {
1392 pins1 {
1393 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1394 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
1395 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
1396 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
1397 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
1398 slew-rate = <1>;
1399 drive-push-pull;
1400 bias-disable;
1401 };
1402 pins2 {
1403 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
1404 slew-rate = <2>;
1405 drive-push-pull;
1406 bias-disable;
1407 };
1408 };
1409
1410 sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
1411 pins1 {
1412 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1413 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
1414 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
1415 <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
1416 slew-rate = <1>;
1417 drive-push-pull;
1418 bias-disable;
1419 };
1420 pins2 {
1421 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
1422 slew-rate = <2>;
1423 drive-push-pull;
1424 bias-disable;
1425 };
1426 pins3 {
1427 pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
1428 slew-rate = <1>;
1429 drive-open-drain;
1430 bias-disable;
1431 };
1432 };
1433
Patrick Delaunaye48a0d42021-06-29 12:01:07 +02001434 sdmmc1_b4_init_pins_a: sdmmc1-b4-init-0 {
1435 pins1 {
1436 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1437 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
1438 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
1439 <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
1440 slew-rate = <1>;
1441 drive-push-pull;
1442 bias-disable;
1443 };
1444 };
1445
Patrick Delaunay48c5e902020-03-06 17:54:41 +01001446 sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
1447 pins {
1448 pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
1449 <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
1450 <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
1451 <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
1452 <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
1453 <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
1454 };
1455 };
1456
1457 sdmmc1_dir_pins_a: sdmmc1-dir-0 {
1458 pins1 {
1459 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
1460 <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
1461 <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
1462 slew-rate = <1>;
1463 drive-push-pull;
1464 bias-pull-up;
1465 };
1466 pins2{
1467 pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
1468 bias-pull-up;
1469 };
1470 };
1471
Patrick Delaunaye48a0d42021-06-29 12:01:07 +02001472 sdmmc1_dir_init_pins_a: sdmmc1-dir-init-0 {
1473 pins1 {
1474 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
1475 <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
1476 <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
1477 slew-rate = <1>;
1478 drive-push-pull;
1479 bias-pull-up;
1480 };
1481 };
1482
Patrick Delaunay48c5e902020-03-06 17:54:41 +01001483 sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 {
1484 pins {
1485 pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
1486 <STM32_PINMUX('C', 7, ANALOG)>, /* SDMMC1_D123DIR */
1487 <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
1488 <STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */
1489 };
1490 };
1491
Patrick Delaunay8aee15d2020-04-21 12:27:35 +02001492 sdmmc1_dir_pins_b: sdmmc1-dir-1 {
1493 pins1 {
1494 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +02001495 <STM32_PINMUX('E', 14, AF11)>, /* SDMMC1_D123DIR */
Patrick Delaunay8aee15d2020-04-21 12:27:35 +02001496 <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
1497 slew-rate = <1>;
1498 drive-push-pull;
1499 bias-pull-up;
1500 };
1501 pins2{
1502 pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
1503 bias-pull-up;
1504 };
1505 };
1506
1507 sdmmc1_dir_sleep_pins_b: sdmmc1-dir-sleep-1 {
1508 pins {
1509 pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +02001510 <STM32_PINMUX('E', 14, ANALOG)>, /* SDMMC1_D123DIR */
1511 <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
1512 <STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */
Patrick Delaunay8aee15d2020-04-21 12:27:35 +02001513 };
1514 };
1515
Patrick Delaunay48c5e902020-03-06 17:54:41 +01001516 sdmmc2_b4_pins_a: sdmmc2-b4-0 {
1517 pins1 {
1518 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1519 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
1520 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
1521 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
1522 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
1523 slew-rate = <1>;
1524 drive-push-pull;
1525 bias-pull-up;
1526 };
1527 pins2 {
1528 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1529 slew-rate = <2>;
1530 drive-push-pull;
1531 bias-pull-up;
1532 };
1533 };
1534
1535 sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
1536 pins1 {
1537 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1538 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
1539 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
1540 <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */
1541 slew-rate = <1>;
1542 drive-push-pull;
1543 bias-pull-up;
1544 };
1545 pins2 {
1546 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1547 slew-rate = <2>;
1548 drive-push-pull;
1549 bias-pull-up;
1550 };
1551 pins3 {
1552 pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
1553 slew-rate = <1>;
1554 drive-open-drain;
1555 bias-pull-up;
1556 };
1557 };
1558
1559 sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
1560 pins {
1561 pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
1562 <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC2_D1 */
1563 <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */
1564 <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */
1565 <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */
1566 <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */
1567 };
1568 };
1569
1570 sdmmc2_b4_pins_b: sdmmc2-b4-1 {
1571 pins1 {
1572 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1573 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
1574 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
1575 <STM32_PINMUX('B', 4, AF9)>, /* SDMMC2_D3 */
1576 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
1577 slew-rate = <1>;
1578 drive-push-pull;
1579 bias-disable;
1580 };
1581 pins2 {
1582 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1583 slew-rate = <2>;
1584 drive-push-pull;
1585 bias-disable;
1586 };
1587 };
1588
1589 sdmmc2_b4_od_pins_b: sdmmc2-b4-od-1 {
1590 pins1 {
1591 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1592 <STM32_PINMUX('B', 15, AF9)>, /* SDMMC2_D1 */
1593 <STM32_PINMUX('B', 3, AF9)>, /* SDMMC2_D2 */
1594 <STM32_PINMUX('B', 4, AF9)>; /* SDMMC2_D3 */
1595 slew-rate = <1>;
1596 drive-push-pull;
1597 bias-disable;
1598 };
1599 pins2 {
1600 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1601 slew-rate = <2>;
1602 drive-push-pull;
1603 bias-disable;
1604 };
1605 pins3 {
1606 pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
1607 slew-rate = <1>;
1608 drive-open-drain;
1609 bias-disable;
1610 };
1611 };
1612
1613 sdmmc2_d47_pins_a: sdmmc2-d47-0 {
1614 pins {
1615 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
1616 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
1617 <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
1618 <STM32_PINMUX('D', 3, AF9)>; /* SDMMC2_D7 */
1619 slew-rate = <1>;
1620 drive-push-pull;
1621 bias-pull-up;
1622 };
1623 };
1624
1625 sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 {
1626 pins {
1627 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1628 <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
1629 <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC2_D6 */
1630 <STM32_PINMUX('D', 3, ANALOG)>; /* SDMMC2_D7 */
1631 };
1632 };
1633
Patrick Delaunay8aee15d2020-04-21 12:27:35 +02001634 sdmmc2_d47_pins_b: sdmmc2-d47-1 {
1635 pins {
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +02001636 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
1637 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
1638 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
1639 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
1640 slew-rate = <1>;
1641 drive-push-pull;
1642 bias-disable;
1643 };
1644 };
1645
1646 sdmmc2_d47_sleep_pins_b: sdmmc2-d47-sleep-1 {
1647 pins {
1648 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1649 <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
1650 <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
1651 <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
1652 };
1653 };
1654
1655 sdmmc2_d47_pins_c: sdmmc2-d47-2 {
1656 pins {
Patrick Delaunay8aee15d2020-04-21 12:27:35 +02001657 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
1658 <STM32_PINMUX('A', 15, AF9)>, /* SDMMC2_D5 */
1659 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
1660 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
1661 slew-rate = <1>;
1662 drive-push-pull;
1663 bias-pull-up;
1664 };
1665 };
1666
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +02001667 sdmmc2_d47_sleep_pins_c: sdmmc2-d47-sleep-2 {
Patrick Delaunay8aee15d2020-04-21 12:27:35 +02001668 pins {
1669 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1670 <STM32_PINMUX('A', 15, ANALOG)>, /* SDMMC2_D5 */
1671 <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
1672 <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
1673 };
1674 };
1675
Patrick Delaunay6d397052021-01-11 12:33:36 +01001676 sdmmc2_d47_pins_d: sdmmc2-d47-3 {
1677 pins {
1678 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
1679 <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
1680 <STM32_PINMUX('E', 5, AF9)>, /* SDMMC2_D6 */
1681 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
1682 };
1683 };
1684
1685 sdmmc2_d47_sleep_pins_d: sdmmc2-d47-sleep-3 {
1686 pins {
1687 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1688 <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
1689 <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC2_D6 */
1690 <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
1691 };
1692 };
1693
Patrick Delaunay48c5e902020-03-06 17:54:41 +01001694 sdmmc3_b4_pins_a: sdmmc3-b4-0 {
1695 pins1 {
1696 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1697 <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
1698 <STM32_PINMUX('F', 5, AF9)>, /* SDMMC3_D2 */
1699 <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */
1700 <STM32_PINMUX('F', 1, AF9)>; /* SDMMC3_CMD */
1701 slew-rate = <1>;
1702 drive-push-pull;
1703 bias-pull-up;
1704 };
1705 pins2 {
1706 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1707 slew-rate = <2>;
1708 drive-push-pull;
1709 bias-pull-up;
1710 };
1711 };
1712
1713 sdmmc3_b4_od_pins_a: sdmmc3-b4-od-0 {
1714 pins1 {
1715 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1716 <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
1717 <STM32_PINMUX('F', 5, AF9)>, /* SDMMC3_D2 */
1718 <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */
1719 slew-rate = <1>;
1720 drive-push-pull;
1721 bias-pull-up;
1722 };
1723 pins2 {
1724 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1725 slew-rate = <2>;
1726 drive-push-pull;
1727 bias-pull-up;
1728 };
1729 pins3 {
1730 pinmux = <STM32_PINMUX('F', 1, AF9)>; /* SDMMC2_CMD */
1731 slew-rate = <1>;
1732 drive-open-drain;
1733 bias-pull-up;
1734 };
1735 };
1736
1737 sdmmc3_b4_sleep_pins_a: sdmmc3-b4-sleep-0 {
1738 pins {
1739 pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */
1740 <STM32_PINMUX('F', 4, ANALOG)>, /* SDMMC3_D1 */
1741 <STM32_PINMUX('F', 5, ANALOG)>, /* SDMMC3_D2 */
1742 <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */
1743 <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */
1744 <STM32_PINMUX('F', 1, ANALOG)>; /* SDMMC3_CMD */
1745 };
1746 };
1747
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +02001748 sdmmc3_b4_pins_b: sdmmc3-b4-1 {
1749 pins1 {
1750 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1751 <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
1752 <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
1753 <STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */
1754 <STM32_PINMUX('D', 0, AF10)>; /* SDMMC3_CMD */
1755 slew-rate = <1>;
1756 drive-push-pull;
1757 bias-pull-up;
1758 };
1759 pins2 {
1760 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1761 slew-rate = <2>;
1762 drive-push-pull;
1763 bias-pull-up;
1764 };
1765 };
1766
1767 sdmmc3_b4_od_pins_b: sdmmc3-b4-od-1 {
1768 pins1 {
1769 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
1770 <STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
1771 <STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
1772 <STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */
1773 slew-rate = <1>;
1774 drive-push-pull;
1775 bias-pull-up;
1776 };
1777 pins2 {
1778 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
1779 slew-rate = <2>;
1780 drive-push-pull;
1781 bias-pull-up;
1782 };
1783 pins3 {
1784 pinmux = <STM32_PINMUX('D', 0, AF10)>; /* SDMMC2_CMD */
1785 slew-rate = <1>;
1786 drive-open-drain;
1787 bias-pull-up;
1788 };
1789 };
1790
1791 sdmmc3_b4_sleep_pins_b: sdmmc3-b4-sleep-1 {
1792 pins {
1793 pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */
1794 <STM32_PINMUX('F', 4, ANALOG)>, /* SDMMC3_D1 */
1795 <STM32_PINMUX('D', 5, ANALOG)>, /* SDMMC3_D2 */
1796 <STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */
1797 <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */
1798 <STM32_PINMUX('D', 0, ANALOG)>; /* SDMMC3_CMD */
1799 };
1800 };
1801
Patrick Delaunay48c5e902020-03-06 17:54:41 +01001802 spdifrx_pins_a: spdifrx-0 {
1803 pins {
1804 pinmux = <STM32_PINMUX('G', 12, AF8)>; /* SPDIF_IN1 */
1805 bias-disable;
1806 };
1807 };
1808
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +02001809 spdifrx_sleep_pins_a: spdifrx-sleep-0 {
Patrick Delaunay48c5e902020-03-06 17:54:41 +01001810 pins {
1811 pinmux = <STM32_PINMUX('G', 12, ANALOG)>; /* SPDIF_IN1 */
1812 };
1813 };
1814
1815 spi2_pins_a: spi2-0 {
1816 pins1 {
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +02001817 pinmux = <STM32_PINMUX('B', 10, AF5)>, /* SPI1_SCK */
1818 <STM32_PINMUX('I', 3, AF5)>; /* SPI1_MOSI */
Patrick Delaunay48c5e902020-03-06 17:54:41 +01001819 bias-disable;
1820 drive-push-pull;
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +02001821 slew-rate = <1>;
Patrick Delaunay48c5e902020-03-06 17:54:41 +01001822 };
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +02001823
Patrick Delaunay48c5e902020-03-06 17:54:41 +01001824 pins2 {
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +02001825 pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI1_MISO */
Patrick Delaunay48c5e902020-03-06 17:54:41 +01001826 bias-disable;
1827 };
1828 };
1829
Marek Vasut75f5e9c2022-06-13 11:55:20 +02001830 spi2_pins_b: spi2-1 {
1831 pins1 {
1832 pinmux = <STM32_PINMUX('I', 1, AF5)>, /* SPI1_SCK */
1833 <STM32_PINMUX('I', 3, AF5)>; /* SPI1_MOSI */
1834 bias-disable;
1835 drive-push-pull;
1836 slew-rate = <1>;
1837 };
1838
1839 pins2 {
1840 pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI1_MISO */
1841 bias-disable;
1842 };
1843 };
1844
Patrick Delaunay551efca2020-09-16 10:01:32 +02001845 spi4_pins_a: spi4-0 {
1846 pins {
1847 pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */
1848 <STM32_PINMUX('E', 6, AF5)>; /* SPI4_MOSI */
1849 bias-disable;
1850 drive-push-pull;
1851 slew-rate = <1>;
1852 };
1853 pins2 {
1854 pinmux = <STM32_PINMUX('E', 13, AF5)>; /* SPI4_MISO */
1855 bias-disable;
1856 };
1857 };
1858
Patrick Delaunay48c5e902020-03-06 17:54:41 +01001859 stusb1600_pins_a: stusb1600-0 {
Patrick Delaunay6d397052021-01-11 12:33:36 +01001860 pins {
Patrick Delaunayb3f8d832022-01-31 16:07:54 +01001861 pinmux = <STM32_PINMUX('I', 11, GPIO)>;
Patrick Delaunay6d397052021-01-11 12:33:36 +01001862 bias-pull-up;
Patrick Delaunay48c5e902020-03-06 17:54:41 +01001863 };
1864 };
1865
Patrick Delaunay551efca2020-09-16 10:01:32 +02001866 uart4_pins_a: uart4-0 {
1867 pins1 {
1868 pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
1869 bias-disable;
1870 drive-push-pull;
1871 slew-rate = <0>;
1872 };
1873 pins2 {
1874 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1875 bias-disable;
1876 };
1877 };
1878
1879 uart4_idle_pins_a: uart4-idle-0 {
Patrick Delaunayb3f8d832022-01-31 16:07:54 +01001880 pins1 {
1881 pinmux = <STM32_PINMUX('G', 11, ANALOG)>; /* UART4_TX */
1882 };
1883 pins2 {
1884 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1885 bias-disable;
1886 };
Patrick Delaunay551efca2020-09-16 10:01:32 +02001887 };
1888
1889 uart4_sleep_pins_a: uart4-sleep-0 {
Patrick Delaunayb3f8d832022-01-31 16:07:54 +01001890 pins {
Patrick Delaunay551efca2020-09-16 10:01:32 +02001891 pinmux = <STM32_PINMUX('G', 11, ANALOG)>, /* UART4_TX */
1892 <STM32_PINMUX('B', 2, ANALOG)>; /* UART4_RX */
Patrick Delaunayb3f8d832022-01-31 16:07:54 +01001893 };
Patrick Delaunay551efca2020-09-16 10:01:32 +02001894 };
1895
1896 uart4_pins_b: uart4-1 {
1897 pins1 {
1898 pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */
1899 bias-disable;
1900 drive-push-pull;
1901 slew-rate = <0>;
1902 };
1903 pins2 {
1904 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1905 bias-disable;
1906 };
1907 };
1908
1909 uart4_pins_c: uart4-2 {
1910 pins1 {
1911 pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
1912 bias-disable;
1913 drive-push-pull;
1914 slew-rate = <0>;
1915 };
1916 pins2 {
1917 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1918 bias-disable;
1919 };
1920 };
1921
Marek Vasut8c35f982022-06-13 11:55:17 +02001922 uart4_pins_d: uart4-3 {
1923 pins1 {
1924 pinmux = <STM32_PINMUX('A', 13, AF8)>; /* UART4_TX */
1925 bias-disable;
1926 drive-push-pull;
1927 slew-rate = <0>;
1928 };
1929 pins2 {
1930 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1931 bias-disable;
1932 };
1933 };
1934
1935 uart4_idle_pins_d: uart4-idle-3 {
1936 pins1 {
1937 pinmux = <STM32_PINMUX('A', 13, ANALOG)>; /* UART4_TX */
1938 };
1939 pins2 {
1940 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
1941 bias-disable;
1942 };
1943 };
1944
1945 uart4_sleep_pins_d: uart4-sleep-3 {
1946 pins {
1947 pinmux = <STM32_PINMUX('A', 13, ANALOG)>, /* UART4_TX */
1948 <STM32_PINMUX('B', 2, ANALOG)>; /* UART4_RX */
1949 };
1950 };
1951
Marek Vasut17e5e562022-06-13 11:55:18 +02001952 uart5_pins_a: uart5-0 {
1953 pins1 {
1954 pinmux = <STM32_PINMUX('B', 13, AF14)>; /* UART5_TX */
1955 bias-disable;
1956 drive-push-pull;
1957 slew-rate = <0>;
1958 };
1959 pins2 {
1960 pinmux = <STM32_PINMUX('B', 5, AF12)>; /* UART5_RX */
1961 bias-disable;
1962 };
1963 };
1964
Patrick Delaunay551efca2020-09-16 10:01:32 +02001965 uart7_pins_a: uart7-0 {
1966 pins1 {
1967 pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
1968 bias-disable;
1969 drive-push-pull;
1970 slew-rate = <0>;
1971 };
1972 pins2 {
1973 pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART7_RX */
1974 <STM32_PINMUX('E', 10, AF7)>, /* UART7_CTS */
1975 <STM32_PINMUX('E', 9, AF7)>; /* UART7_RTS */
1976 bias-disable;
1977 };
1978 };
1979
1980 uart7_pins_b: uart7-1 {
1981 pins1 {
1982 pinmux = <STM32_PINMUX('F', 7, AF7)>; /* UART7_TX */
1983 bias-disable;
1984 drive-push-pull;
1985 slew-rate = <0>;
1986 };
1987 pins2 {
1988 pinmux = <STM32_PINMUX('F', 6, AF7)>; /* UART7_RX */
1989 bias-disable;
1990 };
1991 };
1992
1993 uart7_pins_c: uart7-2 {
1994 pins1 {
1995 pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
1996 bias-disable;
1997 drive-push-pull;
1998 slew-rate = <0>;
1999 };
2000 pins2 {
2001 pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */
Patrick Delaunayb3f8d832022-01-31 16:07:54 +01002002 bias-pull-up;
Patrick Delaunay551efca2020-09-16 10:01:32 +02002003 };
2004 };
2005
2006 uart7_idle_pins_c: uart7-idle-2 {
2007 pins1 {
2008 pinmux = <STM32_PINMUX('E', 8, ANALOG)>; /* UART7_TX */
2009 };
2010 pins2 {
2011 pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */
Patrick Delaunayb3f8d832022-01-31 16:07:54 +01002012 bias-pull-up;
Patrick Delaunay551efca2020-09-16 10:01:32 +02002013 };
2014 };
2015
2016 uart7_sleep_pins_c: uart7-sleep-2 {
2017 pins {
2018 pinmux = <STM32_PINMUX('E', 8, ANALOG)>, /* UART7_TX */
2019 <STM32_PINMUX('E', 7, ANALOG)>; /* UART7_RX */
2020 };
2021 };
2022
2023 uart8_pins_a: uart8-0 {
2024 pins1 {
2025 pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
2026 bias-disable;
2027 drive-push-pull;
2028 slew-rate = <0>;
2029 };
2030 pins2 {
2031 pinmux = <STM32_PINMUX('E', 0, AF8)>; /* UART8_RX */
2032 bias-disable;
2033 };
2034 };
2035
Patrick Delaunay6d397052021-01-11 12:33:36 +01002036 uart8_rtscts_pins_a: uart8rtscts-0 {
2037 pins {
2038 pinmux = <STM32_PINMUX('G', 7, AF8)>, /* UART8_RTS */
2039 <STM32_PINMUX('G', 10, AF8)>; /* UART8_CTS */
2040 bias-disable;
2041 };
2042 };
2043
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +02002044 usart2_pins_a: usart2-0 {
2045 pins1 {
2046 pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
2047 <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
2048 bias-disable;
2049 drive-push-pull;
2050 slew-rate = <0>;
2051 };
2052 pins2 {
2053 pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
2054 <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
2055 bias-disable;
2056 };
2057 };
2058
2059 usart2_sleep_pins_a: usart2-sleep-0 {
2060 pins {
2061 pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */
2062 <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */
2063 <STM32_PINMUX('D', 6, ANALOG)>, /* USART2_RX */
2064 <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */
2065 };
2066 };
2067
2068 usart2_pins_b: usart2-1 {
2069 pins1 {
2070 pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
2071 <STM32_PINMUX('A', 1, AF7)>; /* USART2_RTS */
2072 bias-disable;
2073 drive-push-pull;
2074 slew-rate = <0>;
2075 };
2076 pins2 {
2077 pinmux = <STM32_PINMUX('F', 4, AF7)>, /* USART2_RX */
2078 <STM32_PINMUX('E', 15, AF7)>; /* USART2_CTS_NSS */
2079 bias-disable;
2080 };
2081 };
2082
2083 usart2_sleep_pins_b: usart2-sleep-1 {
2084 pins {
2085 pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */
2086 <STM32_PINMUX('A', 1, ANALOG)>, /* USART2_RTS */
2087 <STM32_PINMUX('F', 4, ANALOG)>, /* USART2_RX */
2088 <STM32_PINMUX('E', 15, ANALOG)>; /* USART2_CTS_NSS */
2089 };
2090 };
2091
Patrick Delaunay551efca2020-09-16 10:01:32 +02002092 usart2_pins_c: usart2-2 {
2093 pins1 {
2094 pinmux = <STM32_PINMUX('D', 5, AF7)>, /* USART2_TX */
2095 <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
2096 bias-disable;
2097 drive-push-pull;
2098 slew-rate = <3>;
2099 };
2100 pins2 {
2101 pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
2102 <STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
2103 bias-disable;
2104 };
2105 };
2106
2107 usart2_idle_pins_c: usart2-idle-2 {
2108 pins1 {
2109 pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */
Patrick Delaunay551efca2020-09-16 10:01:32 +02002110 <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */
2111 };
2112 pins2 {
Patrick Delaunaye48a0d42021-06-29 12:01:07 +02002113 pinmux = <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
2114 bias-disable;
2115 drive-push-pull;
2116 slew-rate = <3>;
2117 };
2118 pins3 {
Patrick Delaunay551efca2020-09-16 10:01:32 +02002119 pinmux = <STM32_PINMUX('D', 6, AF7)>; /* USART2_RX */
2120 bias-disable;
2121 };
2122 };
2123
2124 usart2_sleep_pins_c: usart2-sleep-2 {
2125 pins {
2126 pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */
2127 <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */
2128 <STM32_PINMUX('D', 6, ANALOG)>, /* USART2_RX */
2129 <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */
2130 };
2131 };
2132
Patrick Delaunaydf0d20a2020-04-30 15:52:46 +02002133 usart3_pins_a: usart3-0 {
2134 pins1 {
2135 pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */
2136 bias-disable;
2137 drive-push-pull;
2138 slew-rate = <0>;
2139 };
2140 pins2 {
Patrick Delaunay551efca2020-09-16 10:01:32 +02002141 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
2142 bias-disable;
2143 };
2144 };
2145
2146 usart3_pins_b: usart3-1 {
2147 pins1 {
2148 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
2149 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2150 bias-disable;
2151 drive-push-pull;
2152 slew-rate = <0>;
2153 };
2154 pins2 {
2155 pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
2156 <STM32_PINMUX('I', 10, AF8)>; /* USART3_CTS_NSS */
Patrick Delaunayb3f8d832022-01-31 16:07:54 +01002157 bias-pull-up;
Patrick Delaunay551efca2020-09-16 10:01:32 +02002158 };
2159 };
2160
2161 usart3_idle_pins_b: usart3-idle-1 {
2162 pins1 {
2163 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
Patrick Delaunay551efca2020-09-16 10:01:32 +02002164 <STM32_PINMUX('I', 10, ANALOG)>; /* USART3_CTS_NSS */
2165 };
2166 pins2 {
Patrick Delaunaye48a0d42021-06-29 12:01:07 +02002167 pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2168 bias-disable;
2169 drive-push-pull;
2170 slew-rate = <0>;
2171 };
2172 pins3 {
Patrick Delaunay551efca2020-09-16 10:01:32 +02002173 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
Patrick Delaunayb3f8d832022-01-31 16:07:54 +01002174 bias-pull-up;
Patrick Delaunay551efca2020-09-16 10:01:32 +02002175 };
2176 };
2177
2178 usart3_sleep_pins_b: usart3-sleep-1 {
2179 pins {
2180 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2181 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
2182 <STM32_PINMUX('I', 10, ANALOG)>, /* USART3_CTS_NSS */
2183 <STM32_PINMUX('B', 12, ANALOG)>; /* USART3_RX */
2184 };
2185 };
2186
2187 usart3_pins_c: usart3-2 {
2188 pins1 {
2189 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
2190 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2191 bias-disable;
2192 drive-push-pull;
2193 slew-rate = <0>;
2194 };
2195 pins2 {
2196 pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
2197 <STM32_PINMUX('B', 13, AF7)>; /* USART3_CTS_NSS */
Patrick Delaunayb3f8d832022-01-31 16:07:54 +01002198 bias-pull-up;
Patrick Delaunay551efca2020-09-16 10:01:32 +02002199 };
2200 };
2201
2202 usart3_idle_pins_c: usart3-idle-2 {
2203 pins1 {
2204 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
Patrick Delaunay551efca2020-09-16 10:01:32 +02002205 <STM32_PINMUX('B', 13, ANALOG)>; /* USART3_CTS_NSS */
2206 };
2207 pins2 {
Patrick Delaunaye48a0d42021-06-29 12:01:07 +02002208 pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2209 bias-disable;
2210 drive-push-pull;
2211 slew-rate = <0>;
2212 };
2213 pins3 {
Patrick Delaunaydf0d20a2020-04-30 15:52:46 +02002214 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
Patrick Delaunayb3f8d832022-01-31 16:07:54 +01002215 bias-pull-up;
Patrick Delaunaydf0d20a2020-04-30 15:52:46 +02002216 };
2217 };
2218
Patrick Delaunay551efca2020-09-16 10:01:32 +02002219 usart3_sleep_pins_c: usart3-sleep-2 {
2220 pins {
2221 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2222 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
2223 <STM32_PINMUX('B', 13, ANALOG)>, /* USART3_CTS_NSS */
2224 <STM32_PINMUX('B', 12, ANALOG)>; /* USART3_RX */
2225 };
2226 };
2227
Patrick Delaunay6f182192022-04-26 15:38:05 +02002228 usart3_pins_d: usart3-3 {
2229 pins1 {
2230 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
2231 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2232 bias-disable;
2233 drive-push-pull;
2234 slew-rate = <0>;
2235 };
2236 pins2 {
2237 pinmux = <STM32_PINMUX('D', 9, AF7)>, /* USART3_RX */
2238 <STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */
2239 bias-disable;
2240 };
2241 };
2242
2243 usart3_idle_pins_d: usart3-idle-3 {
2244 pins1 {
2245 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2246 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
2247 <STM32_PINMUX('D', 11, ANALOG)>; /* USART3_CTS_NSS */
2248 };
2249 pins2 {
2250 pinmux = <STM32_PINMUX('D', 9, AF7)>; /* USART3_RX */
2251 bias-disable;
2252 };
2253 };
2254
2255 usart3_sleep_pins_d: usart3-sleep-3 {
2256 pins {
2257 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2258 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
2259 <STM32_PINMUX('D', 11, ANALOG)>, /* USART3_CTS_NSS */
2260 <STM32_PINMUX('D', 9, ANALOG)>; /* USART3_RX */
2261 };
2262 };
2263
Marek Vasutadbb8302022-06-13 11:55:16 +02002264 usart3_pins_e: usart3-4 {
2265 pins1 {
2266 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
2267 <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2268 bias-disable;
2269 drive-push-pull;
2270 slew-rate = <0>;
2271 };
2272 pins2 {
2273 pinmux = <STM32_PINMUX('B', 11, AF7)>, /* USART3_RX */
2274 <STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */
2275 bias-pull-up;
2276 };
2277 };
2278
2279 usart3_idle_pins_e: usart3-idle-4 {
2280 pins1 {
2281 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2282 <STM32_PINMUX('D', 11, ANALOG)>; /* USART3_CTS_NSS */
2283 };
2284 pins2 {
2285 pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2286 bias-disable;
2287 drive-push-pull;
2288 slew-rate = <0>;
2289 };
2290 pins3 {
2291 pinmux = <STM32_PINMUX('B', 11, AF7)>; /* USART3_RX */
2292 bias-pull-up;
2293 };
2294 };
2295
2296 usart3_sleep_pins_e: usart3-sleep-4 {
2297 pins {
2298 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2299 <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */
2300 <STM32_PINMUX('D', 11, ANALOG)>, /* USART3_CTS_NSS */
2301 <STM32_PINMUX('B', 11, ANALOG)>; /* USART3_RX */
2302 };
2303 };
2304
Patrick Delaunaydf0d20a2020-04-30 15:52:46 +02002305 usbotg_hs_pins_a: usbotg-hs-0 {
2306 pins {
2307 pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
2308 };
2309 };
2310
2311 usbotg_fs_dp_dm_pins_a: usbotg-fs-dp-dm-0 {
2312 pins {
2313 pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* OTG_FS_DM */
2314 <STM32_PINMUX('A', 12, ANALOG)>; /* OTG_FS_DP */
Patrick Delaunay48c5e902020-03-06 17:54:41 +01002315 };
2316 };
2317};
2318
2319&pinctrl_z {
2320 i2c2_pins_b2: i2c2-0 {
2321 pins {
2322 pinmux = <STM32_PINMUX('Z', 0, AF3)>; /* I2C2_SCL */
2323 bias-disable;
2324 drive-open-drain;
2325 slew-rate = <0>;
2326 };
2327 };
2328
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +02002329 i2c2_sleep_pins_b2: i2c2-sleep-0 {
Patrick Delaunay48c5e902020-03-06 17:54:41 +01002330 pins {
2331 pinmux = <STM32_PINMUX('Z', 0, ANALOG)>; /* I2C2_SCL */
2332 };
2333 };
2334
2335 i2c4_pins_a: i2c4-0 {
2336 pins {
2337 pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
2338 <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */
2339 bias-disable;
2340 drive-open-drain;
2341 slew-rate = <0>;
2342 };
2343 };
2344
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +02002345 i2c4_sleep_pins_a: i2c4-sleep-0 {
Patrick Delaunay48c5e902020-03-06 17:54:41 +01002346 pins {
2347 pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C4_SCL */
2348 <STM32_PINMUX('Z', 5, ANALOG)>; /* I2C4_SDA */
2349 };
2350 };
2351
Patrick Delaunaye48a0d42021-06-29 12:01:07 +02002352 i2c6_pins_a: i2c6-0 {
2353 pins {
2354 pinmux = <STM32_PINMUX('Z', 6, AF2)>, /* I2C6_SCL */
2355 <STM32_PINMUX('Z', 7, AF2)>; /* I2C6_SDA */
2356 bias-disable;
2357 drive-open-drain;
2358 slew-rate = <0>;
2359 };
2360 };
2361
2362 i2c6_sleep_pins_a: i2c6-sleep-0 {
2363 pins {
2364 pinmux = <STM32_PINMUX('Z', 6, ANALOG)>, /* I2C6_SCL */
2365 <STM32_PINMUX('Z', 7, ANALOG)>; /* I2C6_SDA */
2366 };
2367 };
2368
Patrick Delaunay48c5e902020-03-06 17:54:41 +01002369 spi1_pins_a: spi1-0 {
2370 pins1 {
2371 pinmux = <STM32_PINMUX('Z', 0, AF5)>, /* SPI1_SCK */
2372 <STM32_PINMUX('Z', 2, AF5)>; /* SPI1_MOSI */
2373 bias-disable;
2374 drive-push-pull;
2375 slew-rate = <1>;
2376 };
2377
2378 pins2 {
2379 pinmux = <STM32_PINMUX('Z', 1, AF5)>; /* SPI1_MISO */
2380 bias-disable;
2381 };
2382 };
Patrick Delaunaye25cbd42022-07-05 16:55:54 +02002383
2384 spi1_pins_b: spi1-1 {
2385 pins1 {
2386 pinmux = <STM32_PINMUX('A', 5, AF5)>, /* SPI1_SCK */
2387 <STM32_PINMUX('B', 5, AF5)>; /* SPI1_MOSI */
2388 bias-disable;
2389 drive-push-pull;
2390 slew-rate = <1>;
2391 };
2392
2393 pins2 {
2394 pinmux = <STM32_PINMUX('A', 6, AF5)>; /* SPI1_MISO */
2395 bias-disable;
2396 };
2397 };
Patrick Delaunay48c5e902020-03-06 17:54:41 +01002398};