blob: 88a7310cec6de5780856e95609fec19bbae6ba8b [file] [log] [blame]
wdenk914be132004-06-08 00:22:43 +00001/*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 *
6 * (C) Copyright 2002
7 * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
8 *
9 * (C) Copyright 2003
10 * Texas Instruments, <www.ti.com>
11 * Kshitij Gupta <Kshitij@ti.com>
12 *
13 * (C) Copyright 2004
14 * Texas Instruments, <www.ti.com>
15 * Rishi Bhattacharya <rishi@ti.com>
16 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +020017 * SPDX-License-Identifier: GPL-2.0+
wdenk914be132004-06-08 00:22:43 +000018 */
19
20#include <common.h>
Ben Warrenf0e37d12009-12-14 16:30:39 -080021#include <netdev.h>
wdenk914be132004-06-08 00:22:43 +000022#if defined(CONFIG_OMAP1610)
23#include <./configs/omap1510.h>
24#endif
25
Wolfgang Denk6405a152006-03-31 18:32:53 +020026DECLARE_GLOBAL_DATA_PTR;
27
wdenk914be132004-06-08 00:22:43 +000028void flash__init (void);
29void ether__init (void);
30void set_muxconf_regs (void);
31void peripheral_power_enable (void);
32
33#define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
34
35static inline void delay (unsigned long loops)
36{
37 __asm__ volatile ("1:\n"
38 "subs %0, %1, #1\n"
39 "bne 1b":"=r" (loops):"0" (loops));
40}
41
42/*
43 * Miscellaneous platform dependent initialisations
44 */
45
46int board_init (void)
47{
wdenk767fbd42004-10-10 18:41:04 +000048 gd->bd->bi_arch_number = MACH_TYPE_OMAP_OSK;
wdenk914be132004-06-08 00:22:43 +000049
50 /* adress of boot parameters */
51 gd->bd->bi_boot_params = 0x10000100;
52
Jon Hunterea3814a2013-04-09 16:41:31 -050053 flash__init();
54 ether__init();
55
56 return 0;
57}
58
59void s_init(void)
60{
wdenk914be132004-06-08 00:22:43 +000061 /* Configure MUX settings */
62 set_muxconf_regs ();
63 peripheral_power_enable ();
64
65/* this speeds up your boot a quite a bit. However to make it
66 * work, you need make sure your kernel startup flush bug is fixed.
67 * ... rkw ...
68 */
69 icache_enable ();
wdenk914be132004-06-08 00:22:43 +000070}
71
wdenk914be132004-06-08 00:22:43 +000072/******************************
73 Routine:
74 Description:
75******************************/
76void flash__init (void)
77{
78#define EMIFS_GlB_Config_REG 0xfffecc0c
79 unsigned int regval;
80 regval = *((volatile unsigned int *) EMIFS_GlB_Config_REG);
81 /* Turn off write protection for flash devices. */
82 regval = regval | 0x0001;
83 *((volatile unsigned int *) EMIFS_GlB_Config_REG) = regval;
84}
85/*************************************************************
86 Routine:ether__init
87 Description: take the Ethernet controller out of reset and wait
88 for the EEPROM load to complete.
89*************************************************************/
90void ether__init (void)
91{
92#define ETH_CONTROL_REG 0x0480000b
93 int i;
94
95 *((volatile unsigned short *) 0xfffece08) = 0x03FF;
96 *((volatile unsigned short *) 0xfffb3824) = 0x8000;
97 *((volatile unsigned short *) 0xfffb3830) = 0x0000;
98 *((volatile unsigned short *) 0xfffb3834) = 0x0009;
99 *((volatile unsigned short *) 0xfffb3838) = 0x0009;
100 *((volatile unsigned short *) 0xfffb3818) = 0x0002;
101 *((volatile unsigned short *) 0xfffb382C) = 0x0048;
102 *((volatile unsigned short *) 0xfffb3824) = 0x8603;
103 udelay (3);
104 for (i=0;i<2000;i++);
105 *((volatile unsigned short *) 0xfffb381C) = 0x6610;
106 udelay (30);
107 for (i=0;i<10000;i++);
108
109 *((volatile unsigned char *) ETH_CONTROL_REG) &= ~0x01;
110 udelay (3);
111
112
113}
114
115/******************************
116 Routine:
117 Description:
118******************************/
Jon Hunterb3060cb2013-04-09 16:41:29 -0500119int dram_init(void)
wdenk914be132004-06-08 00:22:43 +0000120{
Jon Hunterb3060cb2013-04-09 16:41:29 -0500121 gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
wdenk914be132004-06-08 00:22:43 +0000122
123 return 0;
124}
125
Jon Hunterb3060cb2013-04-09 16:41:29 -0500126void dram_init_banksize(void)
127{
128 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
129 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
130}
131
wdenk914be132004-06-08 00:22:43 +0000132/******************************************************
133 Routine: set_muxconf_regs
134 Description: Setting up the configuration Mux registers
135 specific to the hardware
136*******************************************************/
137void set_muxconf_regs (void)
138{
139 volatile unsigned int *MuxConfReg;
140 /* set each registers to its reset value; */
141 MuxConfReg =
142 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0);
143 /* setup for UART1 */
144 *MuxConfReg &= ~(0x02000000); /* bit 25 */
145 /* setup for UART2 */
146 *MuxConfReg &= ~(0x01000000); /* bit 24 */
147 /* Disable Uwire CS Hi-Z */
148 *MuxConfReg |= 0x08000000;
149 MuxConfReg =
150 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_3);
151 *MuxConfReg = 0x00000000;
152 MuxConfReg =
153 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_4);
154 *MuxConfReg = 0x00000000;
155 MuxConfReg =
156 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_5);
157 *MuxConfReg = 0x00000000;
158 MuxConfReg =
159 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_6);
160 /*setup mux for UART3 */
161 *MuxConfReg |= 0x00000001; /* bit3, 1, 0 (mux0 5,5,26) */
162 *MuxConfReg &= ~0x0000003e;
163 MuxConfReg =
164 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_7);
165 *MuxConfReg = 0x00000000;
166 MuxConfReg =
167 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_8);
168 /* Disable Uwire CS Hi-Z */
169 *MuxConfReg |= 0x00001200; /*bit 9 for CS0 12 for CS3 */
170 MuxConfReg =
171 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_9);
172 /* Need to turn on bits 21 and 12 in FUNC_MUX_CTRL_9 so the */
173 /* hardware will actually use TX and RTS based on bit 25 in */
174 /* FUNC_MUX_CTRL_0. I told you this thing was screwy! */
175 *MuxConfReg |= 0x00201000;
176 MuxConfReg =
177 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_A);
178 *MuxConfReg = 0x00000000;
179 MuxConfReg =
180 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_B);
181 *MuxConfReg = 0x00000000;
182 MuxConfReg =
183 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_C);
184 /* setup for UART2 */
185 /* Need to turn on bits 27 and 24 in FUNC_MUX_CTRL_C so the */
186 /* hardware will actually use TX and RTS based on bit 24 in */
187 /* FUNC_MUX_CTRL_0. */
188 *MuxConfReg |= 0x09000000;
189 MuxConfReg =
190 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_D);
191 *MuxConfReg |= 0x00000020;
192 MuxConfReg =
193 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_0);
194 *MuxConfReg = 0x00000000;
195 MuxConfReg =
196 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_1);
197 *MuxConfReg = 0x00000000;
198 /* mux setup for SD/MMC driver */
199 MuxConfReg =
200 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_2);
201 *MuxConfReg &= 0xFFFE0FFF;
202 MuxConfReg =
203 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_3);
204 *MuxConfReg = 0x00000000;
205 MuxConfReg =
206 (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
207 /* bit 13 for MMC2 XOR_CLK */
208 *MuxConfReg &= ~(0x00002000);
209 /* bit 29 for UART 1 */
210 *MuxConfReg &= ~(0x00002000);
211 MuxConfReg =
212 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0);
213 /* Configure for USB. Turn on VBUS_CTRL and VBUS_MODE. */
214 *MuxConfReg |= 0x000C0000;
215 MuxConfReg =
216 (volatile unsigned int *) ((unsigned int)USB_TRANSCEIVER_CTRL);
217 *MuxConfReg &= ~(0x00000070);
218 *MuxConfReg &= ~(0x00000008);
219 *MuxConfReg |= 0x00000003;
220 *MuxConfReg |= 0x00000180;
221 MuxConfReg =
222 (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
223 /* bit 17, software controls VBUS */
224 *MuxConfReg &= ~(0x00020000);
225 /* Enable USB 48 and 12M clocks */
226 *MuxConfReg |= 0x00000200;
227 *MuxConfReg &= ~(0x00000180);
228 /*2.75V for MMCSDIO1 */
229 MuxConfReg =
230 (volatile unsigned int *) ((unsigned int) VOLTAGE_CTRL_0);
231 *MuxConfReg = 0x00001FE7;
232 MuxConfReg =
233 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_0);
234 *MuxConfReg = 0x00000000;
235 MuxConfReg =
236 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_1);
237 *MuxConfReg = 0x00000000;
238 MuxConfReg =
239 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_2);
240 *MuxConfReg = 0x00000000;
241 MuxConfReg =
242 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_3);
243 *MuxConfReg = 0x00000000;
244 MuxConfReg =
245 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_4);
246 *MuxConfReg = 0x00000000;
247 MuxConfReg =
248 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_4);
249 *MuxConfReg = 0x00000000;
250 /* Turn on UART2 48 MHZ clock */
251 MuxConfReg =
252 (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
253 *MuxConfReg |= 0x40000000;
254 MuxConfReg =
255 (volatile unsigned int *) ((unsigned int) USB_OTG_CTRL);
256 /* setup for USB VBus detection OMAP161x */
257 *MuxConfReg |= 0x00040000; /* bit 18 */
258 MuxConfReg =
259 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_2);
260 /* PullUps for SD/MMC driver */
261 *MuxConfReg |= ~(0xFFFE0FFF);
262 MuxConfReg =
263 (volatile unsigned int *) ((unsigned int)COMP_MODE_CTRL_0);
264 *MuxConfReg = COMP_MODE_ENABLE;
265}
266
267/******************************************************
268 Routine: peripheral_power_enable
269 Description: Enable the power for UART1
270*******************************************************/
271void peripheral_power_enable (void)
272{
273#define UART1_48MHZ_ENABLE ((unsigned short)0x0200)
274#define SW_CLOCK_REQUEST ((volatile unsigned short *)0xFFFE0834)
275
276 *SW_CLOCK_REQUEST |= UART1_48MHZ_ENABLE;
277}
Stefan Roese0df367f2006-05-10 10:55:16 +0200278
279/*
280 * Check Board Identity
281 */
282int checkboard(void)
283{
Wolfgang Denk5c1cfee2011-05-04 10:32:28 +0000284 char buf[64];
285 int i = getenv_f("serial#", buf, sizeof(buf));
Stefan Roese0df367f2006-05-10 10:55:16 +0200286
287 puts("Board: OSK5912");
288
Wolfgang Denk5c1cfee2011-05-04 10:32:28 +0000289 if (i > 0) {
Stefan Roese0df367f2006-05-10 10:55:16 +0200290 puts(", serial# ");
Wolfgang Denk5c1cfee2011-05-04 10:32:28 +0000291 puts(buf);
Stefan Roese0df367f2006-05-10 10:55:16 +0200292 }
293 putc('\n');
294
295 return (0);
296}
Ben Warrenf0e37d12009-12-14 16:30:39 -0800297
298#ifdef CONFIG_CMD_NET
299int board_eth_init(bd_t *bis)
300{
301 int rc = 0;
302#ifdef CONFIG_LAN91C96
303 rc = lan91c96_initialize(0, CONFIG_LAN91C96_BASE);
304#endif
305 return rc;
306}
307#endif