blob: e9e6b0e794dc54c8f5b924677f3982782c1334ce [file] [log] [blame]
wdenk914be132004-06-08 00:22:43 +00001/*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 *
6 * (C) Copyright 2002
7 * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
8 *
9 * (C) Copyright 2003
10 * Texas Instruments, <www.ti.com>
11 * Kshitij Gupta <Kshitij@ti.com>
12 *
13 * (C) Copyright 2004
14 * Texas Instruments, <www.ti.com>
15 * Rishi Bhattacharya <rishi@ti.com>
16 *
17 * See file CREDITS for list of people who contributed to this
18 * project.
19 *
20 * This program is free software; you can redistribute it and/or
21 * modify it under the terms of the GNU General Public License as
22 * published by the Free Software Foundation; either version 2 of
23 * the License, or (at your option) any later version.
24 *
25 * This program is distributed in the hope that it will be useful,
26 * but WITHOUT ANY WARRANTY; without even the implied warranty of
27 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
28 * GNU General Public License for more details.
29 *
30 * You should have received a copy of the GNU General Public License
31 * along with this program; if not, write to the Free Software
32 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
33 * MA 02111-1307 USA
34 */
35
36#include <common.h>
37#if defined(CONFIG_OMAP1610)
38#include <./configs/omap1510.h>
39#endif
40
Wolfgang Denk6405a152006-03-31 18:32:53 +020041DECLARE_GLOBAL_DATA_PTR;
42
wdenk914be132004-06-08 00:22:43 +000043void flash__init (void);
44void ether__init (void);
45void set_muxconf_regs (void);
46void peripheral_power_enable (void);
47
48#define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
49
50static inline void delay (unsigned long loops)
51{
52 __asm__ volatile ("1:\n"
53 "subs %0, %1, #1\n"
54 "bne 1b":"=r" (loops):"0" (loops));
55}
56
57/*
58 * Miscellaneous platform dependent initialisations
59 */
60
61int board_init (void)
62{
wdenk767fbd42004-10-10 18:41:04 +000063 gd->bd->bi_arch_number = MACH_TYPE_OMAP_OSK;
wdenk914be132004-06-08 00:22:43 +000064
65 /* adress of boot parameters */
66 gd->bd->bi_boot_params = 0x10000100;
67
68 /* Configure MUX settings */
69 set_muxconf_regs ();
70 peripheral_power_enable ();
71
72/* this speeds up your boot a quite a bit. However to make it
73 * work, you need make sure your kernel startup flush bug is fixed.
74 * ... rkw ...
75 */
76 icache_enable ();
77
78 flash__init ();
79 ether__init ();
80 return 0;
81}
82
83
84int misc_init_r (void)
85{
86 /* currently empty */
87 return (0);
88}
89
90/******************************
91 Routine:
92 Description:
93******************************/
94void flash__init (void)
95{
96#define EMIFS_GlB_Config_REG 0xfffecc0c
97 unsigned int regval;
98 regval = *((volatile unsigned int *) EMIFS_GlB_Config_REG);
99 /* Turn off write protection for flash devices. */
100 regval = regval | 0x0001;
101 *((volatile unsigned int *) EMIFS_GlB_Config_REG) = regval;
102}
103/*************************************************************
104 Routine:ether__init
105 Description: take the Ethernet controller out of reset and wait
106 for the EEPROM load to complete.
107*************************************************************/
108void ether__init (void)
109{
110#define ETH_CONTROL_REG 0x0480000b
111 int i;
112
113 *((volatile unsigned short *) 0xfffece08) = 0x03FF;
114 *((volatile unsigned short *) 0xfffb3824) = 0x8000;
115 *((volatile unsigned short *) 0xfffb3830) = 0x0000;
116 *((volatile unsigned short *) 0xfffb3834) = 0x0009;
117 *((volatile unsigned short *) 0xfffb3838) = 0x0009;
118 *((volatile unsigned short *) 0xfffb3818) = 0x0002;
119 *((volatile unsigned short *) 0xfffb382C) = 0x0048;
120 *((volatile unsigned short *) 0xfffb3824) = 0x8603;
121 udelay (3);
122 for (i=0;i<2000;i++);
123 *((volatile unsigned short *) 0xfffb381C) = 0x6610;
124 udelay (30);
125 for (i=0;i<10000;i++);
126
127 *((volatile unsigned char *) ETH_CONTROL_REG) &= ~0x01;
128 udelay (3);
129
130
131}
132
133/******************************
134 Routine:
135 Description:
136******************************/
137int dram_init (void)
138{
wdenk914be132004-06-08 00:22:43 +0000139 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
140 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
141
142 return 0;
143}
144
145/******************************************************
146 Routine: set_muxconf_regs
147 Description: Setting up the configuration Mux registers
148 specific to the hardware
149*******************************************************/
150void set_muxconf_regs (void)
151{
152 volatile unsigned int *MuxConfReg;
153 /* set each registers to its reset value; */
154 MuxConfReg =
155 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0);
156 /* setup for UART1 */
157 *MuxConfReg &= ~(0x02000000); /* bit 25 */
158 /* setup for UART2 */
159 *MuxConfReg &= ~(0x01000000); /* bit 24 */
160 /* Disable Uwire CS Hi-Z */
161 *MuxConfReg |= 0x08000000;
162 MuxConfReg =
163 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_3);
164 *MuxConfReg = 0x00000000;
165 MuxConfReg =
166 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_4);
167 *MuxConfReg = 0x00000000;
168 MuxConfReg =
169 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_5);
170 *MuxConfReg = 0x00000000;
171 MuxConfReg =
172 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_6);
173 /*setup mux for UART3 */
174 *MuxConfReg |= 0x00000001; /* bit3, 1, 0 (mux0 5,5,26) */
175 *MuxConfReg &= ~0x0000003e;
176 MuxConfReg =
177 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_7);
178 *MuxConfReg = 0x00000000;
179 MuxConfReg =
180 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_8);
181 /* Disable Uwire CS Hi-Z */
182 *MuxConfReg |= 0x00001200; /*bit 9 for CS0 12 for CS3 */
183 MuxConfReg =
184 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_9);
185 /* Need to turn on bits 21 and 12 in FUNC_MUX_CTRL_9 so the */
186 /* hardware will actually use TX and RTS based on bit 25 in */
187 /* FUNC_MUX_CTRL_0. I told you this thing was screwy! */
188 *MuxConfReg |= 0x00201000;
189 MuxConfReg =
190 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_A);
191 *MuxConfReg = 0x00000000;
192 MuxConfReg =
193 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_B);
194 *MuxConfReg = 0x00000000;
195 MuxConfReg =
196 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_C);
197 /* setup for UART2 */
198 /* Need to turn on bits 27 and 24 in FUNC_MUX_CTRL_C so the */
199 /* hardware will actually use TX and RTS based on bit 24 in */
200 /* FUNC_MUX_CTRL_0. */
201 *MuxConfReg |= 0x09000000;
202 MuxConfReg =
203 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_D);
204 *MuxConfReg |= 0x00000020;
205 MuxConfReg =
206 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_0);
207 *MuxConfReg = 0x00000000;
208 MuxConfReg =
209 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_1);
210 *MuxConfReg = 0x00000000;
211 /* mux setup for SD/MMC driver */
212 MuxConfReg =
213 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_2);
214 *MuxConfReg &= 0xFFFE0FFF;
215 MuxConfReg =
216 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_3);
217 *MuxConfReg = 0x00000000;
218 MuxConfReg =
219 (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
220 /* bit 13 for MMC2 XOR_CLK */
221 *MuxConfReg &= ~(0x00002000);
222 /* bit 29 for UART 1 */
223 *MuxConfReg &= ~(0x00002000);
224 MuxConfReg =
225 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0);
226 /* Configure for USB. Turn on VBUS_CTRL and VBUS_MODE. */
227 *MuxConfReg |= 0x000C0000;
228 MuxConfReg =
229 (volatile unsigned int *) ((unsigned int)USB_TRANSCEIVER_CTRL);
230 *MuxConfReg &= ~(0x00000070);
231 *MuxConfReg &= ~(0x00000008);
232 *MuxConfReg |= 0x00000003;
233 *MuxConfReg |= 0x00000180;
234 MuxConfReg =
235 (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
236 /* bit 17, software controls VBUS */
237 *MuxConfReg &= ~(0x00020000);
238 /* Enable USB 48 and 12M clocks */
239 *MuxConfReg |= 0x00000200;
240 *MuxConfReg &= ~(0x00000180);
241 /*2.75V for MMCSDIO1 */
242 MuxConfReg =
243 (volatile unsigned int *) ((unsigned int) VOLTAGE_CTRL_0);
244 *MuxConfReg = 0x00001FE7;
245 MuxConfReg =
246 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_0);
247 *MuxConfReg = 0x00000000;
248 MuxConfReg =
249 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_1);
250 *MuxConfReg = 0x00000000;
251 MuxConfReg =
252 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_2);
253 *MuxConfReg = 0x00000000;
254 MuxConfReg =
255 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_3);
256 *MuxConfReg = 0x00000000;
257 MuxConfReg =
258 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_4);
259 *MuxConfReg = 0x00000000;
260 MuxConfReg =
261 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_4);
262 *MuxConfReg = 0x00000000;
263 /* Turn on UART2 48 MHZ clock */
264 MuxConfReg =
265 (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
266 *MuxConfReg |= 0x40000000;
267 MuxConfReg =
268 (volatile unsigned int *) ((unsigned int) USB_OTG_CTRL);
269 /* setup for USB VBus detection OMAP161x */
270 *MuxConfReg |= 0x00040000; /* bit 18 */
271 MuxConfReg =
272 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_2);
273 /* PullUps for SD/MMC driver */
274 *MuxConfReg |= ~(0xFFFE0FFF);
275 MuxConfReg =
276 (volatile unsigned int *) ((unsigned int)COMP_MODE_CTRL_0);
277 *MuxConfReg = COMP_MODE_ENABLE;
278}
279
280/******************************************************
281 Routine: peripheral_power_enable
282 Description: Enable the power for UART1
283*******************************************************/
284void peripheral_power_enable (void)
285{
286#define UART1_48MHZ_ENABLE ((unsigned short)0x0200)
287#define SW_CLOCK_REQUEST ((volatile unsigned short *)0xFFFE0834)
288
289 *SW_CLOCK_REQUEST |= UART1_48MHZ_ENABLE;
290}