Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
Tom Warren | 13ac544 | 2012-12-11 13:34:12 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. |
Tom Warren | 13ac544 | 2012-12-11 13:34:12 +0000 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | /* Tegra30 clock control functions */ |
| 7 | |
| 8 | #ifndef _TEGRA30_CLOCK_H_ |
| 9 | #define _TEGRA30_CLOCK_H_ |
| 10 | |
| 11 | #include <asm/arch-tegra/clock.h> |
| 12 | |
Tom Warren | 795f9d7 | 2013-01-23 14:01:01 -0700 | [diff] [blame] | 13 | /* CLK_RST_CONTROLLER_OSC_CTRL_0 */ |
| 14 | #define OSC_FREQ_SHIFT 28 |
| 15 | #define OSC_FREQ_MASK (0xF << OSC_FREQ_SHIFT) |
| 16 | |
Thierry Reding | 4bf9869 | 2014-12-09 22:25:06 -0700 | [diff] [blame] | 17 | int tegra_plle_enable(void); |
| 18 | |
Tom Warren | 13ac544 | 2012-12-11 13:34:12 +0000 | [diff] [blame] | 19 | #endif /* _TEGRA30_CLOCK_H_ */ |