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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0 */
Tom Warren13ac5442012-12-11 13:34:12 +00002/*
3 * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved.
Tom Warren13ac5442012-12-11 13:34:12 +00004 */
5
6/* Tegra30 clock control functions */
7
8#ifndef _TEGRA30_CLOCK_H_
9#define _TEGRA30_CLOCK_H_
10
11#include <asm/arch-tegra/clock.h>
12
Tom Warren795f9d72013-01-23 14:01:01 -070013/* CLK_RST_CONTROLLER_OSC_CTRL_0 */
14#define OSC_FREQ_SHIFT 28
15#define OSC_FREQ_MASK (0xF << OSC_FREQ_SHIFT)
16
Thierry Reding4bf98692014-12-09 22:25:06 -070017int tegra_plle_enable(void);
18
Tom Warren13ac5442012-12-11 13:34:12 +000019#endif /* _TEGRA30_CLOCK_H_ */