blob: 410c35289978f28b970745182d832e106bfd752c [file] [log] [blame]
Tom Warren13ac5442012-12-11 13:34:12 +00001/*
2 * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17/* Tegra30 clock control functions */
18
19#ifndef _TEGRA30_CLOCK_H_
20#define _TEGRA30_CLOCK_H_
21
22#include <asm/arch-tegra/clock.h>
23
Tom Warren795f9d72013-01-23 14:01:01 -070024/* CLK_RST_CONTROLLER_OSC_CTRL_0 */
25#define OSC_FREQ_SHIFT 28
26#define OSC_FREQ_MASK (0xF << OSC_FREQ_SHIFT)
27
Thierry Reding4bf98692014-12-09 22:25:06 -070028int tegra_plle_enable(void);
29
Tom Warren13ac5442012-12-11 13:34:12 +000030#endif /* _TEGRA30_CLOCK_H_ */