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Piotr Wilczek2b3c92a2013-09-20 15:01:27 +02001/*
2 * Copyright (C) 2013 Samsung Electronics
3 * Sanghee Kim <sh0130.kim@samsung.com>
4 * Piotr Wilczek <p.wilczek@samsung.com>
5 *
6 * Configuation settings for the SAMSUNG TRATS2 (EXYNOS4412) board.
7 *
8 * SPDX-License-Identifier: GPL-2.0+
9 */
10
Piotr Wilczek87d2e782014-03-07 14:59:49 +010011#ifndef __CONFIG_TRATS2_H
12#define __CONFIG_TRATS2_H
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020013
Simon Glassbe165002014-10-07 22:01:44 -060014#include <configs/exynos4-common.h>
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020015
Piotr Wilczek87d2e782014-03-07 14:59:49 +010016#define CONFIG_TIZEN /* TIZEN lib */
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020017
Łukasz Majewski706dfa02014-01-14 08:02:26 +010018#define CONFIG_SYS_L2CACHE_OFF
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020019#ifndef CONFIG_SYS_L2CACHE_OFF
20#define CONFIG_SYS_L2_PL310
21#define CONFIG_SYS_PL310_BASE 0x10502000
22#endif
23
Piotr Wilczek87d2e782014-03-07 14:59:49 +010024/* TRATS2 has 4 banks of DRAM */
25#define CONFIG_NR_DRAM_BANKS 4
26#define CONFIG_SYS_SDRAM_BASE 0x40000000
27#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
28#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
29/* memtest works on */
30#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
31#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000)
32#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020033
Łukasz Majewskid18a7452014-03-19 14:47:06 +010034#define CONFIG_SYS_TEXT_BASE 0x43e00000
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020035
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020036/* select serial console configuration */
37#define CONFIG_SERIAL2
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020038#define CONFIG_BAUDRATE 115200
39
Piotr Wilczek87d2e782014-03-07 14:59:49 +010040/* Console configuration */
41#define CONFIG_SYS_CONSOLE_INFO_QUIET
42#define CONFIG_SYS_CONSOLE_IS_IN_ENV
Piotr Wilczek9317ba12013-11-12 15:22:46 +010043
Łukasz Majewskif106bf52015-04-01 12:34:30 +020044#define CONFIG_FIT
45#define CONFIG_FIT_VERBOSE
Piotr Wilczek87d2e782014-03-07 14:59:49 +010046#define CONFIG_BOOTARGS "Please use defined boot"
Łukasz Majewskif106bf52015-04-01 12:34:30 +020047#define CONFIG_BOOTCOMMAND "run autoboot"
Łukasz Majewski059e93d2014-04-09 10:44:33 +020048#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
Piotr Wilczek0c2ba4c2013-11-21 15:46:45 +010049
Piotr Wilczek87d2e782014-03-07 14:59:49 +010050#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
51 - GENERATED_GBL_DATA_SIZE)
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020052
Piotr Wilczek87d2e782014-03-07 14:59:49 +010053#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020054
Piotr Wilczek87d2e782014-03-07 14:59:49 +010055#define CONFIG_SYS_MONITOR_BASE 0x00000000
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020056
Piotr Wilczek87d2e782014-03-07 14:59:49 +010057#define CONFIG_ENV_IS_IN_MMC
58#define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV
59#define CONFIG_ENV_SIZE 4096
60#define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020061
62#define CONFIG_ENV_OVERWRITE
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020063
Piotr Wilczekb92686f2014-01-22 15:54:36 +010064#define CONFIG_ENV_VARS_UBOOT_CONFIG
65#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
66
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020067/* Tizen - partitions definitions */
Przemyslaw Marczak276e8d92014-02-28 18:53:36 +010068#define PARTS_CSA "csa-mmc"
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020069#define PARTS_BOOT "boot"
Przemyslaw Marczak276e8d92014-02-28 18:53:36 +010070#define PARTS_QBOOT "qboot"
Piotr Wilczek953b8422013-11-27 11:11:02 +010071#define PARTS_CSC "csc"
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020072#define PARTS_ROOT "platform"
73#define PARTS_DATA "data"
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020074#define PARTS_UMS "ums"
75
76#define PARTS_DEFAULT \
Piotr Wilczek5539e1e2013-12-30 09:40:40 +010077 "uuid_disk=${uuid_gpt_disk};" \
Piotr Wilczek953b8422013-11-27 11:11:02 +010078 "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
Przemyslaw Marczak276e8d92014-02-28 18:53:36 +010079 "name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
80 "name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020081 "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
Piotr Wilczek953b8422013-11-27 11:11:02 +010082 "name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
Przemyslaw Marczak276e8d92014-02-28 18:53:36 +010083 "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020084 "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
85
Piotr Wilczek9317ba12013-11-12 15:22:46 +010086#define CONFIG_DFU_ALT \
Mateusz Zalega0ab80bf2014-04-28 21:13:25 +020087 "u-boot raw 0x80 0x800;" \
Łukasz Majewskib7afe212014-07-22 10:17:06 +020088 "/uImage ext4 0 2;" \
89 "/modem.bin ext4 0 2;" \
90 "/exynos4412-trats2.dtb ext4 0 2;" \
Przemyslaw Marczak276e8d92014-02-28 18:53:36 +010091 ""PARTS_CSA" part 0 1;" \
Łukasz Majewski5cd4f742014-01-14 08:02:24 +010092 ""PARTS_BOOT" part 0 2;" \
Przemyslaw Marczak276e8d92014-02-28 18:53:36 +010093 ""PARTS_QBOOT" part 0 3;" \
94 ""PARTS_CSC" part 0 4;" \
Łukasz Majewski5cd4f742014-01-14 08:02:24 +010095 ""PARTS_ROOT" part 0 5;" \
96 ""PARTS_DATA" part 0 6;" \
Przemyslaw Marczakea60f022014-01-22 12:02:47 +010097 ""PARTS_UMS" part 0 7;" \
Łukasz Majewskif106bf52015-04-01 12:34:30 +020098 "params.bin raw 0x38 0x8;" \
99 "/Image.itb ext4 0 2\0"
Piotr Wilczek9317ba12013-11-12 15:22:46 +0100100
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +0200101#define CONFIG_EXTRA_ENV_SETTINGS \
102 "bootk=" \
Piotr Wilczek155f67d2014-01-22 15:54:37 +0100103 "run loaduimage;" \
104 "if run loaddtb; then " \
105 "bootm 0x40007FC0 - ${fdtaddr};" \
106 "fi;" \
107 "bootm 0x40007FC0;\0" \
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +0200108 "updatebackup=" \
Jaehoon Chung92441af2014-04-30 09:09:15 +0900109 "mmc dev 0 2; mmc write 0x51000000 0 0x800;" \
110 " mmc dev 0 0\0" \
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +0200111 "updatebootb=" \
Jaehoon Chung92441af2014-04-30 09:09:15 +0900112 "mmc read 0x51000000 0x80 0x800; run updatebackup\0" \
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +0200113 "mmcboot=" \
114 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
115 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
Piotr Wilczek155f67d2014-01-22 15:54:37 +0100116 "run bootk\0" \
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +0200117 "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
118 "boottrace=setenv opts initcall_debug; run bootcmd\0" \
119 "verify=n\0" \
120 "rootfstype=ext4\0" \
121 "console=" CONFIG_DEFAULT_CONSOLE \
122 "kernelname=uImage\0" \
Piotr Wilczek61bba482013-11-27 11:11:00 +0100123 "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 " \
124 "${kernelname}\0" \
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +0200125 "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
126 "${fdtfile}\0" \
Piotr Wilczek5539e1e2013-12-30 09:40:40 +0100127 "mmcdev=" __stringify(CONFIG_MMC_DEFAULT_DEV) "\0" \
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +0200128 "mmcbootpart=2\0" \
129 "mmcrootpart=5\0" \
130 "opts=always_resume=1\0" \
131 "partitions=" PARTS_DEFAULT \
Piotr Wilczek9317ba12013-11-12 15:22:46 +0100132 "dfu_alt_info=" CONFIG_DFU_ALT \
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +0200133 "uartpath=ap\0" \
134 "usbpath=ap\0" \
135 "consoleon=set console console=ttySAC2,115200n8; save; reset\0" \
136 "consoleoff=set console console=ram; save; reset\0" \
137 "spladdr=0x40000100\0" \
138 "splsize=0x200\0" \
139 "splfile=falcon.bin\0" \
140 "spl_export=" \
141 "setexpr spl_imgsize ${splsize} + 8 ;" \
142 "setenv spl_imgsize 0x${spl_imgsize};" \
143 "setexpr spl_imgaddr ${spladdr} - 8 ;" \
144 "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
145 "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
146 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
147 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
148 "spl export atags 0x40007FC0;" \
149 "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
150 "mw.l ${spl_addr_tmp} ${splsize};" \
151 "ext4write mmc ${mmcdev}:${mmcbootpart}" \
152 " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
153 "setenv spl_imgsize;" \
154 "setenv spl_imgaddr;" \
155 "setenv spl_addr_tmp;\0" \
Łukasz Majewskif106bf52015-04-01 12:34:30 +0200156 CONFIG_EXTRA_ENV_ITB \
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +0200157 "fdtaddr=40800000\0" \
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +0200158
Albert ARIBAUDb8fb7b82014-04-08 09:25:08 +0200159/* GPT */
Przemyslaw Marczak88a72402014-04-02 10:20:07 +0200160#define CONFIG_RANDOM_UUID
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +0200161
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +0200162/* I2C */
163#include <asm/arch/gpio.h>
164
Piotr Wilczek87d2e782014-03-07 14:59:49 +0100165#define CONFIG_CMD_I2C
166
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +0200167#define CONFIG_SYS_I2C
Piotr Wilczek58bbd2b2013-11-20 10:43:49 +0100168#define CONFIG_SYS_I2C_S3C24X0
169#define CONFIG_SYS_I2C_S3C24X0_SPEED 100000
170#define CONFIG_SYS_I2C_S3C24X0_SLAVE 0
171#define CONFIG_MAX_I2C_NUM 8
172#define CONFIG_SYS_I2C_SOFT
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +0200173#define CONFIG_SYS_I2C_SOFT_SPEED 50000
174#define CONFIG_SYS_I2C_SOFT_SLAVE 0x00
175#define I2C_SOFT_DECLARATIONS2
176#define CONFIG_SYS_I2C_SOFT_SPEED_2 50000
177#define CONFIG_SYS_I2C_SOFT_SLAVE_2 0x00
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +0200178#define CONFIG_SOFT_I2C_READ_REPEATED_START
179#define CONFIG_SYS_I2C_INIT_BOARD
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +0200180
Piotr Wilczek58bbd2b2013-11-20 10:43:49 +0100181#ifndef __ASSEMBLY__
182int get_soft_i2c_scl_pin(void);
183int get_soft_i2c_sda_pin(void);
184#endif
185#define CONFIG_SOFT_I2C_GPIO_SCL get_soft_i2c_scl_pin()
186#define CONFIG_SOFT_I2C_GPIO_SDA get_soft_i2c_sda_pin()
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +0200187
188/* POWER */
189#define CONFIG_POWER
190#define CONFIG_POWER_I2C
191#define CONFIG_POWER_MAX77686
192#define CONFIG_POWER_PMIC_MAX77693
193#define CONFIG_POWER_MUIC_MAX77693
194#define CONFIG_POWER_FG_MAX77693
195#define CONFIG_POWER_BATTERY_TRATS2
196
Przemyslaw Marczaka537a852014-03-25 10:58:22 +0100197/* Security subsystem - enable hw_rand() */
198#define CONFIG_EXYNOS_ACE_SHA
199#define CONFIG_LIB_HW_RAND
200
Przemyslaw Marczak283a3202014-01-22 11:24:12 +0100201/* Common misc for Samsung */
202#define CONFIG_MISC_COMMON
203
204#define CONFIG_MISC_INIT_R
205
Przemyslaw Marczakd87efc92014-01-22 11:24:19 +0100206/* Download menu - Samsung common */
207#define CONFIG_LCD_MENU
208#define CONFIG_LCD_MENU_BOARD
209
210/* Download menu - definitions for check keys */
211#ifndef __ASSEMBLY__
212#include <power/max77686_pmic.h>
213
214#define KEY_PWR_PMIC_NAME "MAX77686_PMIC"
215#define KEY_PWR_STATUS_REG MAX77686_REG_PMIC_STATUS1
216#define KEY_PWR_STATUS_MASK (1 << 0)
217#define KEY_PWR_INTERRUPT_REG MAX77686_REG_PMIC_INT1
218#define KEY_PWR_INTERRUPT_MASK (1 << 1)
219
Akshay Saraswatbbb1a622014-05-13 10:30:15 +0530220#define KEY_VOL_UP_GPIO EXYNOS4X12_GPIO_X22
221#define KEY_VOL_DOWN_GPIO EXYNOS4X12_GPIO_X33
Przemyslaw Marczakd87efc92014-01-22 11:24:19 +0100222#endif /* __ASSEMBLY__ */
223
224/* LCD console */
225#define LCD_BPP LCD_COLOR16
226#define CONFIG_SYS_WHITE_ON_BLACK
227
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +0200228/* LCD */
229#define CONFIG_EXYNOS_FB
230#define CONFIG_LCD
231#define CONFIG_CMD_BMP
Przemyslaw Marczak42c54e72014-01-22 11:24:16 +0100232#define CONFIG_BMP_16BPP
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +0200233#define CONFIG_FB_ADDR 0x52504000
234#define CONFIG_S6E8AX0
235#define CONFIG_EXYNOS_MIPI_DSIM
236#define CONFIG_VIDEO_BMP_GZIP
Przemyslaw Marczak02f4a092013-11-29 18:30:43 +0100237#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +0200238
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +0200239#endif /* __CONFIG_H */