Tom Warren | 8981bff | 2014-01-24 12:46:15 -0700 | [diff] [blame] | 1 | /* |
Stephen Warren | 6685f04 | 2014-03-21 12:29:01 -0600 | [diff] [blame] | 2 | * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved. |
Tom Warren | 8981bff | 2014-01-24 12:46:15 -0700 | [diff] [blame] | 3 | * |
Stephen Warren | 6685f04 | 2014-03-21 12:29:01 -0600 | [diff] [blame] | 4 | * SPDX-License-Identifier: GPL-2.0+ |
Tom Warren | 8981bff | 2014-01-24 12:46:15 -0700 | [diff] [blame] | 5 | */ |
| 6 | |
Tom Warren | 8981bff | 2014-01-24 12:46:15 -0700 | [diff] [blame] | 7 | #include <common.h> |
| 8 | #include <asm/io.h> |
Tom Warren | 8981bff | 2014-01-24 12:46:15 -0700 | [diff] [blame] | 9 | #include <asm/arch/pinmux.h> |
| 10 | |
Stephen Warren | 6685f04 | 2014-03-21 12:29:01 -0600 | [diff] [blame] | 11 | #define PIN(pin, f0, f1, f2, f3) \ |
| 12 | { \ |
| 13 | .funcs = { \ |
| 14 | PMUX_FUNC_##f0, \ |
| 15 | PMUX_FUNC_##f1, \ |
| 16 | PMUX_FUNC_##f2, \ |
| 17 | PMUX_FUNC_##f3, \ |
| 18 | }, \ |
Tom Warren | 8981bff | 2014-01-24 12:46:15 -0700 | [diff] [blame] | 19 | } |
| 20 | |
Stephen Warren | 6685f04 | 2014-03-21 12:29:01 -0600 | [diff] [blame] | 21 | #define PIN_RESERVED {} |
Tom Warren | 8981bff | 2014-01-24 12:46:15 -0700 | [diff] [blame] | 22 | |
Stephen Warren | 6685f04 | 2014-03-21 12:29:01 -0600 | [diff] [blame] | 23 | static const struct pmux_pingrp_desc tegra124_pingroups[] = { |
| 24 | /* pin, f0, f1, f2, f3 */ |
| 25 | /* Offset 0x3000 */ |
| 26 | PIN(ULPI_DATA0_PO1, SPI3, HSI, UARTA, ULPI), |
| 27 | PIN(ULPI_DATA1_PO2, SPI3, HSI, UARTA, ULPI), |
| 28 | PIN(ULPI_DATA2_PO3, SPI3, HSI, UARTA, ULPI), |
| 29 | PIN(ULPI_DATA3_PO4, SPI3, HSI, UARTA, ULPI), |
| 30 | PIN(ULPI_DATA4_PO5, SPI2, HSI, UARTA, ULPI), |
| 31 | PIN(ULPI_DATA5_PO6, SPI2, HSI, UARTA, ULPI), |
| 32 | PIN(ULPI_DATA6_PO7, SPI2, HSI, UARTA, ULPI), |
| 33 | PIN(ULPI_DATA7_PO0, SPI2, HSI, UARTA, ULPI), |
| 34 | PIN(ULPI_CLK_PY0, SPI1, SPI5, UARTD, ULPI), |
| 35 | PIN(ULPI_DIR_PY1, SPI1, SPI5, UARTD, ULPI), |
| 36 | PIN(ULPI_NXT_PY2, SPI1, SPI5, UARTD, ULPI), |
| 37 | PIN(ULPI_STP_PY3, SPI1, SPI5, UARTD, ULPI), |
| 38 | PIN(DAP3_FS_PP0, I2S2, SPI5, DISPLAYA, DISPLAYB), |
| 39 | PIN(DAP3_DIN_PP1, I2S2, SPI5, DISPLAYA, DISPLAYB), |
| 40 | PIN(DAP3_DOUT_PP2, I2S2, SPI5, DISPLAYA, RSVD4), |
| 41 | PIN(DAP3_SCLK_PP3, I2S2, SPI5, RSVD3, DISPLAYB), |
| 42 | PIN(PV0, RSVD1, RSVD2, RSVD3, RSVD4), |
| 43 | PIN(PV1, RSVD1, RSVD2, RSVD3, RSVD4), |
| 44 | PIN(SDMMC1_CLK_PZ0, SDMMC1, CLK12, RSVD3, RSVD4), |
| 45 | PIN(SDMMC1_CMD_PZ1, SDMMC1, SPDIF, SPI4, UARTA), |
| 46 | PIN(SDMMC1_DAT3_PY4, SDMMC1, SPDIF, SPI4, UARTA), |
| 47 | PIN(SDMMC1_DAT2_PY5, SDMMC1, PWM0, SPI4, UARTA), |
| 48 | PIN(SDMMC1_DAT1_PY6, SDMMC1, PWM1, SPI4, UARTA), |
| 49 | PIN(SDMMC1_DAT0_PY7, SDMMC1, RSVD2, SPI4, UARTA), |
| 50 | PIN_RESERVED, |
Tom Warren | 8981bff | 2014-01-24 12:46:15 -0700 | [diff] [blame] | 51 | PIN_RESERVED, |
Stephen Warren | 6685f04 | 2014-03-21 12:29:01 -0600 | [diff] [blame] | 52 | /* Offset 0x3068 */ |
| 53 | PIN(CLK2_OUT_PW5, EXTPERIPH2, RSVD2, RSVD3, RSVD4), |
| 54 | PIN(CLK2_REQ_PCC5, DAP, RSVD2, RSVD3, RSVD4), |
Tom Warren | 8981bff | 2014-01-24 12:46:15 -0700 | [diff] [blame] | 55 | PIN_RESERVED, |
| 56 | PIN_RESERVED, |
| 57 | PIN_RESERVED, |
| 58 | PIN_RESERVED, |
| 59 | PIN_RESERVED, |
| 60 | PIN_RESERVED, |
| 61 | PIN_RESERVED, |
| 62 | PIN_RESERVED, |
| 63 | PIN_RESERVED, |
| 64 | PIN_RESERVED, |
| 65 | PIN_RESERVED, |
| 66 | PIN_RESERVED, |
| 67 | PIN_RESERVED, |
| 68 | PIN_RESERVED, |
| 69 | PIN_RESERVED, |
| 70 | PIN_RESERVED, |
| 71 | PIN_RESERVED, |
| 72 | PIN_RESERVED, |
| 73 | PIN_RESERVED, |
| 74 | PIN_RESERVED, |
| 75 | PIN_RESERVED, |
| 76 | PIN_RESERVED, |
| 77 | PIN_RESERVED, |
| 78 | PIN_RESERVED, |
| 79 | PIN_RESERVED, |
| 80 | PIN_RESERVED, |
| 81 | PIN_RESERVED, |
| 82 | PIN_RESERVED, |
| 83 | PIN_RESERVED, |
| 84 | PIN_RESERVED, |
| 85 | PIN_RESERVED, |
| 86 | PIN_RESERVED, |
| 87 | PIN_RESERVED, |
| 88 | PIN_RESERVED, |
| 89 | PIN_RESERVED, |
| 90 | PIN_RESERVED, |
| 91 | PIN_RESERVED, |
| 92 | PIN_RESERVED, |
| 93 | PIN_RESERVED, |
Tom Warren | 8981bff | 2014-01-24 12:46:15 -0700 | [diff] [blame] | 94 | PIN_RESERVED, |
Stephen Warren | 6685f04 | 2014-03-21 12:29:01 -0600 | [diff] [blame] | 95 | /* Offset 0x3110 */ |
| 96 | PIN(HDMI_INT_PN7, RSVD1, RSVD2, RSVD3, RSVD4), |
| 97 | PIN(DDC_SCL_PV4, I2C4, RSVD2, RSVD3, RSVD4), |
| 98 | PIN(DDC_SDA_PV5, I2C4, RSVD2, RSVD3, RSVD4), |
Tom Warren | 8981bff | 2014-01-24 12:46:15 -0700 | [diff] [blame] | 99 | PIN_RESERVED, |
| 100 | PIN_RESERVED, |
| 101 | PIN_RESERVED, |
| 102 | PIN_RESERVED, |
| 103 | PIN_RESERVED, |
| 104 | PIN_RESERVED, |
| 105 | PIN_RESERVED, |
| 106 | PIN_RESERVED, |
| 107 | PIN_RESERVED, |
| 108 | PIN_RESERVED, |
| 109 | PIN_RESERVED, |
| 110 | PIN_RESERVED, |
| 111 | PIN_RESERVED, |
| 112 | PIN_RESERVED, |
| 113 | PIN_RESERVED, |
| 114 | PIN_RESERVED, |
Tom Warren | 8981bff | 2014-01-24 12:46:15 -0700 | [diff] [blame] | 115 | PIN_RESERVED, |
| 116 | PIN_RESERVED, |
Stephen Warren | 6685f04 | 2014-03-21 12:29:01 -0600 | [diff] [blame] | 117 | /* Offset 0x3164 */ |
| 118 | PIN(UART2_RXD_PC3, IRDA, SPDIF, UARTA, SPI4), |
| 119 | PIN(UART2_TXD_PC2, IRDA, SPDIF, UARTA, SPI4), |
| 120 | PIN(UART2_RTS_N_PJ6, UARTA, UARTB, GMI, SPI4), |
| 121 | PIN(UART2_CTS_N_PJ5, UARTA, UARTB, GMI, SPI4), |
| 122 | PIN(UART3_TXD_PW6, UARTC, RSVD2, GMI, SPI4), |
| 123 | PIN(UART3_RXD_PW7, UARTC, RSVD2, GMI, SPI4), |
| 124 | PIN(UART3_CTS_N_PA1, UARTC, SDMMC1, DTV, GMI), |
| 125 | PIN(UART3_RTS_N_PC0, UARTC, PWM0, DTV, GMI), |
| 126 | PIN(PU0, OWR, UARTA, GMI, RSVD4), |
| 127 | PIN(PU1, RSVD1, UARTA, GMI, RSVD4), |
| 128 | PIN(PU2, RSVD1, UARTA, GMI, RSVD4), |
| 129 | PIN(PU3, PWM0, UARTA, GMI, DISPLAYB), |
| 130 | PIN(PU4, PWM1, UARTA, GMI, DISPLAYB), |
| 131 | PIN(PU5, PWM2, UARTA, GMI, DISPLAYB), |
| 132 | PIN(PU6, PWM3, UARTA, RSVD3, GMI), |
| 133 | PIN(GEN1_I2C_SDA_PC5, I2C1, RSVD2, RSVD3, RSVD4), |
| 134 | PIN(GEN1_I2C_SCL_PC4, I2C1, RSVD2, RSVD3, RSVD4), |
| 135 | PIN(DAP4_FS_PP4, I2S3, GMI, DTV, RSVD4), |
| 136 | PIN(DAP4_DIN_PP5, I2S3, GMI, RSVD3, RSVD4), |
| 137 | PIN(DAP4_DOUT_PP6, I2S3, GMI, DTV, RSVD4), |
| 138 | PIN(DAP4_SCLK_PP7, I2S3, GMI, RSVD3, RSVD4), |
| 139 | PIN(CLK3_OUT_PEE0, EXTPERIPH3, RSVD2, RSVD3, RSVD4), |
| 140 | PIN(CLK3_REQ_PEE1, DEV3, RSVD2, RSVD3, RSVD4), |
| 141 | PIN(PC7, RSVD1, RSVD2, GMI, GMI_ALT), |
| 142 | PIN(PI5, SDMMC2, RSVD2, GMI, RSVD4), |
| 143 | PIN(PI7, RSVD1, TRACE, GMI, DTV), |
| 144 | PIN(PK0, RSVD1, SDMMC3, GMI, SOC), |
| 145 | PIN(PK1, SDMMC2, TRACE, GMI, RSVD4), |
| 146 | PIN(PJ0, RSVD1, RSVD2, GMI, USB), |
| 147 | PIN(PJ2, RSVD1, RSVD2, GMI, SOC), |
| 148 | PIN(PK3, SDMMC2, TRACE, GMI, CCLA), |
| 149 | PIN(PK4, SDMMC2, RSVD2, GMI, GMI_ALT), |
| 150 | PIN(PK2, RSVD1, RSVD2, GMI, RSVD4), |
| 151 | PIN(PI3, RSVD1, RSVD2, GMI, SPI4), |
| 152 | PIN(PI6, RSVD1, RSVD2, GMI, SDMMC2), |
| 153 | PIN(PG0, RSVD1, RSVD2, GMI, RSVD4), |
| 154 | PIN(PG1, RSVD1, RSVD2, GMI, RSVD4), |
| 155 | PIN(PG2, RSVD1, TRACE, GMI, RSVD4), |
| 156 | PIN(PG3, RSVD1, TRACE, GMI, RSVD4), |
| 157 | PIN(PG4, RSVD1, TMDS, GMI, SPI4), |
| 158 | PIN(PG5, RSVD1, RSVD2, GMI, SPI4), |
| 159 | PIN(PG6, RSVD1, RSVD2, GMI, SPI4), |
| 160 | PIN(PG7, RSVD1, RSVD2, GMI, SPI4), |
| 161 | PIN(PH0, PWM0, TRACE, GMI, DTV), |
| 162 | PIN(PH1, PWM1, TMDS, GMI, DISPLAYA), |
| 163 | PIN(PH2, PWM2, TMDS, GMI, CLDVFS), |
| 164 | PIN(PH3, PWM3, SPI4, GMI, CLDVFS), |
| 165 | PIN(PH4, SDMMC2, RSVD2, GMI, RSVD4), |
| 166 | PIN(PH5, SDMMC2, RSVD2, GMI, RSVD4), |
| 167 | PIN(PH6, SDMMC2, TRACE, GMI, DTV), |
| 168 | PIN(PH7, SDMMC2, TRACE, GMI, DTV), |
| 169 | PIN(PJ7, UARTD, RSVD2, GMI, GMI_ALT), |
| 170 | PIN(PB0, UARTD, RSVD2, GMI, RSVD4), |
| 171 | PIN(PB1, UARTD, RSVD2, GMI, RSVD4), |
| 172 | PIN(PK7, UARTD, RSVD2, GMI, RSVD4), |
| 173 | PIN(PI0, RSVD1, RSVD2, GMI, RSVD4), |
| 174 | PIN(PI1, RSVD1, RSVD2, GMI, RSVD4), |
| 175 | PIN(PI2, SDMMC2, TRACE, GMI, RSVD4), |
| 176 | PIN(PI4, SPI4, TRACE, GMI, DISPLAYA), |
| 177 | PIN(GEN2_I2C_SCL_PT5, I2C2, RSVD2, GMI, RSVD4), |
| 178 | PIN(GEN2_I2C_SDA_PT6, I2C2, RSVD2, GMI, RSVD4), |
| 179 | PIN(SDMMC4_CLK_PCC4, SDMMC4, RSVD2, GMI, RSVD4), |
| 180 | PIN(SDMMC4_CMD_PT7, SDMMC4, RSVD2, GMI, RSVD4), |
| 181 | PIN(SDMMC4_DAT0_PAA0, SDMMC4, SPI3, GMI, RSVD4), |
| 182 | PIN(SDMMC4_DAT1_PAA1, SDMMC4, SPI3, GMI, RSVD4), |
| 183 | PIN(SDMMC4_DAT2_PAA2, SDMMC4, SPI3, GMI, RSVD4), |
| 184 | PIN(SDMMC4_DAT3_PAA3, SDMMC4, SPI3, GMI, RSVD4), |
| 185 | PIN(SDMMC4_DAT4_PAA4, SDMMC4, SPI3, GMI, RSVD4), |
| 186 | PIN(SDMMC4_DAT5_PAA5, SDMMC4, SPI3, RSVD3, RSVD4), |
| 187 | PIN(SDMMC4_DAT6_PAA6, SDMMC4, SPI3, GMI, RSVD4), |
| 188 | PIN(SDMMC4_DAT7_PAA7, SDMMC4, RSVD2, GMI, RSVD4), |
Tom Warren | 8981bff | 2014-01-24 12:46:15 -0700 | [diff] [blame] | 189 | PIN_RESERVED, |
Stephen Warren | 6685f04 | 2014-03-21 12:29:01 -0600 | [diff] [blame] | 190 | /* Offset 0x3284 */ |
| 191 | PIN(CAM_MCLK_PCC0, VI, VI_ALT1, VI_ALT3, SDMMC2), |
| 192 | PIN(PCC1, I2S4, RSVD2, RSVD3, SDMMC2), |
| 193 | PIN(PBB0, VGP6, VIMCLK2, SDMMC2, VIMCLK2_ALT), |
| 194 | PIN(CAM_I2C_SCL_PBB1, VGP1, I2C3, RSVD3, SDMMC2), |
| 195 | PIN(CAM_I2C_SDA_PBB2, VGP2, I2C3, RSVD3, SDMMC2), |
| 196 | PIN(PBB3, VGP3, DISPLAYA, DISPLAYB, SDMMC2), |
| 197 | PIN(PBB4, VGP4, DISPLAYA, DISPLAYB, SDMMC2), |
| 198 | PIN(PBB5, VGP5, DISPLAYA, RSVD3, SDMMC2), |
| 199 | PIN(PBB6, I2S4, RSVD2, DISPLAYB, SDMMC2), |
| 200 | PIN(PBB7, I2S4, RSVD2, RSVD3, SDMMC2), |
| 201 | PIN(PCC2, I2S4, RSVD2, SDMMC3, SDMMC2), |
| 202 | PIN(JTAG_RTCK, RTCK, RSVD2, RSVD3, RSVD4), |
| 203 | PIN(PWR_I2C_SCL_PZ6, I2CPWR, RSVD2, RSVD3, RSVD4), |
| 204 | PIN(PWR_I2C_SDA_PZ7, I2CPWR, RSVD2, RSVD3, RSVD4), |
| 205 | PIN(KB_ROW0_PR0, KBC, RSVD2, RSVD3, RSVD4), |
| 206 | PIN(KB_ROW1_PR1, KBC, RSVD2, RSVD3, RSVD4), |
| 207 | PIN(KB_ROW2_PR2, KBC, RSVD2, RSVD3, RSVD4), |
| 208 | PIN(KB_ROW3_PR3, KBC, DISPLAYA, SYS, DISPLAYB), |
| 209 | PIN(KB_ROW4_PR4, KBC, DISPLAYA, RSVD3, DISPLAYB), |
| 210 | PIN(KB_ROW5_PR5, KBC, DISPLAYA, RSVD3, DISPLAYB), |
| 211 | PIN(KB_ROW6_PR6, KBC, DISPLAYA, DISPLAYA_ALT, DISPLAYB), |
| 212 | PIN(KB_ROW7_PR7, KBC, RSVD2, CLDVFS, UARTA), |
| 213 | PIN(KB_ROW8_PS0, KBC, RSVD2, CLDVFS, UARTA), |
| 214 | PIN(KB_ROW9_PS1, KBC, RSVD2, RSVD3, UARTA), |
| 215 | PIN(KB_ROW10_PS2, KBC, RSVD2, RSVD3, UARTA), |
| 216 | PIN(KB_ROW11_PS3, KBC, RSVD2, RSVD3, IRDA), |
| 217 | PIN(KB_ROW12_PS4, KBC, RSVD2, RSVD3, IRDA), |
| 218 | PIN(KB_ROW13_PS5, KBC, RSVD2, SPI2, RSVD4), |
| 219 | PIN(KB_ROW14_PS6, KBC, RSVD2, SPI2, RSVD4), |
| 220 | PIN(KB_ROW15_PS7, KBC, SOC, RSVD3, RSVD4), |
| 221 | PIN(KB_COL0_PQ0, KBC, RSVD2, SPI2, RSVD4), |
| 222 | PIN(KB_COL1_PQ1, KBC, RSVD2, SPI2, RSVD4), |
| 223 | PIN(KB_COL2_PQ2, KBC, RSVD2, SPI2, RSVD4), |
| 224 | PIN(KB_COL3_PQ3, KBC, DISPLAYA, PWM2, UARTA), |
| 225 | PIN(KB_COL4_PQ4, KBC, OWR, SDMMC3, UARTA), |
| 226 | PIN(KB_COL5_PQ5, KBC, RSVD2, SDMMC3, RSVD4), |
| 227 | PIN(KB_COL6_PQ6, KBC, RSVD2, SPI2, UARTD), |
| 228 | PIN(KB_COL7_PQ7, KBC, RSVD2, SPI2, UARTD), |
| 229 | PIN(CLK_32K_OUT_PA0, BLINK, SOC, RSVD3, RSVD4), |
Tom Warren | 8981bff | 2014-01-24 12:46:15 -0700 | [diff] [blame] | 230 | PIN_RESERVED, |
Stephen Warren | 6685f04 | 2014-03-21 12:29:01 -0600 | [diff] [blame] | 231 | /* Offset 0x3324 */ |
| 232 | PIN(CORE_PWR_REQ, PWRON, RSVD2, RSVD3, RSVD4), |
| 233 | PIN(CPU_PWR_REQ, CPU, RSVD2, RSVD3, RSVD4), |
| 234 | PIN(PWR_INT_N, PMI, RSVD2, RSVD3, RSVD4), |
| 235 | PIN(CLK_32K_IN, CLK, RSVD2, RSVD3, RSVD4), |
| 236 | PIN(OWR, OWR, RSVD2, RSVD3, RSVD4), |
| 237 | PIN(DAP1_FS_PN0, I2S0, HDA, GMI, RSVD4), |
| 238 | PIN(DAP1_DIN_PN1, I2S0, HDA, GMI, RSVD4), |
| 239 | PIN(DAP1_DOUT_PN2, I2S0, HDA, GMI, SATA), |
| 240 | PIN(DAP1_SCLK_PN3, I2S0, HDA, GMI, RSVD4), |
| 241 | PIN(DAP_MCLK1_REQ_PEE2, DAP, DAP1, SATA, RSVD4), |
| 242 | PIN(DAP_MCLK1_PW4, EXTPERIPH1, DAP2, RSVD3, RSVD4), |
| 243 | PIN(SPDIF_IN_PK6, SPDIF, RSVD2, RSVD3, I2C3), |
| 244 | PIN(SPDIF_OUT_PK5, SPDIF, RSVD2, RSVD3, I2C3), |
| 245 | PIN(DAP2_FS_PA2, I2S1, HDA, GMI, RSVD4), |
| 246 | PIN(DAP2_DIN_PA4, I2S1, HDA, GMI, RSVD4), |
| 247 | PIN(DAP2_DOUT_PA5, I2S1, HDA, GMI, RSVD4), |
| 248 | PIN(DAP2_SCLK_PA3, I2S1, HDA, GMI, RSVD4), |
| 249 | PIN(DVFS_PWM_PX0, SPI6, CLDVFS, GMI, RSVD4), |
| 250 | PIN(GPIO_X1_AUD_PX1, SPI6, RSVD2, GMI, RSVD4), |
| 251 | PIN(GPIO_X3_AUD_PX3, SPI6, SPI1, GMI, RSVD4), |
| 252 | PIN(DVFS_CLK_PX2, SPI6, CLDVFS, GMI, RSVD4), |
| 253 | PIN(GPIO_X4_AUD_PX4, GMI, SPI1, SPI2, DAP2), |
| 254 | PIN(GPIO_X5_AUD_PX5, GMI, SPI1, SPI2, RSVD4), |
| 255 | PIN(GPIO_X6_AUD_PX6, SPI6, SPI1, SPI2, GMI), |
| 256 | PIN(GPIO_X7_AUD_PX7, RSVD1, SPI1, SPI2, RSVD4), |
Tom Warren | 8981bff | 2014-01-24 12:46:15 -0700 | [diff] [blame] | 257 | PIN_RESERVED, |
Tom Warren | 8981bff | 2014-01-24 12:46:15 -0700 | [diff] [blame] | 258 | PIN_RESERVED, |
Stephen Warren | 6685f04 | 2014-03-21 12:29:01 -0600 | [diff] [blame] | 259 | /* Offset 0x3390 */ |
| 260 | PIN(SDMMC3_CLK_PA6, SDMMC3, RSVD2, RSVD3, SPI3), |
| 261 | PIN(SDMMC3_CMD_PA7, SDMMC3, PWM3, UARTA, SPI3), |
| 262 | PIN(SDMMC3_DAT0_PB7, SDMMC3, RSVD2, RSVD3, SPI3), |
| 263 | PIN(SDMMC3_DAT1_PB6, SDMMC3, PWM2, UARTA, SPI3), |
| 264 | PIN(SDMMC3_DAT2_PB5, SDMMC3, PWM1, DISPLAYA, SPI3), |
| 265 | PIN(SDMMC3_DAT3_PB4, SDMMC3, PWM0, DISPLAYB, SPI3), |
Tom Warren | 8981bff | 2014-01-24 12:46:15 -0700 | [diff] [blame] | 266 | PIN_RESERVED, |
| 267 | PIN_RESERVED, |
| 268 | PIN_RESERVED, |
| 269 | PIN_RESERVED, |
| 270 | PIN_RESERVED, |
Stephen Warren | 6685f04 | 2014-03-21 12:29:01 -0600 | [diff] [blame] | 271 | /* Offset 0x33bc */ |
| 272 | PIN(PEX_L0_RST_N_PDD1, PE0, RSVD2, RSVD3, RSVD4), |
| 273 | PIN(PEX_L0_CLKREQ_N_PDD2, PE0, RSVD2, RSVD3, RSVD4), |
| 274 | PIN(PEX_WAKE_N_PDD3, PE, RSVD2, RSVD3, RSVD4), |
Tom Warren | 8981bff | 2014-01-24 12:46:15 -0700 | [diff] [blame] | 275 | PIN_RESERVED, |
Stephen Warren | 6685f04 | 2014-03-21 12:29:01 -0600 | [diff] [blame] | 276 | /* Offset 0x33cc */ |
| 277 | PIN(PEX_L1_RST_N_PDD5, PE1, RSVD2, RSVD3, RSVD4), |
| 278 | PIN(PEX_L1_CLKREQ_N_PDD6, PE1, RSVD2, RSVD3, RSVD4), |
Tom Warren | 8981bff | 2014-01-24 12:46:15 -0700 | [diff] [blame] | 279 | PIN_RESERVED, |
| 280 | PIN_RESERVED, |
| 281 | PIN_RESERVED, |
Stephen Warren | 6685f04 | 2014-03-21 12:29:01 -0600 | [diff] [blame] | 282 | /* Offset 0x33e0 */ |
| 283 | PIN(HDMI_CEC_PEE3, CEC, RSVD2, RSVD3, RSVD4), |
| 284 | PIN(SDMMC1_WP_N_PV3, SDMMC1, CLK12, SPI4, UARTA), |
| 285 | PIN(SDMMC3_CD_N_PV2, SDMMC3, OWR, RSVD3, RSVD4), |
| 286 | PIN(GPIO_W2_AUD_PW2, SPI6, RSVD2, SPI2, I2C1), |
| 287 | PIN(GPIO_W3_AUD_PW3, SPI6, SPI1, SPI2, I2C1), |
| 288 | PIN(USB_VBUS_EN0_PN4, USB, RSVD2, RSVD3, RSVD4), |
| 289 | PIN(USB_VBUS_EN1_PN5, USB, RSVD2, RSVD3, RSVD4), |
| 290 | PIN(SDMMC3_CLK_LB_IN_PEE5, SDMMC3, RSVD2, RSVD3, RSVD4), |
| 291 | PIN(SDMMC3_CLK_LB_OUT_PEE4, SDMMC3, RSVD2, RSVD3, RSVD4), |
| 292 | PIN(GMI_CLK_LB, SDMMC2, RSVD2, GMI, RSVD4), |
| 293 | PIN(RESET_OUT_N, RSVD1, RSVD2, RSVD3, RESET_OUT_N), |
| 294 | PIN(KB_ROW16_PT0, KBC, RSVD2, RSVD3, UARTC), |
| 295 | PIN(KB_ROW17_PT1, KBC, RSVD2, RSVD3, UARTC), |
| 296 | PIN(USB_VBUS_EN2_PFF1, USB, RSVD2, RSVD3, RSVD4), |
| 297 | PIN(PFF2, SATA, RSVD2, RSVD3, RSVD4), |
Tom Warren | 8981bff | 2014-01-24 12:46:15 -0700 | [diff] [blame] | 298 | PIN_RESERVED, |
| 299 | PIN_RESERVED, |
| 300 | PIN_RESERVED, |
Stephen Warren | 6685f04 | 2014-03-21 12:29:01 -0600 | [diff] [blame] | 301 | PIN_RESERVED, |
| 302 | PIN_RESERVED, |
| 303 | /* Offset 0x3430 */ |
| 304 | PIN(DP_HPD_PFF0, DP, RSVD2, RSVD3, RSVD4), |
Tom Warren | 8981bff | 2014-01-24 12:46:15 -0700 | [diff] [blame] | 305 | }; |
Stephen Warren | f4df605 | 2014-03-21 12:28:56 -0600 | [diff] [blame] | 306 | const struct pmux_pingrp_desc *tegra_soc_pingroups = tegra124_pingroups; |
Stephen Warren | d937fb5 | 2015-03-25 12:04:37 -0600 | [diff] [blame] | 307 | |
| 308 | #define MIPIPADCTRL_GRP(grp, f0, f1) \ |
| 309 | { \ |
| 310 | .funcs = { \ |
| 311 | PMUX_FUNC_##f0, \ |
| 312 | PMUX_FUNC_##f1, \ |
| 313 | }, \ |
| 314 | } |
| 315 | |
| 316 | #define MIPIPADCTRL_RESERVED {} |
| 317 | |
| 318 | static const struct pmux_mipipadctrlgrp_desc tegra124_mipipadctrl_groups[] = { |
| 319 | /* pin, f0, f1 */ |
| 320 | /* Offset 0x820 */ |
| 321 | MIPIPADCTRL_GRP(DSI_B, CSI, DSI_B), |
| 322 | }; |
| 323 | const struct pmux_mipipadctrlgrp_desc *tegra_soc_mipipadctrl_groups = tegra124_mipipadctrl_groups; |