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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Linus Walleij717b0a82012-08-04 05:21:28 +00002/*
3 * (C) Copyright 2012
4 * Linaro
5 * Linus Walleij <linus.walleij@linaro.org>
6 * Common ARM Integrator configuration settings
Linus Walleij717b0a82012-08-04 05:21:28 +00007 */
8
Linus Walleij717b0a82012-08-04 05:21:28 +00009#define CONFIG_SYS_TIMERBASE 0x13000100 /* Timer1 */
10#define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */
Linus Walleij717b0a82012-08-04 05:21:28 +000011#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) /* Size of malloc() pool */
12
13#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
14#define CONFIG_SETUP_MEMORY_TAGS
Linus Walleij717b0a82012-08-04 05:21:28 +000015
16/*
17 * There are various dependencies on the core module (CM) fitted
18 * Users should refer to their CM user guide
19 */
20#include "armcoremodule.h"
21
22/*
23 * Initialize and remap the core module, use SPD to detect memory size
24 * If CONFIG_SKIP_LOWLEVEL_INIT is not defined &
25 * the core module has a CM_INIT register
26 * then the U-Boot initialisation code will
27 * e.g. ARM Boot Monitor or pre-loader is repeated once
28 * (to re-initialise any existing CM_INIT settings to safe values).
29 *
30 * This is usually not the desired behaviour since the platform
31 * will either reboot into the ARM monitor (or pre-loader)
32 * or continuously cycle thru it without U-Boot running,
33 * depending upon the setting of Integrator/CP switch S2-4.
34 *
35 * However it may be needed if Integrator/CP switch S2-1
36 * is set OFF to boot direct into U-Boot.
37 * In that case comment out the line below.
38 */
39#define CONFIG_CM_INIT
40#define CONFIG_CM_REMAP
41#define CONFIG_CM_SPD_DETECT
42
43/*
44 * The ARM boot monitor initializes the board.
45 * However, the default U-Boot code also performs the initialization.
46 * If desired, this can be prevented by defining SKIP_LOWLEVEL_INIT
47 * - see documentation supplied with board for details of how to choose the
48 * image to run at reset/power up
49 * e.g. whether the ARM Boot Monitor runs before U-Boot
50 */
51/* #define CONFIG_SKIP_LOWLEVEL_INIT */
52
53/*
54 * The ARM boot monitor does not relocate U-Boot.
55 * However, the default U-Boot code performs the relocation check,
56 * and may relocate the code if the memory map is changed.
57 * If necessary this can be prevented by defining SKIP_RELOCATE_UBOOT
58 */
59/* #define SKIP_CONFIG_RELOCATE_UBOOT */
60
Linus Walleij717b0a82012-08-04 05:21:28 +000061/*
62 * Physical Memory Map
63 */
Linus Walleij717b0a82012-08-04 05:21:28 +000064#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
65#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
66#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
67#define CONFIG_SYS_INIT_RAM_SIZE PHYS_SDRAM_1_SIZE
68#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \
69 CONFIG_SYS_INIT_RAM_SIZE - \
70 GENERATED_GBL_DATA_SIZE)
71#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET
Linus Walleij48fd6152015-04-05 01:48:33 +020072
73/*
74 * FLASH and environment organization
75 * Top varies according to amount fitted
76 * Reserve top 4 blocks of flash
77 * - ARM Boot Monitor
78 * - Unused
79 * - SIB block
80 * - U-Boot environment
81 */
Linus Walleij48fd6152015-04-05 01:48:33 +020082#define CONFIG_SYS_FLASH_BASE 0x24000000
83#define CONFIG_SYS_MAX_FLASH_BANKS 1
84
85/* Timeout values in ticks */
86#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */
87#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */
Linus Walleij48fd6152015-04-05 01:48:33 +020088#define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */