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git01.mediatek.com / filogic / uboot / 764d41205e1ae48bed213a6b8ca6e308d46d6ca4 / . / arch / arm / dts / tegra20-colibri.dts
blob: f058d45c5ca8fcf2bb8ba68d0e1f1c49e777779b [file] [log] [blame]
Lucas Stach85990a92012-10-07 11:36:06 +0000[diff] [blame]1/dts-v1/;
2
Tom Warrenf6236152013-02-21 12:31:27 +0000[diff] [blame]3#include "tegra20.dtsi"
Lucas Stach85990a92012-10-07 11:36:06 +0000[diff] [blame]4
5/ {
6 model = "Toradex Colibri T20";
Marcel Ziswiler2ec89a82015-08-06 00:47:01 +0200[diff] [blame]7 compatible = "toradex,colibri_t20", "nvidia,tegra20";
Lucas Stach85990a92012-10-07 11:36:06 +0000[diff] [blame]8
Simon Glass0c24f372014-09-04 16:27:35 -0600[diff] [blame]9 chosen {
10 stdout-path = &uarta;
11 };
12
Lucas Stach85990a92012-10-07 11:36:06 +0000[diff] [blame]13 aliases {
Marcel Ziswiler9a520202015-08-06 00:47:03 +0200[diff] [blame]14 i2c0 = "/i2c@7000d000";
15 i2c1 = "/i2c@7000c000";
16 i2c2 = "/i2c@7000c400";
Lucas Stach85990a92012-10-07 11:36:06 +0000[diff] [blame]17 usb0 = "/usb@c5008000";
18 usb1 = "/usb@c5000000";
19 usb2 = "/usb@c5004000";
Tom Warrened955272013-02-21 12:31:29 +0000[diff] [blame]20 sdhci0 = "/sdhci@c8000600";
Lucas Stach85990a92012-10-07 11:36:06 +0000[diff] [blame]21 };
22
Marcel Ziswilercbd2b512015-08-06 00:47:02 +0200[diff] [blame]23 host1x {
24 status = "okay";
25 dc@54200000 {
26 status = "okay";
27 rgb {
28 status = "okay";
29 nvidia,panel = <&lcd_panel>;
30 };
31 };
32 };
33
Lucas Stach85990a92012-10-07 11:36:06 +0000[diff] [blame]34 usb@c5000000 {
35 dr_mode = "otg";
36 };
37
38 usb@c5004000 {
Marcel Ziswiler764d4122015-08-06 00:47:10 +0200[diff] [blame^]39 /* VBUS_LAN */
Simon Glass3112fd52015-01-05 20:05:41 -0700[diff] [blame]40 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
41 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(BB, 1) GPIO_ACTIVE_HIGH>;
Lucas Stach85990a92012-10-07 11:36:06 +0000[diff] [blame]42 };
43
44 usb@c5008000 {
Marcel Ziswiler764d4122015-08-06 00:47:10 +0200[diff] [blame^]45 /* USBH_PEN */
Simon Glass3112fd52015-01-05 20:05:41 -0700[diff] [blame]46 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
Lucas Stach85990a92012-10-07 11:36:06 +0000[diff] [blame]47 };
48
49 nand-controller@70008000 {
Simon Glass3112fd52015-01-05 20:05:41 -0700[diff] [blame]50 nvidia,wp-gpios = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_HIGH>;
Lucas Stach85990a92012-10-07 11:36:06 +0000[diff] [blame]51 nvidia,width = <8>;
52 nvidia,timing = <15 100 25 80 25 10 15 10 100>;
53
54 nand@0 {
55 reg = <0>;
56 compatible = "nand-flash";
57 };
58 };
Tom Warrened955272013-02-21 12:31:29 +0000[diff] [blame]59
Marcel Ziswiler9a520202015-08-06 00:47:03 +0200[diff] [blame]60 /*
61 * GEN1_I2C: I2C_SDA/SCL on SODIMM pin 194/196 (e.g. RTC on carrier
62 * board)
63 */
64 i2c@7000c000 {
65 status = "okay";
66 clock-frequency = <100000>;
67 };
68
69 /* GEN2_I2C: unused */
70
71 /* DDC_CLOCK/DATA on X3 pin 15/16 (e.g. display EDID) */
72 i2c@7000c400 {
73 status = "okay";
74 clock-frequency = <100000>;
75 };
76
77 /*
78 * PWR_I2C: power I2C to PMIC and temperature sensor
79 */
80 i2c@7000d000 {
81 status = "okay";
82 clock-frequency = <100000>;
83 };
84
Tom Warrened955272013-02-21 12:31:29 +0000[diff] [blame]85 sdhci@c8000600 {
86 status = "okay";
Tom Warrened955272013-02-21 12:31:29 +0000[diff] [blame]87 bus-width = <4>;
Marcel Ziswiler764d4122015-08-06 00:47:10 +0200[diff] [blame^]88 cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>;
Tom Warrened955272013-02-21 12:31:29 +0000[diff] [blame]89 };
Marcel Ziswilercbd2b512015-08-06 00:47:02 +0200[diff] [blame]90
91 lcd_panel: panel {
92 clock = <25175000>;
93 xres = <640>;
94 yres = <480>;
95 left-margin = <48>; /* horizontal back porch */
96 right-margin = <16>; /* horizontal front porch */
97 hsync-len = <96>;
98 lower-margin = <11>; /* vertical front porch */
99 upper-margin = <31>; /* vertical back porch */
100 vsync-len = <2>;
101 hsync-active-high;
102 vsync-active-high;
103 nvidia,bits-per-pixel = <16>;
104 nvidia,pwm = <&pwm 0 0>;
105 nvidia,backlight-enable-gpios = <&gpio TEGRA_GPIO(T, 4) GPIO_ACTIVE_HIGH>;
106 nvidia,panel-timings = <0 0 0 0>;
107 };
Lucas Stach85990a92012-10-07 11:36:06 +0000[diff] [blame]108};