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Tom Rini6bb92fc2024-05-20 09:54:58 -06001// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2/*
3 * Device Tree Source for the R-Car V4M Gray Hawk Single board
4 *
5 * Copyright (C) 2023 Renesas Electronics Corp.
6 * Copyright (C) 2024 Glider bv
7 */
8
9/dts-v1/;
10
11#include <dt-bindings/gpio/gpio.h>
12
13#include "r8a779h0.dtsi"
14
15/ {
16 model = "Renesas Gray Hawk Single board based on r8a779h0";
17 compatible = "renesas,gray-hawk-single", "renesas,r8a779h0";
18
19 aliases {
20 serial0 = &hscif0;
Tom Rini762f85b2024-07-20 11:15:10 -060021 serial1 = &hscif2;
Tom Rini6bb92fc2024-05-20 09:54:58 -060022 ethernet0 = &avb0;
23 };
24
25 chosen {
Tom Rini762f85b2024-07-20 11:15:10 -060026 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
Tom Rini6bb92fc2024-05-20 09:54:58 -060027 stdout-path = "serial0:921600n8";
28 };
29
30 memory@48000000 {
31 device_type = "memory";
32 /* first 128MB is reserved for secure area. */
33 reg = <0x0 0x48000000 0x0 0x78000000>;
34 };
35
36 memory@480000000 {
37 device_type = "memory";
38 reg = <0x4 0x80000000 0x1 0x80000000>;
39 };
40
41 reg_1p8v: regulator-1p8v {
42 compatible = "regulator-fixed";
43 regulator-name = "fixed-1.8V";
44 regulator-min-microvolt = <1800000>;
45 regulator-max-microvolt = <1800000>;
46 regulator-boot-on;
47 regulator-always-on;
48 };
49
50 reg_3p3v: regulator-3p3v {
51 compatible = "regulator-fixed";
52 regulator-name = "fixed-3.3V";
53 regulator-min-microvolt = <3300000>;
54 regulator-max-microvolt = <3300000>;
55 regulator-boot-on;
56 regulator-always-on;
57 };
58};
59
60&avb0 {
61 pinctrl-0 = <&avb0_pins>;
62 pinctrl-names = "default";
63 phy-handle = <&phy0>;
64 tx-internal-delay-ps = <2000>;
65 status = "okay";
66
67 phy0: ethernet-phy@0 {
68 compatible = "ethernet-phy-id0022.1622",
69 "ethernet-phy-ieee802.3-c22";
70 rxc-skew-ps = <1500>;
71 reg = <0>;
72 interrupt-parent = <&gpio7>;
73 interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
74 reset-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>;
75 };
76};
77
78&extal_clk {
79 clock-frequency = <16666666>;
80};
81
82&extalr_clk {
83 clock-frequency = <32768>;
84};
85
86&hscif0 {
87 pinctrl-0 = <&hscif0_pins>;
88 pinctrl-names = "default";
89
90 uart-has-rtscts;
91 status = "okay";
92};
93
Tom Rini762f85b2024-07-20 11:15:10 -060094&hscif2 {
95 pinctrl-0 = <&hscif2_pins>;
96 pinctrl-names = "default";
97
98 uart-has-rtscts;
99 status = "okay";
100};
101
Tom Rini6bb92fc2024-05-20 09:54:58 -0600102&i2c0 {
103 pinctrl-0 = <&i2c0_pins>;
104 pinctrl-names = "default";
105
106 status = "okay";
107 clock-frequency = <400000>;
108
109 eeprom@50 {
110 compatible = "rohm,br24g01", "atmel,24c01";
111 label = "cpu-board";
112 reg = <0x50>;
113 pagesize = <8>;
114 };
115
116 eeprom@51 {
117 compatible = "rohm,br24g01", "atmel,24c01";
118 label = "breakout-board";
119 reg = <0x51>;
120 pagesize = <8>;
121 };
122
123 eeprom@52 {
124 compatible = "rohm,br24g01", "atmel,24c01";
125 label = "csi-dsi-sub-board-id";
126 reg = <0x52>;
127 pagesize = <8>;
128 };
129
130 eeprom@53 {
131 compatible = "rohm,br24g01", "atmel,24c01";
132 label = "ethernet-sub-board-id";
133 reg = <0x53>;
134 pagesize = <8>;
135 };
136};
137
138&mmc0 {
139 pinctrl-0 = <&mmc_pins>;
140 pinctrl-1 = <&mmc_pins>;
141 pinctrl-names = "default", "state_uhs";
142
143 vmmc-supply = <&reg_3p3v>;
144 vqmmc-supply = <&reg_1p8v>;
145 mmc-hs200-1_8v;
146 mmc-hs400-1_8v;
147 bus-width = <8>;
148 no-sd;
149 no-sdio;
150 non-removable;
151 full-pwr-cycle-in-suspend;
152 status = "okay";
153};
154
155&pfc {
Tom Rini762f85b2024-07-20 11:15:10 -0600156 pinctrl-0 = <&scif_clk_pins>, <&scif_clk2_pins>;
Tom Rini6bb92fc2024-05-20 09:54:58 -0600157 pinctrl-names = "default";
158
159 avb0_pins: avb0 {
160 mux {
161 groups = "avb0_link", "avb0_mdio", "avb0_rgmii",
162 "avb0_txcrefclk";
163 function = "avb0";
164 };
165
166 pins_mdio {
167 groups = "avb0_mdio";
168 drive-strength = <21>;
169 };
170
171 pins_mii {
172 groups = "avb0_rgmii";
173 drive-strength = <21>;
174 };
175 };
176
177 hscif0_pins: hscif0 {
178 groups = "hscif0_data", "hscif0_ctrl";
179 function = "hscif0";
180 };
181
Tom Rini762f85b2024-07-20 11:15:10 -0600182 hscif2_pins: hscif2 {
183 groups = "hscif2_data", "hscif2_ctrl";
184 function = "hscif2";
185 };
186
Tom Rini6bb92fc2024-05-20 09:54:58 -0600187 i2c0_pins: i2c0 {
188 groups = "i2c0";
189 function = "i2c0";
190 };
191
192 mmc_pins: mmc {
193 groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
194 function = "mmc";
195 power-source = <1800>;
196 };
197
198 qspi0_pins: qspi0 {
199 groups = "qspi0_ctrl", "qspi0_data4";
200 function = "qspi0";
201 };
202
203 scif_clk_pins: scif-clk {
204 groups = "scif_clk";
205 function = "scif_clk";
206 };
Tom Rini762f85b2024-07-20 11:15:10 -0600207
208 scif_clk2_pins: scif-clk2 {
209 groups = "scif_clk2";
210 function = "scif_clk2";
211 };
Tom Rini6bb92fc2024-05-20 09:54:58 -0600212};
213
214&rpc {
215 pinctrl-0 = <&qspi0_pins>;
216 pinctrl-names = "default";
217
218 status = "okay";
219
220 flash@0 {
221 compatible = "spansion,s25fs512s", "jedec,spi-nor";
222 reg = <0>;
223 spi-max-frequency = <40000000>;
224 spi-rx-bus-width = <4>;
225
226 partitions {
227 compatible = "fixed-partitions";
228 #address-cells = <1>;
229 #size-cells = <1>;
230
231 boot@0 {
232 reg = <0x0 0x1200000>;
233 read-only;
234 };
235 user@1200000 {
236 reg = <0x1200000 0x2e00000>;
237 };
238 };
239 };
240};
241
242&rwdt {
243 timeout-sec = <60>;
244 status = "okay";
245};
246
247&scif_clk {
248 clock-frequency = <24000000>;
249};
Tom Rini762f85b2024-07-20 11:15:10 -0600250
251&scif_clk2 {
252 clock-frequency = <24000000>;
253};