| Jagan Teki | 0846e0b | 2022-12-14 23:21:09 +0530 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| 2 | /* |
| 3 | * Copyright (c) 2020 Rockchip Electronics Co., Ltd. |
| 4 | * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd. |
| 5 | */ |
| 6 | |
| 7 | /dts-v1/; |
| 8 | #include "rv1126.dtsi" |
| 9 | #include "rv1126-edgeble-neu2.dtsi" |
| 10 | |
| 11 | / { |
| 12 | model = "Edgeble Neu2 IO Board"; |
| 13 | compatible = "edgeble,neural-compute-module-2-io", |
| 14 | "edgeble,neural-compute-module-2", "rockchip,rv1126"; |
| 15 | |
| 16 | aliases { |
| 17 | serial2 = &uart2; |
| 18 | }; |
| 19 | |
| 20 | chosen { |
| 21 | stdout-path = "serial2:1500000n8"; |
| 22 | }; |
| Tim Lunn | 5c0c380 | 2024-01-24 14:25:57 +1100 | [diff] [blame] | 23 | |
| 24 | vcc12v_dcin: vcc12v-dcin-regulator { |
| 25 | compatible = "regulator-fixed"; |
| 26 | regulator-name = "vcc12v_dcin"; |
| 27 | regulator-always-on; |
| 28 | regulator-boot-on; |
| 29 | regulator-min-microvolt = <12000000>; |
| 30 | regulator-max-microvolt = <12000000>; |
| 31 | }; |
| 32 | |
| 33 | vcc5v0_sys: vcc5v0-sys-regulator { |
| 34 | compatible = "regulator-fixed"; |
| 35 | regulator-name = "vcc5v0_sys"; |
| 36 | regulator-always-on; |
| 37 | regulator-boot-on; |
| 38 | regulator-min-microvolt = <5000000>; |
| 39 | regulator-max-microvolt = <5000000>; |
| 40 | vin-supply = <&vcc12v_dcin>; |
| 41 | }; |
| 42 | |
| 43 | v3v3_sys: v3v3-sys-regulator { |
| 44 | compatible = "regulator-fixed"; |
| 45 | regulator-name = "v3v3_sys"; |
| 46 | regulator-always-on; |
| 47 | regulator-boot-on; |
| 48 | regulator-min-microvolt = <3300000>; |
| 49 | regulator-max-microvolt = <3300000>; |
| 50 | vin-supply = <&vcc5v0_sys>; |
| 51 | }; |
| 52 | }; |
| 53 | |
| 54 | &gmac { |
| 55 | assigned-clocks = <&cru CLK_GMAC_SRC>, <&cru CLK_GMAC_TX_RX>, |
| 56 | <&cru CLK_GMAC_ETHERNET_OUT>; |
| 57 | assigned-clock-parents = <&cru CLK_GMAC_SRC_M1>, <&cru RGMII_MODE_CLK>; |
| 58 | assigned-clock-rates = <125000000>, <0>, <25000000>; |
| 59 | clock_in_out = "input"; |
| 60 | phy-handle = <&phy>; |
| 61 | phy-mode = "rgmii"; |
| 62 | phy-supply = <&vcc_3v3>; |
| 63 | pinctrl-names = "default"; |
| 64 | pinctrl-0 = <&rgmiim1_miim &rgmiim1_bus2 &rgmiim1_bus4 &clk_out_ethernetm1_pins>; |
| 65 | tx_delay = <0x2a>; |
| 66 | rx_delay = <0x1a>; |
| 67 | status = "okay"; |
| 68 | }; |
| 69 | |
| 70 | &mdio { |
| 71 | phy: ethernet-phy@0 { |
| 72 | compatible = "ethernet-phy-id001c.c916", |
| 73 | "ethernet-phy-ieee802.3-c22"; |
| 74 | reg = <0x0>; |
| 75 | pinctrl-names = "default"; |
| 76 | pinctrl-0 = <ð_phy_rst>; |
| 77 | reset-assert-us = <20000>; |
| 78 | reset-deassert-us = <100000>; |
| 79 | reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>; |
| 80 | }; |
| 81 | }; |
| 82 | |
| 83 | &pinctrl { |
| 84 | ethernet { |
| 85 | eth_phy_rst: eth-phy-rst { |
| 86 | rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; |
| 87 | }; |
| 88 | }; |
| 89 | }; |
| 90 | |
| 91 | &pwm11 { |
| 92 | status = "okay"; |
| Jagan Teki | 0846e0b | 2022-12-14 23:21:09 +0530 | [diff] [blame] | 93 | }; |
| 94 | |
| 95 | &sdmmc { |
| 96 | bus-width = <4>; |
| 97 | cap-mmc-highspeed; |
| 98 | cap-sd-highspeed; |
| 99 | card-detect-delay = <200>; |
| 100 | pinctrl-names = "default"; |
| 101 | pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_bus4 &sdmmc0_det>; |
| 102 | rockchip,default-sample-phase = <90>; |
| 103 | sd-uhs-sdr12; |
| 104 | sd-uhs-sdr25; |
| 105 | sd-uhs-sdr104; |
| 106 | vqmmc-supply = <&vccio_sd>; |
| 107 | status = "okay"; |
| 108 | }; |
| 109 | |
| 110 | &uart2 { |
| 111 | status = "okay"; |
| 112 | }; |