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git01.mediatek.com / filogic / uboot / 74cd30ad163ab097fbdcd1419eb8d29370a17be9 / . / configs / ls1012aqds_tfa_defconfig
blob: 1b783c524f636de4cfdf9e42a2c2ceff21fc8133 [file] [log] [blame]
Rajesh Bhagat45d8a542018-11-05 18:03:04 +0000[diff] [blame]1CONFIG_ARM=y
2CONFIG_TARGET_LS1012AQDS=y
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]3CONFIG_TFABOOT=y
Rajesh Bhagat45d8a542018-11-05 18:03:04 +0000[diff] [blame]4CONFIG_SYS_TEXT_BASE=0x82000000
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]5CONFIG_ENV_SIZE=0x40000
6CONFIG_ENV_OFFSET=0x500000
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]7CONFIG_ENV_SECT_SIZE=0x40000
Tom Rini6bd3b142020-02-06 13:42:52 -0500[diff] [blame]8CONFIG_DM_GPIO=y
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]9CONFIG_QSPI_AHB_INIT=y
Tom Rinic9285bf2019-04-29 15:54:04 -0400[diff] [blame]10CONFIG_NR_DRAM_BANKS=2
Rajesh Bhagat45d8a542018-11-05 18:03:04 +0000[diff] [blame]11CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
12CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
13CONFIG_AHCI=y
14CONFIG_DISTRO_DEFAULTS=y
Rajesh Bhagat45d8a542018-11-05 18:03:04 +0000[diff] [blame]15# CONFIG_SYS_MALLOC_F is not set
16CONFIG_FIT_VERBOSE=y
17CONFIG_OF_BOARD_SETUP=y
18CONFIG_OF_STDOUT_VIA_ALIAS=y
19CONFIG_BOOTDELAY=10
20CONFIG_USE_BOOTARGS=y
21CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000"
22# CONFIG_USE_BOOTCOMMAND is not set
23CONFIG_MISC_INIT_R=y
24# CONFIG_DISPLAY_BOARDINFO is not set
25CONFIG_DISPLAY_BOARDINFO_LATE=y
26CONFIG_CMD_GREPENV=y
27CONFIG_CMD_EEPROM=y
28CONFIG_CMD_MEMTEST=y
29CONFIG_CMD_GPT=y
30CONFIG_CMD_I2C=y
31CONFIG_CMD_MMC=y
32CONFIG_CMD_PCI=y
Patrick Delaunay5a6b52b2019-02-27 15:20:37 +0100[diff] [blame]33CONFIG_CMD_SPI=y
34CONFIG_DEFAULT_SPI_BUS=1
Rajesh Bhagat45d8a542018-11-05 18:03:04 +0000[diff] [blame]35CONFIG_CMD_USB=y
36# CONFIG_CMD_SETEXPR is not set
37CONFIG_CMD_CACHE=y
Rajesh Bhagat45d8a542018-11-05 18:03:04 +0000[diff] [blame]38CONFIG_OF_CONTROL=y
39CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-qds"
40CONFIG_ENV_IS_IN_SPI_FLASH=y
Patrick Delaunayf8e932e2019-02-27 15:20:38 +0100[diff] [blame]41CONFIG_USE_ENV_SPI_BUS=y
42CONFIG_ENV_SPI_BUS=0
43CONFIG_USE_ENV_SPI_MAX_HZ=y
44CONFIG_ENV_SPI_MAX_HZ=1000000
45CONFIG_USE_ENV_SPI_MODE=y
46CONFIG_ENV_SPI_MODE=0x03
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]47CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Rajesh Bhagat45d8a542018-11-05 18:03:04 +0000[diff] [blame]48CONFIG_NET_RANDOM_ETHADDR=y
49CONFIG_DM=y
50CONFIG_SCSI_AHCI=y
51CONFIG_SATA_CEVA=y
Tom Rini6bd3b142020-02-06 13:42:52 -0500[diff] [blame]52CONFIG_DM_I2C=y
Rajesh Bhagat45d8a542018-11-05 18:03:04 +0000[diff] [blame]53CONFIG_DM_MMC=y
54CONFIG_FSL_ESDHC=y
Miquel Raynal803baa22019-10-03 19:50:08 +0200[diff] [blame]55CONFIG_MTD=y
Tom Rinie799f922019-12-04 17:18:38 -0500[diff] [blame]56CONFIG_DM_SPI_FLASH=y
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]57CONFIG_SF_DEFAULT_BUS=1
58CONFIG_SF_DEFAULT_MODE=0
59CONFIG_SF_DEFAULT_SPEED=10000000
Ashish Kumar820fa952019-05-31 16:03:28 +0530[diff] [blame]60# CONFIG_SPI_FLASH_BAR is not set
Rajesh Bhagat45d8a542018-11-05 18:03:04 +0000[diff] [blame]61# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
62CONFIG_FSL_PFE=y
63CONFIG_DM_ETH=y
64CONFIG_E1000=y
65CONFIG_PCI=y
66CONFIG_DM_PCI=y
67CONFIG_DM_PCI_COMPAT=y
68CONFIG_PCIE_LAYERSCAPE=y
Tom Rini6bd3b142020-02-06 13:42:52 -0500[diff] [blame]69CONFIG_DM_RTC=y
Rajesh Bhagat45d8a542018-11-05 18:03:04 +0000[diff] [blame]70CONFIG_SCSI=y
71CONFIG_DM_SCSI=y
72CONFIG_SYS_NS16550=y
73CONFIG_SPI=y
74CONFIG_DM_SPI=y
75CONFIG_FSL_DSPI=y
Ashish Kumar820fa952019-05-31 16:03:28 +0530[diff] [blame]76CONFIG_FSL_QSPI=y
Rajesh Bhagat45d8a542018-11-05 18:03:04 +0000[diff] [blame]77CONFIG_USB=y
78CONFIG_DM_USB=y
79CONFIG_USB_XHCI_HCD=y
80CONFIG_USB_XHCI_DWC3=y