Kumar Gala | f57f498 | 2008-01-17 01:44:34 -0600 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2008 Freescale Semiconductor, Inc. |
| 3 | * |
| 4 | * (C) Copyright 2000 |
| 5 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 6 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 7 | * SPDX-License-Identifier: GPL-2.0+ |
Kumar Gala | f57f498 | 2008-01-17 01:44:34 -0600 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #include <common.h> |
| 11 | #include <asm/mmu.h> |
| 12 | |
| 13 | struct fsl_e_tlb_entry tlb_table[] = { |
| 14 | /* TLB 0 - for temp stack in cache */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 15 | SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR, CONFIG_SYS_INIT_RAM_ADDR, |
Kumar Gala | f57f498 | 2008-01-17 01:44:34 -0600 | [diff] [blame] | 16 | MAS3_SX|MAS3_SW|MAS3_SR, 0, |
| 17 | 0, 0, BOOKE_PAGESZ_4K, 0), |
Paul Gortmaker | fc63627 | 2009-09-23 17:30:57 -0400 | [diff] [blame] | 18 | SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024, |
| 19 | CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024, |
Kumar Gala | f57f498 | 2008-01-17 01:44:34 -0600 | [diff] [blame] | 20 | MAS3_SX|MAS3_SW|MAS3_SR, 0, |
| 21 | 0, 0, BOOKE_PAGESZ_4K, 0), |
Paul Gortmaker | fc63627 | 2009-09-23 17:30:57 -0400 | [diff] [blame] | 22 | SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024, |
| 23 | CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024, |
Kumar Gala | f57f498 | 2008-01-17 01:44:34 -0600 | [diff] [blame] | 24 | MAS3_SX|MAS3_SW|MAS3_SR, 0, |
| 25 | 0, 0, BOOKE_PAGESZ_4K, 0), |
Paul Gortmaker | fc63627 | 2009-09-23 17:30:57 -0400 | [diff] [blame] | 26 | SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024, |
| 27 | CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024, |
Kumar Gala | f57f498 | 2008-01-17 01:44:34 -0600 | [diff] [blame] | 28 | MAS3_SX|MAS3_SW|MAS3_SR, 0, |
| 29 | 0, 0, BOOKE_PAGESZ_4K, 0), |
| 30 | |
| 31 | /* |
Paul Gortmaker | 62ad034 | 2009-09-18 19:08:41 -0400 | [diff] [blame] | 32 | * TLB 0: 64M Non-cacheable, guarded |
Paul Gortmaker | a6d378a | 2011-12-30 23:53:07 -0500 | [diff] [blame] | 33 | * 0xfc000000 56M unused |
Paul Gortmaker | 62ad034 | 2009-09-18 19:08:41 -0400 | [diff] [blame] | 34 | * 0xff800000 8M boot FLASH |
Paul Gortmaker | a6d378a | 2011-12-30 23:53:07 -0500 | [diff] [blame] | 35 | * .... or .... |
| 36 | * 0xfc000000 64M user flash |
| 37 | * |
Kumar Gala | f57f498 | 2008-01-17 01:44:34 -0600 | [diff] [blame] | 38 | * Out of reset this entry is only 4K. |
| 39 | */ |
Paul Gortmaker | a6d378a | 2011-12-30 23:53:07 -0500 | [diff] [blame] | 40 | SET_TLB_ENTRY(1, 0xfc000000, 0xfc000000, |
Kumar Gala | f57f498 | 2008-01-17 01:44:34 -0600 | [diff] [blame] | 41 | MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, |
Paul Gortmaker | 62ad034 | 2009-09-18 19:08:41 -0400 | [diff] [blame] | 42 | 0, 0, BOOKE_PAGESZ_64M, 1), |
Kumar Gala | f57f498 | 2008-01-17 01:44:34 -0600 | [diff] [blame] | 43 | |
| 44 | /* |
Paul Gortmaker | 3bff642 | 2009-09-20 20:36:05 -0400 | [diff] [blame] | 45 | * TLB 1: 1G Non-cacheable, guarded |
| 46 | * 0x80000000 512M PCI1 MEM |
| 47 | * 0xa0000000 512M PCIe MEM |
Kumar Gala | f57f498 | 2008-01-17 01:44:34 -0600 | [diff] [blame] | 48 | */ |
Paul Gortmaker | 3bff642 | 2009-09-20 20:36:05 -0400 | [diff] [blame] | 49 | SET_TLB_ENTRY(1, CONFIG_SYS_PCI1_MEM_VIRT, CONFIG_SYS_PCI1_MEM_PHYS, |
Kumar Gala | f57f498 | 2008-01-17 01:44:34 -0600 | [diff] [blame] | 50 | MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, |
Paul Gortmaker | 3bff642 | 2009-09-20 20:36:05 -0400 | [diff] [blame] | 51 | 0, 1, BOOKE_PAGESZ_1G, 1), |
Kumar Gala | f57f498 | 2008-01-17 01:44:34 -0600 | [diff] [blame] | 52 | |
| 53 | /* |
Becky Bruce | 5e35d8a | 2010-12-17 17:17:56 -0600 | [diff] [blame] | 54 | * TLB 2: 64M Non-cacheable, guarded |
Kumar Gala | f57f498 | 2008-01-17 01:44:34 -0600 | [diff] [blame] | 55 | * 0xe0000000 1M CCSRBAR |
Paul Gortmaker | 3bff642 | 2009-09-20 20:36:05 -0400 | [diff] [blame] | 56 | * 0xe2000000 8M PCI1 IO |
| 57 | * 0xe2800000 8M PCIe IO |
Kumar Gala | f57f498 | 2008-01-17 01:44:34 -0600 | [diff] [blame] | 58 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 59 | SET_TLB_ENTRY(1, CONFIG_SYS_CCSRBAR, CONFIG_SYS_CCSRBAR_PHYS, |
Kumar Gala | f57f498 | 2008-01-17 01:44:34 -0600 | [diff] [blame] | 60 | MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, |
Becky Bruce | 5e35d8a | 2010-12-17 17:17:56 -0600 | [diff] [blame] | 61 | 0, 2, BOOKE_PAGESZ_64M, 1), |
Kumar Gala | f57f498 | 2008-01-17 01:44:34 -0600 | [diff] [blame] | 62 | |
Paul Gortmaker | 17f9184 | 2011-12-30 23:53:10 -0500 | [diff] [blame] | 63 | #ifdef CONFIG_SYS_LBC_SDRAM_BASE |
Kumar Gala | f57f498 | 2008-01-17 01:44:34 -0600 | [diff] [blame] | 64 | /* |
Becky Bruce | 5e35d8a | 2010-12-17 17:17:56 -0600 | [diff] [blame] | 65 | * TLB 3: 64M Cacheable, non-guarded |
Paul Gortmaker | 7fa3832 | 2009-09-20 20:36:04 -0400 | [diff] [blame] | 66 | * 0xf0000000 64M LBC SDRAM First half |
Kumar Gala | f57f498 | 2008-01-17 01:44:34 -0600 | [diff] [blame] | 67 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 68 | SET_TLB_ENTRY(1, CONFIG_SYS_LBC_SDRAM_BASE, CONFIG_SYS_LBC_SDRAM_BASE, |
York Sun | 05204d0 | 2017-12-05 10:57:54 -0800 | [diff] [blame] | 69 | MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M, |
Becky Bruce | 5e35d8a | 2010-12-17 17:17:56 -0600 | [diff] [blame] | 70 | 0, 3, BOOKE_PAGESZ_64M, 1), |
Kumar Gala | f57f498 | 2008-01-17 01:44:34 -0600 | [diff] [blame] | 71 | |
| 72 | /* |
Becky Bruce | 5e35d8a | 2010-12-17 17:17:56 -0600 | [diff] [blame] | 73 | * TLB 4: 64M Cacheable, non-guarded |
Paul Gortmaker | 7fa3832 | 2009-09-20 20:36:04 -0400 | [diff] [blame] | 74 | * 0xf4000000 64M LBC SDRAM Second half |
| 75 | */ |
| 76 | SET_TLB_ENTRY(1, CONFIG_SYS_LBC_SDRAM_BASE + 0x4000000, |
| 77 | CONFIG_SYS_LBC_SDRAM_BASE + 0x4000000, |
York Sun | 05204d0 | 2017-12-05 10:57:54 -0800 | [diff] [blame] | 78 | MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M, |
Becky Bruce | 5e35d8a | 2010-12-17 17:17:56 -0600 | [diff] [blame] | 79 | 0, 4, BOOKE_PAGESZ_64M, 1), |
Paul Gortmaker | 17f9184 | 2011-12-30 23:53:10 -0500 | [diff] [blame] | 80 | #endif |
Paul Gortmaker | 7fa3832 | 2009-09-20 20:36:04 -0400 | [diff] [blame] | 81 | |
| 82 | /* |
Becky Bruce | 5e35d8a | 2010-12-17 17:17:56 -0600 | [diff] [blame] | 83 | * TLB 5: 16M Cacheable, non-guarded |
Kumar Gala | f57f498 | 2008-01-17 01:44:34 -0600 | [diff] [blame] | 84 | * 0xf8000000 1M 7-segment LED display |
| 85 | * 0xf8100000 1M User switches |
| 86 | * 0xf8300000 1M Board revision |
| 87 | * 0xf8b00000 1M EEPROM |
| 88 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 89 | SET_TLB_ENTRY(1, CONFIG_SYS_EPLD_BASE, CONFIG_SYS_EPLD_BASE, |
Kumar Gala | f57f498 | 2008-01-17 01:44:34 -0600 | [diff] [blame] | 90 | MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, |
Becky Bruce | 5e35d8a | 2010-12-17 17:17:56 -0600 | [diff] [blame] | 91 | 0, 5, BOOKE_PAGESZ_16M, 1), |
Paul Gortmaker | 62ad034 | 2009-09-18 19:08:41 -0400 | [diff] [blame] | 92 | |
Paul Gortmaker | 626fa26 | 2011-12-30 23:53:08 -0500 | [diff] [blame] | 93 | #ifndef CONFIG_SYS_ALT_BOOT |
Paul Gortmaker | 62ad034 | 2009-09-18 19:08:41 -0400 | [diff] [blame] | 94 | /* |
Paul Gortmaker | a6d378a | 2011-12-30 23:53:07 -0500 | [diff] [blame] | 95 | * TLB 6: 64M Non-cacheable, guarded |
| 96 | * 0xec000000 64M 64MB user FLASH |
Paul Gortmaker | 62ad034 | 2009-09-18 19:08:41 -0400 | [diff] [blame] | 97 | */ |
| 98 | SET_TLB_ENTRY(1, CONFIG_SYS_ALT_FLASH, CONFIG_SYS_ALT_FLASH, |
| 99 | MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, |
Paul Gortmaker | a6d378a | 2011-12-30 23:53:07 -0500 | [diff] [blame] | 100 | 0, 6, BOOKE_PAGESZ_64M, 1), |
Paul Gortmaker | 626fa26 | 2011-12-30 23:53:08 -0500 | [diff] [blame] | 101 | #else |
| 102 | /* |
| 103 | * TLB 6: 4M Non-cacheable, guarded |
| 104 | * 0xef800000 4M 1st 1/2 8MB soldered FLASH |
| 105 | */ |
| 106 | SET_TLB_ENTRY(1, CONFIG_SYS_ALT_FLASH, CONFIG_SYS_ALT_FLASH, |
| 107 | MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, |
| 108 | 0, 6, BOOKE_PAGESZ_4M, 1), |
| 109 | |
| 110 | /* |
| 111 | * TLB 7: 4M Non-cacheable, guarded |
| 112 | * 0xefc00000 4M 2nd half 8MB soldered FLASH |
| 113 | */ |
| 114 | SET_TLB_ENTRY(1, CONFIG_SYS_ALT_FLASH + 0x400000, |
| 115 | CONFIG_SYS_ALT_FLASH + 0x400000, |
| 116 | MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, |
| 117 | 0, 7, BOOKE_PAGESZ_4M, 1), |
| 118 | #endif |
Paul Gortmaker | 62ad034 | 2009-09-18 19:08:41 -0400 | [diff] [blame] | 119 | |
Kumar Gala | f57f498 | 2008-01-17 01:44:34 -0600 | [diff] [blame] | 120 | }; |
| 121 | |
| 122 | int num_tlb_entries = ARRAY_SIZE(tlb_table); |