blob: 9766563d02d66565e552660ff697fb8e7101cf11 [file] [log] [blame]
Minkyu Kangae6f0c62009-07-20 11:40:01 +09001/*
Steve Sakoman1ad21582010-06-08 13:07:46 -07002 * Board specific setup info
3 *
4 * (C) Copyright 2010
5 * Texas Instruments, <www.ti.com>
6 *
7 * Author :
8 * Aneesh V <aneesh@ti.com>
Minkyu Kangae6f0c62009-07-20 11:40:01 +09009 *
10 * See file CREDITS for list of people who contributed to this
11 * project.
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA
27 */
28
Sricharan9310ff72011-11-15 09:49:55 -050029#include <asm/arch/omap.h>
Aneesh Vfd8798b2012-03-08 07:20:18 +000030#include <linux/linkage.h>
Sricharan308fe922011-11-15 09:50:03 -050031
Aneesh Vfd8798b2012-03-08 07:20:18 +000032ENTRY(save_boot_params)
Aneesh V13a74c12011-07-21 09:10:27 -040033 /*
34 * See if the rom code passed pointer is valid:
35 * It is not valid if it is not in non-secure SRAM
36 * This may happen if you are booting with the help of
37 * debugger
38 */
39 ldr r2, =NON_SECURE_SRAM_START
40 cmp r2, r0
41 bgt 1f
42 ldr r2, =NON_SECURE_SRAM_END
43 cmp r2, r0
44 blt 1f
45
Sricharan308fe922011-11-15 09:50:03 -050046 /*
47 * store the boot params passed from rom code or saved
48 * and passed by SPL
49 */
50 cmp r0, #0
51 beq 1f
52 ldr r1, =boot_params
53 str r0, [r1]
54#ifdef CONFIG_SPL_BUILD
Tom Rini0be93ff2012-08-13 12:53:23 -070055 /* Store the boot device in spl_boot_device */
Sricharan308fe922011-11-15 09:50:03 -050056 ldrb r2, [r0, #BOOT_DEVICE_OFFSET] @ r1 <- value of boot device
Aneesh V13a74c12011-07-21 09:10:27 -040057 and r2, #BOOT_DEVICE_MASK
Sricharan308fe922011-11-15 09:50:03 -050058 ldr r3, =boot_params
Tom Rini0be93ff2012-08-13 12:53:23 -070059 strb r2, [r3, #BOOT_DEVICE_OFFSET] @ spl_boot_device <- r1
Aneesh V13a74c12011-07-21 09:10:27 -040060
Sricharan308fe922011-11-15 09:50:03 -050061 /* boot mode is passed only for devices that can raw/fat mode */
62 cmp r2, #2
63 blt 2f
64 cmp r2, #7
65 bgt 2f
Tom Rini69fa4442012-08-14 09:20:06 -070066 /* Store the boot mode (raw/FAT) in omap_bootmode */
Aneesh V13a74c12011-07-21 09:10:27 -040067 ldr r2, [r0, #DEV_DESC_PTR_OFFSET] @ get the device descriptor ptr
68 ldr r2, [r2, #DEV_DATA_PTR_OFFSET] @ get the pDeviceData ptr
69 ldr r2, [r2, #BOOT_MODE_OFFSET] @ get the boot mode
Sricharan9310ff72011-11-15 09:49:55 -050070 ldr r3, =omap_bootmode
Aneesh V13a74c12011-07-21 09:10:27 -040071 str r2, [r3]
Sricharan308fe922011-11-15 09:50:03 -050072#endif
732:
74 ldrb r2, [r0, #CH_FLAGS_OFFSET]
75 ldr r3, =boot_params
76 strb r2, [r3, #CH_FLAGS_OFFSET]
Aneesh V13a74c12011-07-21 09:10:27 -0400771:
78 bx lr
Aneesh Vfd8798b2012-03-08 07:20:18 +000079ENDPROC(save_boot_params)
Sricharan308fe922011-11-15 09:50:03 -050080
Aneesh Vfd8798b2012-03-08 07:20:18 +000081ENTRY(set_pl310_ctrl_reg)
Aneesh Ve3405bd2011-06-16 23:30:52 +000082 PUSH {r4-r11, lr} @ save registers - ROM code may pollute
83 @ our registers
84 LDR r12, =0x102 @ Set PL310 control register - value in R0
85 .word 0xe1600070 @ SMC #0 - hand assembled because -march=armv5
86 @ call ROM Code API to set control register
87 POP {r4-r11, pc}
Aneesh Vfd8798b2012-03-08 07:20:18 +000088ENDPROC(set_pl310_ctrl_reg)