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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pwm/pwm-tiehrpwm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: TI SOC EHRPWM based PWM controller
8
9maintainers:
10 - Vignesh R <vigneshr@ti.com>
11
12allOf:
13 - $ref: pwm.yaml#
14
15properties:
16 compatible:
17 oneOf:
18 - const: ti,am3352-ehrpwm
19 - items:
20 - enum:
21 - ti,da850-ehrpwm
22 - ti,am4372-ehrpwm
23 - ti,dra746-ehrpwm
24 - ti,am654-ehrpwm
25 - ti,am64-epwm
26 - const: ti,am3352-ehrpwm
27
28 reg:
29 maxItems: 1
30
31 "#pwm-cells":
32 const: 3
33 description: |
34 See pwm.yaml in this directory for a description of the cells format.
35 The only third cell flag supported by this binding is PWM_POLARITY_INVERTED.
36
37 clock-names:
38 items:
39 - const: tbclk
40 - const: fck
41
42 clocks:
43 maxItems: 2
44
45 power-domains:
46 maxItems: 1
47
48required:
49 - compatible
50 - reg
51 - clocks
52 - clock-names
53
54additionalProperties: false
55
56examples:
57 - |
58 ehrpwm0: pwm@48300200 { /* EHRPWM on am33xx */
59 compatible = "ti,am3352-ehrpwm";
60 #pwm-cells = <3>;
61 reg = <0x48300200 0x100>;
62 clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
63 clock-names = "tbclk", "fck";
64 };