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diff --git a/Bindings/pwm/pwm-tiehrpwm.yaml b/Bindings/pwm/pwm-tiehrpwm.yaml
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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pwm/pwm-tiehrpwm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: TI SOC EHRPWM based PWM controller
+
+maintainers:
+ - Vignesh R <vigneshr@ti.com>
+
+allOf:
+ - $ref: pwm.yaml#
+
+properties:
+ compatible:
+ oneOf:
+ - const: ti,am3352-ehrpwm
+ - items:
+ - enum:
+ - ti,da850-ehrpwm
+ - ti,am4372-ehrpwm
+ - ti,dra746-ehrpwm
+ - ti,am654-ehrpwm
+ - ti,am64-epwm
+ - const: ti,am3352-ehrpwm
+
+ reg:
+ maxItems: 1
+
+ "#pwm-cells":
+ const: 3
+ description: |
+ See pwm.yaml in this directory for a description of the cells format.
+ The only third cell flag supported by this binding is PWM_POLARITY_INVERTED.
+
+ clock-names:
+ items:
+ - const: tbclk
+ - const: fck
+
+ clocks:
+ maxItems: 2
+
+ power-domains:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ ehrpwm0: pwm@48300200 { /* EHRPWM on am33xx */
+ compatible = "ti,am3352-ehrpwm";
+ #pwm-cells = <3>;
+ reg = <0x48300200 0x100>;
+ clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
+ clock-names = "tbclk", "fck";
+ };