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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
TsiChungLiew99b037a2008-01-14 17:43:33 -06002/*
3 * (C) Copyright 2000-2003
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
Alison Wang8bce3ec2012-03-26 21:49:03 +00006 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
TsiChungLiew99b037a2008-01-14 17:43:33 -06007 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
TsiChungLiew99b037a2008-01-14 17:43:33 -06008 */
9
10#include <common.h>
Simon Glass0ffd9db2019-12-28 10:45:06 -070011#include <init.h>
TsiChungLiew99b037a2008-01-14 17:43:33 -060012#include <asm/immap.h>
Alison Wang8bce3ec2012-03-26 21:49:03 +000013#include <asm/io.h>
Simon Glassdbd79542020-05-10 11:40:11 -060014#include <linux/delay.h>
TsiChungLiew99b037a2008-01-14 17:43:33 -060015
16DECLARE_GLOBAL_DATA_PTR;
17
18int checkboard(void)
19{
20 puts("Board: ");
21 puts("Freescale M52277 EVB\n");
22 return 0;
23};
24
Simon Glassd35f3382017-04-06 12:47:05 -060025int dram_init(void)
TsiChungLiew99b037a2008-01-14 17:43:33 -060026{
TsiChung Liew39966e32008-10-21 15:37:02 +000027 u32 dramsize;
28
29#ifdef CONFIG_CF_SBF
30 /*
31 * Serial Boot: The dram is already initialized in start.S
32 * only require to return DRAM size
33 */
34 dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
35#else
Alison Wang8bce3ec2012-03-26 21:49:03 +000036 sdramc_t *sdram = (sdramc_t *)(MMAP_SDRAM);
37 gpio_t *gpio = (gpio_t *)(MMAP_GPIO);
TsiChung Liew39966e32008-10-21 15:37:02 +000038 u32 i;
TsiChungLiew99b037a2008-01-14 17:43:33 -060039
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020040 dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
TsiChungLiew99b037a2008-01-14 17:43:33 -060041
42 for (i = 0x13; i < 0x20; i++) {
43 if (dramsize == (1 << i))
44 break;
45 }
46 i--;
47
Alison Wang8bce3ec2012-03-26 21:49:03 +000048 out_8(&gpio->mscr_sdram, CONFIG_SYS_SDRAM_DRV_STRENGTH);
TsiChung Liew39966e32008-10-21 15:37:02 +000049
Alison Wang8bce3ec2012-03-26 21:49:03 +000050 out_be32(&sdram->sdcs0, CONFIG_SYS_SDRAM_BASE | i);
TsiChungLiew99b037a2008-01-14 17:43:33 -060051
Alison Wang8bce3ec2012-03-26 21:49:03 +000052 out_be32(&sdram->sdcfg1, CONFIG_SYS_SDRAM_CFG1);
53 out_be32(&sdram->sdcfg2, CONFIG_SYS_SDRAM_CFG2);
TsiChungLiew99b037a2008-01-14 17:43:33 -060054
55 /* Issue PALL */
Alison Wang8bce3ec2012-03-26 21:49:03 +000056 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 2);
TsiChung Liew39966e32008-10-21 15:37:02 +000057 __asm__("nop");
TsiChungLiew99b037a2008-01-14 17:43:33 -060058
59 /* Issue LEMR */
Alison Wang8bce3ec2012-03-26 21:49:03 +000060 out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_MODE);
TsiChung Liew39966e32008-10-21 15:37:02 +000061 __asm__("nop");
Alison Wang8bce3ec2012-03-26 21:49:03 +000062 out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_EMOD);
TsiChung Liew39966e32008-10-21 15:37:02 +000063 __asm__("nop");
TsiChungLiew99b037a2008-01-14 17:43:33 -060064
65 udelay(1000);
66
67 /* Issue PALL */
Alison Wang8bce3ec2012-03-26 21:49:03 +000068 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 2);
TsiChung Liew39966e32008-10-21 15:37:02 +000069 __asm__("nop");
TsiChungLiew99b037a2008-01-14 17:43:33 -060070
71 /* Perform two refresh cycles */
Alison Wang8bce3ec2012-03-26 21:49:03 +000072 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 4);
TsiChung Liew39966e32008-10-21 15:37:02 +000073 __asm__("nop");
Alison Wang8bce3ec2012-03-26 21:49:03 +000074 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 4);
TsiChung Liew39966e32008-10-21 15:37:02 +000075 __asm__("nop");
TsiChungLiew99b037a2008-01-14 17:43:33 -060076
Alison Wang8bce3ec2012-03-26 21:49:03 +000077 out_be32(&sdram->sdcr,
78 (CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000c00);
TsiChungLiew99b037a2008-01-14 17:43:33 -060079
80 udelay(100);
TsiChung Liew39966e32008-10-21 15:37:02 +000081#endif
Simon Glass39f90ba2017-03-31 08:40:25 -060082 gd->ram_size = dramsize;
83
84 return 0;
TsiChungLiew99b037a2008-01-14 17:43:33 -060085};
86
87int testdram(void)
88{
89 /* TODO: XXX XXX XXX */
90 printf("DRAM test not implemented!\n");
91
92 return (0);
93}