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TsiChungLiew99b037a2008-01-14 17:43:33 -06001/*
2 * (C) Copyright 2000-2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Alison Wang8bce3ec2012-03-26 21:49:03 +00005 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
TsiChungLiew99b037a2008-01-14 17:43:33 -06006 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
7 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02008 * SPDX-License-Identifier: GPL-2.0+
TsiChungLiew99b037a2008-01-14 17:43:33 -06009 */
10
11#include <common.h>
12#include <asm/immap.h>
Alison Wang8bce3ec2012-03-26 21:49:03 +000013#include <asm/io.h>
TsiChungLiew99b037a2008-01-14 17:43:33 -060014
15DECLARE_GLOBAL_DATA_PTR;
16
17int checkboard(void)
18{
19 puts("Board: ");
20 puts("Freescale M52277 EVB\n");
21 return 0;
22};
23
Simon Glass39f90ba2017-03-31 08:40:25 -060024int initdram(void)
TsiChungLiew99b037a2008-01-14 17:43:33 -060025{
TsiChung Liew39966e32008-10-21 15:37:02 +000026 u32 dramsize;
27
28#ifdef CONFIG_CF_SBF
29 /*
30 * Serial Boot: The dram is already initialized in start.S
31 * only require to return DRAM size
32 */
33 dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
34#else
Alison Wang8bce3ec2012-03-26 21:49:03 +000035 sdramc_t *sdram = (sdramc_t *)(MMAP_SDRAM);
36 gpio_t *gpio = (gpio_t *)(MMAP_GPIO);
TsiChung Liew39966e32008-10-21 15:37:02 +000037 u32 i;
TsiChungLiew99b037a2008-01-14 17:43:33 -060038
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020039 dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
TsiChungLiew99b037a2008-01-14 17:43:33 -060040
41 for (i = 0x13; i < 0x20; i++) {
42 if (dramsize == (1 << i))
43 break;
44 }
45 i--;
46
Alison Wang8bce3ec2012-03-26 21:49:03 +000047 out_8(&gpio->mscr_sdram, CONFIG_SYS_SDRAM_DRV_STRENGTH);
TsiChung Liew39966e32008-10-21 15:37:02 +000048
Alison Wang8bce3ec2012-03-26 21:49:03 +000049 out_be32(&sdram->sdcs0, CONFIG_SYS_SDRAM_BASE | i);
TsiChungLiew99b037a2008-01-14 17:43:33 -060050
Alison Wang8bce3ec2012-03-26 21:49:03 +000051 out_be32(&sdram->sdcfg1, CONFIG_SYS_SDRAM_CFG1);
52 out_be32(&sdram->sdcfg2, CONFIG_SYS_SDRAM_CFG2);
TsiChungLiew99b037a2008-01-14 17:43:33 -060053
54 /* Issue PALL */
Alison Wang8bce3ec2012-03-26 21:49:03 +000055 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 2);
TsiChung Liew39966e32008-10-21 15:37:02 +000056 __asm__("nop");
TsiChungLiew99b037a2008-01-14 17:43:33 -060057
58 /* Issue LEMR */
Alison Wang8bce3ec2012-03-26 21:49:03 +000059 out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_MODE);
TsiChung Liew39966e32008-10-21 15:37:02 +000060 __asm__("nop");
Alison Wang8bce3ec2012-03-26 21:49:03 +000061 out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_EMOD);
TsiChung Liew39966e32008-10-21 15:37:02 +000062 __asm__("nop");
TsiChungLiew99b037a2008-01-14 17:43:33 -060063
64 udelay(1000);
65
66 /* Issue PALL */
Alison Wang8bce3ec2012-03-26 21:49:03 +000067 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 2);
TsiChung Liew39966e32008-10-21 15:37:02 +000068 __asm__("nop");
TsiChungLiew99b037a2008-01-14 17:43:33 -060069
70 /* Perform two refresh cycles */
Alison Wang8bce3ec2012-03-26 21:49:03 +000071 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 4);
TsiChung Liew39966e32008-10-21 15:37:02 +000072 __asm__("nop");
Alison Wang8bce3ec2012-03-26 21:49:03 +000073 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 4);
TsiChung Liew39966e32008-10-21 15:37:02 +000074 __asm__("nop");
TsiChungLiew99b037a2008-01-14 17:43:33 -060075
Alison Wang8bce3ec2012-03-26 21:49:03 +000076 out_be32(&sdram->sdcr,
77 (CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000c00);
TsiChungLiew99b037a2008-01-14 17:43:33 -060078
79 udelay(100);
TsiChung Liew39966e32008-10-21 15:37:02 +000080#endif
Simon Glass39f90ba2017-03-31 08:40:25 -060081 gd->ram_size = dramsize;
82
83 return 0;
TsiChungLiew99b037a2008-01-14 17:43:33 -060084};
85
86int testdram(void)
87{
88 /* TODO: XXX XXX XXX */
89 printf("DRAM test not implemented!\n");
90
91 return (0);
92}