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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Dirk Eibach762d3df2013-06-26 15:55:17 +02002/*
3 * Copyright 2010 Freescale Semiconductor, Inc.
4 * Authors: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
5 * Timur Tabi <timur@freescale.com>
Dirk Eibach762d3df2013-06-26 15:55:17 +02006 */
7
8#include <common.h>
9#include <i2c.h>
Simon Glass0f2af882020-05-10 11:40:05 -060010#include <log.h>
Dirk Eibach762d3df2013-06-26 15:55:17 +020011
York Sunf0626592013-09-30 09:22:09 -070012#include <fsl_ddr_sdram.h>
13#include <fsl_ddr_dimm_params.h>
Dirk Eibach762d3df2013-06-26 15:55:17 +020014
15void fsl_ddr_board_options(memctl_options_t *popts, dimm_params_t *pdimm,
16 unsigned int ctrl_num)
17{
18 unsigned int i;
19
20 if (ctrl_num) {
21 printf("Wrong parameter for controller number %d", ctrl_num);
22 return;
23 }
24 if (!pdimm->n_ranks)
25 return;
26
27 /* set odt_rd_cfg and odt_wr_cfg. */
28 for (i = 0; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) {
29 popts->cs_local_opts[i].odt_rd_cfg = 0;
30 popts->cs_local_opts[i].odt_wr_cfg = 1;
31 }
32
33 popts->clk_adjust = 5;
34 popts->cpo_override = 0x1f;
35 popts->write_data_delay = 2;
36 popts->half_strength_driver_enable = 1;
37
38 /* Per AN4039, enable ZQ calibration. */
39 popts->zq_en = 1;
40}
41
42#ifdef CONFIG_SPD_EEPROM
43/*
44 * we only have a "fake" SPD-EEPROM here, which has 16 bit addresses
45 */
46void get_spd(generic_spd_eeprom_t *spd, u8 i2c_address)
47{
48 int ret = i2c_read(i2c_address, 0, 2, (uchar *)spd,
49 sizeof(generic_spd_eeprom_t));
50
51 if (ret) {
52 if (i2c_address ==
53#ifdef SPD_EEPROM_ADDRESS
54 SPD_EEPROM_ADDRESS
55#elif defined(SPD_EEPROM_ADDRESS1)
56 SPD_EEPROM_ADDRESS1
57#endif
58 ) {
59 printf("DDR: failed to read SPD from address %u\n",
60 i2c_address);
61 } else {
62 debug("DDR: failed to read SPD from address %u\n",
63 i2c_address);
64 }
65 memset(spd, 0, sizeof(generic_spd_eeprom_t));
66 }
67}
68#endif