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git01.mediatek.com / filogic / uboot / 6fd4e0bab5e1b67b5e4c4230c8180a7e7ac41eed / . / test / dm / clk.c
blob: 676ef217f0931a2344c3e068375c0c935bbf668a [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]2/*
3 * Copyright (C) 2015 Google, Inc
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]4 */
5
6#include <common.h>
Jagan Tekiab127ba2019-03-05 19:42:44 +0530[diff] [blame]7#include <clk.h>
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]8#include <dm.h>
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]9#include <asm/clk.h>
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]10#include <dm/test.h>
11#include <linux/err.h>
12#include <test/ut.h>
13
Jagan Tekiab127ba2019-03-05 19:42:44 +0530[diff] [blame]14/* Base test of the clk uclass */
15static int dm_test_clk_base(struct unit_test_state *uts)
16{
17 struct udevice *dev;
18 struct clk clk_method1;
19 struct clk clk_method2;
20
21 /* Get the device using the clk device */
22 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test", &dev));
23
24 /* Get the same clk port in 2 different ways and compare */
25 ut_assertok(clk_get_by_index(dev, 1, &clk_method1));
26 ut_assertok(clk_get_by_index_nodev(dev_ofnode(dev), 1, &clk_method2));
Sekhar Noricf3119d2019-08-01 19:12:55 +0530[diff] [blame]27 ut_asserteq(clk_is_match(&clk_method1, &clk_method2), true);
Jagan Tekiab127ba2019-03-05 19:42:44 +0530[diff] [blame]28 ut_asserteq(clk_method1.id, clk_method2.id);
29
30 return 0;
31}
32
33DM_TEST(dm_test_clk_base, DM_TESTF_SCAN_FDT);
34
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]35static int dm_test_clk(struct unit_test_state *uts)
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]36{
Anup Patel8d28c3c2019-02-25 08:14:55 +0000[diff] [blame]37 struct udevice *dev_fixed, *dev_fixed_factor, *dev_clk, *dev_test;
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]38 ulong rate;
39
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]40 ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-fixed",
41 &dev_fixed));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]42
Anup Patel8d28c3c2019-02-25 08:14:55 +0000[diff] [blame]43 ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-fixed-factor",
44 &dev_fixed_factor));
45
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]46 ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-sbox",
47 &dev_clk));
48 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
49 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
50 ut_asserteq(0, sandbox_clk_query_rate(dev_clk, SANDBOX_CLK_ID_SPI));
51 ut_asserteq(0, sandbox_clk_query_rate(dev_clk, SANDBOX_CLK_ID_I2C));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]52
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]53 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test",
54 &dev_test));
55 ut_assertok(sandbox_clk_test_get(dev_test));
Fabrice Gasnier11192712018-07-24 16:31:28 +0200[diff] [blame]56 ut_assertok(sandbox_clk_test_valid(dev_test));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]57
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]58 ut_asserteq(1234,
59 sandbox_clk_test_get_rate(dev_test,
60 SANDBOX_CLK_TEST_ID_FIXED));
61 ut_asserteq(0, sandbox_clk_test_get_rate(dev_test,
62 SANDBOX_CLK_TEST_ID_SPI));
63 ut_asserteq(0, sandbox_clk_test_get_rate(dev_test,
64 SANDBOX_CLK_TEST_ID_I2C));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]65
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]66 rate = sandbox_clk_test_set_rate(dev_test, SANDBOX_CLK_TEST_ID_FIXED,
67 12345);
68 ut_assert(IS_ERR_VALUE(rate));
69 rate = sandbox_clk_test_get_rate(dev_test, SANDBOX_CLK_TEST_ID_FIXED);
70 ut_asserteq(1234, rate);
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]71
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]72 ut_asserteq(0, sandbox_clk_test_set_rate(dev_test,
73 SANDBOX_CLK_TEST_ID_SPI,
74 1000));
75 ut_asserteq(0, sandbox_clk_test_set_rate(dev_test,
76 SANDBOX_CLK_TEST_ID_I2C,
77 2000));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]78
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]79 ut_asserteq(1000, sandbox_clk_test_get_rate(dev_test,
80 SANDBOX_CLK_TEST_ID_SPI));
81 ut_asserteq(2000, sandbox_clk_test_get_rate(dev_test,
82 SANDBOX_CLK_TEST_ID_I2C));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]83
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]84 ut_asserteq(1000, sandbox_clk_test_set_rate(dev_test,
85 SANDBOX_CLK_TEST_ID_SPI,
86 10000));
87 ut_asserteq(2000, sandbox_clk_test_set_rate(dev_test,
88 SANDBOX_CLK_TEST_ID_I2C,
89 20000));
90
91 rate = sandbox_clk_test_set_rate(dev_test, SANDBOX_CLK_TEST_ID_SPI, 0);
92 ut_assert(IS_ERR_VALUE(rate));
93 rate = sandbox_clk_test_set_rate(dev_test, SANDBOX_CLK_TEST_ID_I2C, 0);
94 ut_assert(IS_ERR_VALUE(rate));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]95
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]96 ut_asserteq(10000, sandbox_clk_test_get_rate(dev_test,
97 SANDBOX_CLK_TEST_ID_SPI));
98 ut_asserteq(20000, sandbox_clk_test_get_rate(dev_test,
99 SANDBOX_CLK_TEST_ID_I2C));
100
101 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
102 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
103 ut_asserteq(10000, sandbox_clk_query_rate(dev_clk, SANDBOX_CLK_ID_SPI));
104 ut_asserteq(20000, sandbox_clk_query_rate(dev_clk, SANDBOX_CLK_ID_I2C));
105
106 ut_assertok(sandbox_clk_test_enable(dev_test, SANDBOX_CLK_TEST_ID_SPI));
107 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
108 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
109
110 ut_assertok(sandbox_clk_test_enable(dev_test, SANDBOX_CLK_TEST_ID_I2C));
111 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
112 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
113
114 ut_assertok(sandbox_clk_test_disable(dev_test,
115 SANDBOX_CLK_TEST_ID_SPI));
116 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
117 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
118
119 ut_assertok(sandbox_clk_test_disable(dev_test,
120 SANDBOX_CLK_TEST_ID_I2C));
121 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
122 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
123
124 ut_assertok(sandbox_clk_test_free(dev_test));
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]125
126 return 0;
127}
Stephen Warrena9622432016-06-17 09:44:00 -0600[diff] [blame]128DM_TEST(dm_test_clk, DM_TESTF_SCAN_FDT);
Neil Armstrong567a38b2018-04-03 11:44:19 +0200[diff] [blame]129
130static int dm_test_clk_bulk(struct unit_test_state *uts)
131{
132 struct udevice *dev_clk, *dev_test;
133
134 ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-sbox",
135 &dev_clk));
136 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test",
137 &dev_test));
138 ut_assertok(sandbox_clk_test_get_bulk(dev_test));
139
140 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
141 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
142
143 /* Fixed clock does not support enable, thus should not fail */
144 ut_assertok(sandbox_clk_test_enable_bulk(dev_test));
145 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
146 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
147
148 /* Fixed clock does not support disable, thus should not fail */
149 ut_assertok(sandbox_clk_test_disable_bulk(dev_test));
150 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
151 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
152
153 /* Fixed clock does not support enable, thus should not fail */
154 ut_assertok(sandbox_clk_test_enable_bulk(dev_test));
155 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
156 ut_asserteq(1, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
157
158 /* Fixed clock does not support disable, thus should not fail */
159 ut_assertok(sandbox_clk_test_release_bulk(dev_test));
160 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
161 ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
162
163 return 0;
164}
165DM_TEST(dm_test_clk_bulk, DM_TESTF_SCAN_FDT);