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Heiko Schochercfcad352013-12-02 07:47:22 +01001/*
2 * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards
3 * (C) Copyright 2013 Siemens AG
4 *
5 * Based on:
6 * U-Boot file: include/configs/at91sam9260ek.h
7 *
8 * (C) Copyright 2007-2008
9 * Stelian Pop <stelian@popies.net>
10 * Lead Tech Design <www.leadtechdesign.com>
11 *
12 * SPDX-License-Identifier: GPL-2.0+
13 */
14
15#ifndef __CONFIG_H
16#define __CONFIG_H
17
18/*
19 * SoC must be defined first, before hardware.h is included.
20 * In this case SoC is defined in boards.cfg.
21 */
22#include <asm/hardware.h>
Heiko Schocherb7773572015-08-21 18:53:46 +020023#include <linux/sizes.h>
Heiko Schochercfcad352013-12-02 07:47:22 +010024
Heiko Schocher67067172014-11-18 09:41:57 +010025#if defined(CONFIG_SPL_BUILD)
26#define CONFIG_SYS_THUMB_BUILD
27#define CONFIG_SYS_ICACHE_OFF
28#define CONFIG_SYS_DCACHE_OFF
29#endif
Heiko Schochercfcad352013-12-02 07:47:22 +010030/*
31 * Warning: changing CONFIG_SYS_TEXT_BASE requires
32 * adapting the initial boot program.
33 * Since the linker has to swallow that define, we must use a pure
34 * hex number here!
35 */
36
Heiko Schocher5453c6c2014-10-31 08:31:05 +010037#define CONFIG_SYS_TEXT_BASE 0x21000000
Heiko Schochercfcad352013-12-02 07:47:22 +010038
39/* ARM asynchronous clock */
40#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
41#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */
Heiko Schochercfcad352013-12-02 07:47:22 +010042
43/* Misc CPU related */
44#define CONFIG_ARCH_CPU_INIT
45#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
46#define CONFIG_SETUP_MEMORY_TAGS
47#define CONFIG_INITRD_TAG
Heiko Schocher649d8102016-05-25 07:23:48 +020048#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
Heiko Schochercfcad352013-12-02 07:47:22 +010049#define CONFIG_BOARD_EARLY_INIT_F
Heiko Schochercfcad352013-12-02 07:47:22 +010050
Heiko Schochercfcad352013-12-02 07:47:22 +010051/* general purpose I/O */
52#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
53#define CONFIG_AT91_GPIO
54#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
55
56/* serial console */
57#define CONFIG_ATMEL_USART
58#define CONFIG_USART_BASE ATMEL_BASE_DBGU
59#define CONFIG_USART_ID ATMEL_ID_SYS
60#define CONFIG_BAUDRATE 115200
61
Heiko Schochercfcad352013-12-02 07:47:22 +010062
63/*
64 * Command line configuration.
65 */
Heiko Schochercfcad352013-12-02 07:47:22 +010066#define CONFIG_CMD_NAND
67
68/*
69 * SDRAM: 1 bank, min 32, max 128 MB
70 * Initialized before u-boot gets started.
71 */
72#define CONFIG_NR_DRAM_BANKS 1
73#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
Heiko Schocher6dcb3622015-08-21 18:55:07 +020074#define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M)
Heiko Schochercfcad352013-12-02 07:47:22 +010075
76/*
77 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
78 * leaving the correct space for initial global data structure above
79 * that address while providing maximum stack area below.
80 */
Heiko Schocher6dcb3622015-08-21 18:55:07 +020081#define CONFIG_SYS_INIT_SP_ADDR \
Heiko Schochercfcad352013-12-02 07:47:22 +010082 (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
83
84/* NAND flash */
85#ifdef CONFIG_CMD_NAND
86#define CONFIG_NAND_ATMEL
87#define CONFIG_SYS_MAX_NAND_DEVICE 1
88#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
89#define CONFIG_SYS_NAND_DBW_8
90#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
91#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
92#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
93#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
94#endif
95
96/* NOR flash - no real flash on this board */
97#define CONFIG_SYS_NO_FLASH 1
98
99/* Ethernet */
100#define CONFIG_MACB
Wenyou Yang7b811852016-05-17 13:11:35 +0800101#define CONFIG_PHYLIB
Heiko Schochercfcad352013-12-02 07:47:22 +0100102#define CONFIG_RMII
103#define CONFIG_AT91_WANTS_COMMON_PHY
104
Heiko Schocherc6af5c02015-01-21 08:38:23 +0100105#define CONFIG_AT91SAM9_WATCHDOG
Heiko Schocher6dcb3622015-08-21 18:55:07 +0200106#define CONFIG_AT91_HW_WDT_TIMEOUT 15
Heiko Schocherc6af5c02015-01-21 08:38:23 +0100107#if !defined(CONFIG_SPL_BUILD)
108/* Enable the watchdog */
109#define CONFIG_HW_WATCHDOG
110#endif
111
Heiko Schochercfcad352013-12-02 07:47:22 +0100112/* USB */
113#if defined(CONFIG_BOARD_TAURUS)
114#define CONFIG_USB_ATMEL
Heiko Schochercf5137c2015-09-08 11:52:52 +0200115#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
Heiko Schochercfcad352013-12-02 07:47:22 +0100116#define CONFIG_USB_OHCI_NEW
117#define CONFIG_SYS_USB_OHCI_CPU_INIT
118#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000
119#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
120#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
Heiko Schochercf5137c2015-09-08 11:52:52 +0200121
122/* USB DFU support */
123#define CONFIG_CMD_MTDPARTS
124#define CONFIG_MTD_DEVICE
125#define CONFIG_MTD_PARTITIONS
126
Heiko Schochercf5137c2015-09-08 11:52:52 +0200127#define CONFIG_USB_GADGET_AT91
128
129/* DFU class support */
Heiko Schochercf5137c2015-09-08 11:52:52 +0200130#define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M)
131#define DFU_MANIFEST_POLL_TIMEOUT 25000
Heiko Schochercfcad352013-12-02 07:47:22 +0100132#endif
133
Heiko Schocher398b45b2014-10-31 08:30:56 +0100134/* SPI EEPROM */
135#define CONFIG_SPI
Heiko Schocher398b45b2014-10-31 08:30:56 +0100136#define CONFIG_ATMEL_SPI
Heiko Schocher398b45b2014-10-31 08:30:56 +0100137#define TAURUS_SPI_MASK (1 << 4)
138#define TAURUS_SPI_CS_PIN AT91_PIN_PA3
139
Heiko Schocher6f2a3252014-11-18 09:41:58 +0100140#if defined(CONFIG_SPL_BUILD)
141/* SPL related */
Heiko Schocher6f2a3252014-11-18 09:41:58 +0100142#define CONFIG_SPL_SPI_LOAD
143#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
144
145#define CONFIG_SF_DEFAULT_BUS 0
Heiko Schocher6dcb3622015-08-21 18:55:07 +0200146#define CONFIG_SF_DEFAULT_SPEED 1000000
147#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
Heiko Schocher6f2a3252014-11-18 09:41:58 +0100148#endif
149
Heiko Schochercfcad352013-12-02 07:47:22 +0100150/* load address */
151#define CONFIG_SYS_LOAD_ADDR 0x22000000
152
153/* bootstrap in spi flash , u-boot + env + linux in nandflash */
154#define CONFIG_ENV_IS_IN_NAND
155#define CONFIG_ENV_OFFSET 0x100000
156#define CONFIG_ENV_OFFSET_REDUND 0x180000
Heiko Schocher6dcb3622015-08-21 18:55:07 +0200157#define CONFIG_ENV_SIZE (SZ_128K) /* 1 sector = 128 kB */
Heiko Schochercfcad352013-12-02 07:47:22 +0100158#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
Heiko Schocherb7773572015-08-21 18:53:46 +0200159
160#if defined(CONFIG_BOARD_TAURUS)
161#define CONFIG_BOOTARGS_TAURUS \
Heiko Schochercfcad352013-12-02 07:47:22 +0100162 "console=ttyS0,115200 earlyprintk " \
163 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
164 "256k(env),256k(env_redundant),256k(spare)," \
165 "512k(dtb),6M(kernel)ro,-(rootfs) " \
166 "root=/dev/mtdblock7 rw rootfstype=jffs2"
Heiko Schocherb7773572015-08-21 18:53:46 +0200167#endif
168
169#if defined(CONFIG_BOARD_AXM)
170#define CONFIG_BOOTARGS_AXM \
171 "\0" \
172 "addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \
173 "${gatewayip}:${netmask}:${hostname}:${netdev}::off\0" \
174 "addtest=setenv bootargs ${bootargs} loglevel=4 test\0" \
175 "baudrate=115200\0" \
176 "boot_file=setenv bootfile /${project_dir}/kernel/uImage\0" \
177 "boot_retries=0\0" \
178 "bootcmd=run flash_self\0" \
179 "bootdelay=3\0" \
180 "ethact=macb0\0" \
181 "flash_nfs=run nand_kernel;run nfsargs;run addip;upgrade_available;"\
182 "bootm ${kernel_ram};reset\0" \
183 "flash_self=run nand_kernel;run setbootargs;upgrade_available;" \
184 "bootm ${kernel_ram};reset\0" \
185 "flash_self_test=run nand_kernel;run setbootargs addtest; " \
186 "upgrade_available;bootm ${kernel_ram};reset\0" \
187 "hostname=systemone\0" \
188 "kernel_Off=0x00200000\0" \
189 "kernel_Off_fallback=0x03800000\0" \
190 "kernel_ram=0x21500000\0" \
191 "kernel_size=0x00400000\0" \
192 "kernel_size_fallback=0x00400000\0" \
193 "loads_echo=1\0" \
194 "nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} " \
195 "${kernel_size}\0" \
196 "net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};" \
197 "run nfsargs;run addip;upgrade_available;bootm " \
198 "${kernel_ram};reset\0" \
199 "netdev=eth0\0" \
200 "nfsargs=run root_path;setenv bootargs ${bootargs} " \
201 "root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \
202 "at91sam9_wdt.wdt_timeout=16\0" \
203 "partitionset_active=A\0" \
204 "preboot=echo;echo Type 'run flash_self' to use kernel and root "\
205 "filesystem on memory;echo Type 'run flash_nfs' to use kernel " \
206 "from memory and root filesystem over NFS;echo Type 'run net_nfs' "\
207 "to get Kernel over TFTP and mount root filesystem over NFS;echo\0"\
208 "project_dir=systemone\0" \
209 "root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0"\
210 "rootfs=/dev/mtdblock5\0" \
211 "rootfs_fallback=/dev/mtdblock7\0" \
212 "setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops "\
213 "root=${rootfs} rootfstype=jffs2 panic=7 " \
214 "at91sam9_wdt.wdt_timeout=16\0" \
215 "stderr=serial\0" \
216 "stdin=serial\0" \
217 "stdout=serial\0" \
218 "upgrade_available=0\0"
219#endif
220
221#if defined(CONFIG_BOARD_TAURUS)
222#define CONFIG_BOOTARGS CONFIG_BOOTARGS_TAURUS
223#endif
224
225#if defined(CONFIG_BOARD_AXM)
226#define CONFIG_BOOTARGS CONFIG_BOOTARGS_AXM
227#endif
Heiko Schochercfcad352013-12-02 07:47:22 +0100228
Heiko Schochercfcad352013-12-02 07:47:22 +0100229#define CONFIG_SYS_CBSIZE 256
230#define CONFIG_SYS_MAXARGS 16
231#define CONFIG_SYS_PBSIZE \
232 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
233#define CONFIG_SYS_LONGHELP
234#define CONFIG_CMDLINE_EDITING
235#define CONFIG_AUTO_COMPLETE
236
237/*
238 * Size of malloc() pool
239 */
240#define CONFIG_SYS_MALLOC_LEN \
Heiko Schochercf5137c2015-09-08 11:52:52 +0200241 ROUND(3 * CONFIG_ENV_SIZE + SZ_4M, 0x1000)
Heiko Schochercfcad352013-12-02 07:47:22 +0100242
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100243/* Defines for SPL */
244#define CONFIG_SPL_FRAMEWORK
245#define CONFIG_SPL_TEXT_BASE 0x0
Heiko Schocherb7773572015-08-21 18:53:46 +0200246#define CONFIG_SPL_MAX_SIZE (31 * SZ_512)
247#define CONFIG_SPL_STACK (ATMEL_BASE_SRAM1 + SZ_16K)
Heiko Schocher6f2a3252014-11-18 09:41:58 +0100248#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \
249 CONFIG_SYS_MALLOC_LEN)
250#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100251
252#define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE
Heiko Schocher6dcb3622015-08-21 18:55:07 +0200253#define CONFIG_SPL_BSS_MAX_SIZE (3 * SZ_512)
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100254
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100255#define CONFIG_SPL_BOARD_INIT
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100256#define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100257#define CONFIG_SYS_USE_NANDFLASH 1
258#define CONFIG_SPL_NAND_DRIVERS
259#define CONFIG_SPL_NAND_BASE
260#define CONFIG_SPL_NAND_ECC
261#define CONFIG_SPL_NAND_RAW_ONLY
262#define CONFIG_SPL_NAND_SOFTECC
263#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
Heiko Schochercf5137c2015-09-08 11:52:52 +0200264#define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100265#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
266#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
267#define CONFIG_SYS_NAND_5_ADDR_CYCLE
268
Heiko Schocher6dcb3622015-08-21 18:55:07 +0200269#define CONFIG_SYS_NAND_SIZE (256 * SZ_1M)
270#define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K
271#define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K)
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100272#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
273 CONFIG_SYS_NAND_PAGE_SIZE)
274#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
275#define CONFIG_SYS_NAND_ECCSIZE 256
276#define CONFIG_SYS_NAND_ECCBYTES 3
277#define CONFIG_SYS_NAND_OOBSIZE 64
278#define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
279 48, 49, 50, 51, 52, 53, 54, 55, \
280 56, 57, 58, 59, 60, 61, 62, 63, }
281
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100282#define CONFIG_SPL_ATMEL_SIZE
283#define CONFIG_SYS_MASTER_CLOCK 132096000
284#define AT91_PLL_LOCK_TIMEOUT 1000000
285#define CONFIG_SYS_AT91_PLLA 0x202A3F01
286#define CONFIG_SYS_MCKR 0x1300
287#define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR)
288#define CONFIG_SYS_AT91_PLLB 0x10193F05
Heiko Schocherb7773572015-08-21 18:53:46 +0200289
Heiko Schochercfcad352013-12-02 07:47:22 +0100290#endif