blob: 7c40f176987d72cd1514d187caf04eaf947e90ad [file] [log] [blame]
Lokesh Vutla56c8f0a2016-04-13 09:50:59 +05301#
2# Memory devices
3#
4
5menu "Memory Controller drivers"
6
Roger Quadrosb0679a72022-10-20 16:30:46 +03007config MEMORY
8 bool "Enable Driver Model for Memory Controller drivers"
9 depends on DM
10 help
11 Enable driver model for Memory Controller devices.
12 These devices provide Memory bus interface to various devices like
13 SRAM, Ethernet adapters, FPGAs, etc.
14 For now this uclass has no methods yet.
15
Balamanikandan Gunasundar935a9bd2022-10-25 16:21:04 +053016config ATMEL_EBI
17 bool "Support for Atmel EBI"
18 help
19 Driver for Atmel EBI controller. This is a dummy
20 driver. Doesn't provide an access to EBI controller. Select
21 this option to enable the NAND flash controller driver
22
Roger Quadrosb0679a72022-10-20 16:30:46 +030023config SANDBOX_MEMORY
24 bool "Enable Sandbox Memory Controller driver"
25 depends on SANDBOX && MEMORY
26 help
27 This is a driver model based Memory Controller driver for sandbox.
28 Currently it is a stub only, as there are no usable uclass methods
29 yet.
30
Christophe Kerelloa994a802020-07-31 09:53:40 +020031config STM32_FMC2_EBI
32 bool "Support for FMC2 External Bus Interface on STM32MP SoCs"
33 depends on ARCH_STM32MP
34 help
35 Select this option to enable the STM32 FMC2 External Bus Interface
36 controller. This driver configures the transactions with external
37 devices (like SRAM, ethernet adapters, FPGAs, LCD displays, ...) on
38 SOCs containing the FMC2 External Bus Interface.
39
Lokesh Vutla56c8f0a2016-04-13 09:50:59 +053040config TI_AEMIF
41 tristate "Texas Instruments AEMIF driver"
Bastien Curutchet05460792024-10-21 17:13:27 +020042 depends on ARCH_KEYSTONE || ARCH_DAVINCI
Lokesh Vutla56c8f0a2016-04-13 09:50:59 +053043 help
44 This driver is for the AEMIF module available in Texas Instruments
45 SoCs. AEMIF stands for Asynchronous External Memory Interface and
46 is intended to provide a glue-less interface to a variety of
47 asynchronuous memory devices like ASRAM, NOR and NAND memory. A total
48 of 256M bytes of any of these memories can be accessed at a given
49 time via four chip selects with 64M byte access per chip select.
50
Roger Quadros7dc75b62022-10-20 16:30:49 +030051config TI_GPMC
52 bool "Texas Instruments GPMC driver"
53 depends on ARCH_OMAP2PLUS || ARCH_KEYSTONE || ARCH_K3
54 depends on MEMORY && CLK && OF_CONTROL
55 help
56 This driver is for the General Purpose Memory Controller (GPMC)
57 present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows
58 interfacing to a variety of asynchronous as well as synchronous
59 memory drives like NOR, NAND, OneNAND, SRAM.
60
61if TI_GPMC
62config TI_GPMC_DEBUG
63 bool "Debug Texas Instruments GPMC timings"
Roger Quadros7dc75b62022-10-20 16:30:49 +030064 help
65 Enable this to print GPMC timings before and after the GPMC registers
66 are programmed. This should not be left enabled on production systems.
67endif
68
Lokesh Vutla56c8f0a2016-04-13 09:50:59 +053069endmenu