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git01.mediatek.com / filogic / uboot / 6bdf699cdd31c6d8e76abc01454d706a20bda86a / . / test / dm / reset.c
blob: dceb6a1dad3867aa6aae8bf90fe04e06ba1d8c6d [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
Stephen Warren6488e642016-06-17 09:43:59 -0600[diff] [blame]2/*
3 * Copyright (c) 2016, NVIDIA CORPORATION.
Stephen Warren6488e642016-06-17 09:43:59 -0600[diff] [blame]4 */
5
Stephen Warren6488e642016-06-17 09:43:59 -0600[diff] [blame]6#include <dm.h>
Jean-Jacques Hiblot880c5c72020-09-09 15:37:04 +0530[diff] [blame]7#include <dm/device-internal.h>
Simon Glass0f2af882020-05-10 11:40:05 -0600[diff] [blame]8#include <log.h>
Simon Glass9bc15642020-02-03 07:36:16 -0700[diff] [blame]9#include <malloc.h>
Jagan Tekidcd48c32019-02-28 00:26:56 +0530[diff] [blame]10#include <reset.h>
Stephen Warren6488e642016-06-17 09:43:59 -0600[diff] [blame]11#include <dm/test.h>
12#include <asm/reset.h>
Simon Glass75c4d412020-07-19 10:15:37 -0600[diff] [blame]13#include <test/test.h>
Stephen Warren6488e642016-06-17 09:43:59 -0600[diff] [blame]14#include <test/ut.h>
15
16/* This must match the specifier for mbox-names="test" in the DT node */
17#define TEST_RESET_ID 2
18
Neil Armstrong20c633d2018-04-03 11:40:51 +0200[diff] [blame]19/* This is the other reset phandle specifier handled by bulk */
20#define OTHER_RESET_ID 2
21
Jagan Tekidcd48c32019-02-28 00:26:56 +0530[diff] [blame]22/* Base test of the reset uclass */
23static int dm_test_reset_base(struct unit_test_state *uts)
24{
25 struct udevice *dev;
Neil Armstrong9b4cdef2021-04-20 10:42:25 +0200[diff] [blame]26 struct reset_ctl reset_method1, reset_method1_1;
27 struct reset_ctl reset_method2, reset_method2_1;
28 struct reset_ctl reset_method3, reset_method3_1;
29 struct reset_ctl reset_method4, reset_method4_1;
Jagan Tekidcd48c32019-02-28 00:26:56 +0530[diff] [blame]30
31 /* Get the device using the reset device */
32 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "reset-ctl-test",
33 &dev));
34
35 /* Get the same reset port in 2 different ways and compare */
Neil Armstrong9b4cdef2021-04-20 10:42:25 +0200[diff] [blame]36 ut_assertok(reset_get_by_index(dev, 0, &reset_method1));
Samuel Holland6078bff2023-01-21 18:02:52 -0600[diff] [blame]37 ut_assertok(reset_get_by_name(dev, NULL, &reset_method1_1));
Neil Armstrong9b4cdef2021-04-20 10:42:25 +0200[diff] [blame]38 ut_assertok(reset_get_by_index(dev, 1, &reset_method2));
Jagan Tekidcd48c32019-02-28 00:26:56 +0530[diff] [blame]39 ut_assertok(reset_get_by_index_nodev(dev_ofnode(dev), 1,
Neil Armstrong9b4cdef2021-04-20 10:42:25 +0200[diff] [blame]40 &reset_method2_1));
41 ut_assertok(reset_get_by_index(dev, 2, &reset_method3));
42 ut_assertok(reset_get_by_index_nodev(dev_ofnode(dev), 2,
43 &reset_method3_1));
44 ut_assertok(reset_get_by_index(dev, 3, &reset_method4));
45 ut_assertok(reset_get_by_index_nodev(dev_ofnode(dev), 3,
46 &reset_method4_1));
47
48 ut_asserteq(reset_method1.id, reset_method1_1.id);
49 ut_asserteq(reset_method2.id, reset_method2_1.id);
50 ut_asserteq(reset_method3.id, reset_method3_1.id);
51 ut_asserteq(reset_method4.id, reset_method4_1.id);
52
53 ut_asserteq(true, reset_method1.id != reset_method2.id);
54 ut_asserteq(true, reset_method1.id != reset_method3.id);
55 ut_asserteq(true, reset_method1.id != reset_method4.id);
56 ut_asserteq(true, reset_method2.id != reset_method3.id);
57 ut_asserteq(true, reset_method2.id != reset_method4.id);
58 ut_asserteq(true, reset_method3.id != reset_method4.id);
59
60 ut_asserteq(true, reset_method1_1.id != reset_method2_1.id);
61 ut_asserteq(true, reset_method1_1.id != reset_method3_1.id);
62 ut_asserteq(true, reset_method1_1.id != reset_method4_1.id);
63 ut_asserteq(true, reset_method2_1.id != reset_method3_1.id);
64 ut_asserteq(true, reset_method2_1.id != reset_method4_1.id);
65 ut_asserteq(true, reset_method3_1.id != reset_method4_1.id);
Jagan Tekidcd48c32019-02-28 00:26:56 +0530[diff] [blame]66
67 return 0;
68}
Simon Glass1a92f832024-08-22 07:57:48 -0600[diff] [blame]69DM_TEST(dm_test_reset_base, UTF_SCAN_FDT);
Jagan Tekidcd48c32019-02-28 00:26:56 +0530[diff] [blame]70
Stephen Warren6488e642016-06-17 09:43:59 -0600[diff] [blame]71static int dm_test_reset(struct unit_test_state *uts)
72{
73 struct udevice *dev_reset;
74 struct udevice *dev_test;
75
76 ut_assertok(uclass_get_device_by_name(UCLASS_RESET, "reset-ctl",
77 &dev_reset));
78 ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
79
80 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "reset-ctl-test",
81 &dev_test));
82 ut_assertok(sandbox_reset_test_get(dev_test));
83
84 ut_assertok(sandbox_reset_test_assert(dev_test));
85 ut_asserteq(1, sandbox_reset_query(dev_reset, TEST_RESET_ID));
86
87 ut_assertok(sandbox_reset_test_deassert(dev_test));
88 ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
89
Jean-Jacques Hiblot880c5c72020-09-09 15:37:04 +0530[diff] [blame]90 ut_asserteq(1, sandbox_reset_is_requested(dev_reset, TEST_RESET_ID));
Stephen Warren6488e642016-06-17 09:43:59 -0600[diff] [blame]91 ut_assertok(sandbox_reset_test_free(dev_test));
Jean-Jacques Hiblot880c5c72020-09-09 15:37:04 +0530[diff] [blame]92 ut_asserteq(0, sandbox_reset_is_requested(dev_reset, TEST_RESET_ID));
Stephen Warren6488e642016-06-17 09:43:59 -0600[diff] [blame]93
94 return 0;
95}
Simon Glass1a92f832024-08-22 07:57:48 -0600[diff] [blame]96DM_TEST(dm_test_reset, UTF_SCAN_FDT);
Neil Armstrong20c633d2018-04-03 11:40:51 +0200[diff] [blame]97
Jean-Jacques Hiblot880c5c72020-09-09 15:37:04 +0530[diff] [blame]98static int dm_test_reset_devm(struct unit_test_state *uts)
99{
100 struct udevice *dev_reset;
101 struct udevice *dev_test;
102
103 ut_assertok(uclass_get_device_by_name(UCLASS_RESET, "reset-ctl",
104 &dev_reset));
105 ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
106 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "reset-ctl-test",
107 &dev_test));
108 ut_assertok(sandbox_reset_test_get_devm(dev_test));
109
110 ut_assertok(sandbox_reset_test_assert(dev_test));
111 ut_asserteq(1, sandbox_reset_query(dev_reset, TEST_RESET_ID));
112 ut_assertok(sandbox_reset_test_deassert(dev_test));
113 ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
114
115 ut_asserteq(1, sandbox_reset_is_requested(dev_reset, TEST_RESET_ID));
116 ut_assertok(device_remove(dev_test, DM_REMOVE_NORMAL));
117 ut_asserteq(0, sandbox_reset_is_requested(dev_reset, TEST_RESET_ID));
118
119 return 0;
120}
Simon Glass1a92f832024-08-22 07:57:48 -0600[diff] [blame]121DM_TEST(dm_test_reset_devm, UTF_SCAN_FDT);
Jean-Jacques Hiblot880c5c72020-09-09 15:37:04 +0530[diff] [blame]122
Neil Armstrong20c633d2018-04-03 11:40:51 +0200[diff] [blame]123static int dm_test_reset_bulk(struct unit_test_state *uts)
124{
125 struct udevice *dev_reset;
126 struct udevice *dev_test;
127
128 ut_assertok(uclass_get_device_by_name(UCLASS_RESET, "reset-ctl",
129 &dev_reset));
130 ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
131 ut_asserteq(0, sandbox_reset_query(dev_reset, OTHER_RESET_ID));
132
133 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "reset-ctl-test",
134 &dev_test));
135 ut_assertok(sandbox_reset_test_get_bulk(dev_test));
136
137 ut_assertok(sandbox_reset_test_assert_bulk(dev_test));
138 ut_asserteq(1, sandbox_reset_query(dev_reset, TEST_RESET_ID));
139 ut_asserteq(1, sandbox_reset_query(dev_reset, OTHER_RESET_ID));
140
141 ut_assertok(sandbox_reset_test_deassert_bulk(dev_test));
142 ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
143 ut_asserteq(0, sandbox_reset_query(dev_reset, OTHER_RESET_ID));
144
145 ut_assertok(sandbox_reset_test_release_bulk(dev_test));
146 ut_asserteq(1, sandbox_reset_query(dev_reset, TEST_RESET_ID));
147 ut_asserteq(1, sandbox_reset_query(dev_reset, OTHER_RESET_ID));
148
149 return 0;
150}
Simon Glass1a92f832024-08-22 07:57:48 -0600[diff] [blame]151DM_TEST(dm_test_reset_bulk, UTF_SCAN_FDT);
Jean-Jacques Hiblot880c5c72020-09-09 15:37:04 +0530[diff] [blame]152
153static int dm_test_reset_bulk_devm(struct unit_test_state *uts)
154{
155 struct udevice *dev_reset;
156 struct udevice *dev_test;
157
158 ut_assertok(uclass_get_device_by_name(UCLASS_RESET, "reset-ctl",
159 &dev_reset));
160 ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
161 ut_asserteq(0, sandbox_reset_query(dev_reset, OTHER_RESET_ID));
162
163 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "reset-ctl-test",
164 &dev_test));
165 ut_assertok(sandbox_reset_test_get_bulk_devm(dev_test));
166
167 ut_assertok(sandbox_reset_test_assert_bulk(dev_test));
168 ut_asserteq(1, sandbox_reset_query(dev_reset, TEST_RESET_ID));
169 ut_asserteq(1, sandbox_reset_query(dev_reset, OTHER_RESET_ID));
170
171 ut_assertok(sandbox_reset_test_deassert_bulk(dev_test));
172 ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
173 ut_asserteq(0, sandbox_reset_query(dev_reset, OTHER_RESET_ID));
174
175 ut_asserteq(1, sandbox_reset_is_requested(dev_reset, OTHER_RESET_ID));
176 ut_asserteq(1, sandbox_reset_is_requested(dev_reset, TEST_RESET_ID));
177 ut_assertok(device_remove(dev_test, DM_REMOVE_NORMAL));
178 ut_asserteq(0, sandbox_reset_is_requested(dev_reset, TEST_RESET_ID));
179 ut_asserteq(0, sandbox_reset_is_requested(dev_reset, OTHER_RESET_ID));
180
181 return 0;
182}
Simon Glass1a92f832024-08-22 07:57:48 -0600[diff] [blame]183DM_TEST(dm_test_reset_bulk_devm, UTF_SCAN_FDT);