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Mike Frysingere5653d02008-02-19 00:58:13 -05001/*
2 * SPI flash driver
3 *
4 * Enter bugs at http://blackfin.uclinux.org/
5 *
Mike Frysingere9856222008-10-11 22:47:34 -04006 * Copyright (c) 2005-2008 Analog Devices Inc.
Mike Frysingere5653d02008-02-19 00:58:13 -05007 *
8 * Licensed under the GPL-2 or later.
9 */
10
11/* Configuration options:
12 * CONFIG_SPI_BAUD - value to load into SPI_BAUD (divisor of SCLK to get SPI CLK)
13 * CONFIG_SPI_FLASH_SLOW_READ - force usage of the slower read
14 * WARNING: make sure your SCLK + SPI_BAUD is slow enough
15 */
16
17#include <common.h>
18#include <malloc.h>
19#include <asm/io.h>
20#include <asm/mach-common/bits/spi.h>
21
22/* Forcibly phase out these */
23#ifdef CONFIG_SPI_FLASH_NUM_SECTORS
24# error do not set CONFIG_SPI_FLASH_NUM_SECTORS
25#endif
26#ifdef CONFIG_SPI_FLASH_SECTOR_SIZE
27# error do not set CONFIG_SPI_FLASH_SECTOR_SIZE
28#endif
29
30#if defined(CONFIG_SPI)
31
32struct flash_info {
33 char *name;
34 uint16_t id;
35 unsigned sector_size;
36 unsigned num_sectors;
37};
38
39/* SPI Speeds: 50 MHz / 33 MHz */
40static struct flash_info flash_spansion_serial_flash[] = {
41 { "S25FL016", 0x0215, 64 * 1024, 32 },
42 { "S25FL032", 0x0216, 64 * 1024, 64 },
43 { "S25FL064", 0x0217, 64 * 1024, 128 },
44 { "S25FL0128", 0x0218, 256 * 1024, 64 },
45 { NULL, 0, 0, 0 }
46};
47
48/* SPI Speeds: 50 MHz / 20 MHz */
49static struct flash_info flash_st_serial_flash[] = {
50 { "m25p05", 0x2010, 32 * 1024, 2 },
51 { "m25p10", 0x2011, 32 * 1024, 4 },
52 { "m25p20", 0x2012, 64 * 1024, 4 },
53 { "m25p40", 0x2013, 64 * 1024, 8 },
54 { "m25p16", 0x2015, 64 * 1024, 32 },
55 { "m25p32", 0x2016, 64 * 1024, 64 },
56 { "m25p64", 0x2017, 64 * 1024, 128 },
57 { "m25p128", 0x2018, 256 * 1024, 64 },
58 { NULL, 0, 0, 0 }
59};
60
61/* SPI Speeds: 66 MHz / 33 MHz */
62static struct flash_info flash_atmel_dataflash[] = {
63 { "AT45DB011x", 0x0c, 264, 512 },
64 { "AT45DB021x", 0x14, 264, 1025 },
65 { "AT45DB041x", 0x1c, 264, 2048 },
66 { "AT45DB081x", 0x24, 264, 4096 },
67 { "AT45DB161x", 0x2c, 528, 4096 },
68 { "AT45DB321x", 0x34, 528, 8192 },
69 { "AT45DB642x", 0x3c, 1056, 8192 },
70 { NULL, 0, 0, 0 }
71};
72
73/* SPI Speed: 50 MHz / 25 MHz or 40 MHz / 20 MHz */
74static struct flash_info flash_winbond_serial_flash[] = {
75 { "W25X10", 0x3011, 16 * 256, 32 },
76 { "W25X20", 0x3012, 16 * 256, 64 },
77 { "W25X40", 0x3013, 16 * 256, 128 },
78 { "W25X80", 0x3014, 16 * 256, 256 },
79 { "W25P80", 0x2014, 256 * 256, 16 },
80 { "W25P16", 0x2015, 256 * 256, 32 },
81 { NULL, 0, 0, 0 }
82};
83
84struct flash_ops {
85 uint8_t read, write, erase, status;
86};
87
88#ifdef CONFIG_SPI_FLASH_SLOW_READ
89# define OP_READ 0x03
90#else
91# define OP_READ 0x0B
92#endif
93static struct flash_ops flash_st_ops = {
94 .read = OP_READ,
95 .write = 0x02,
96 .erase = 0xD8,
97 .status = 0x05,
98};
99
100static struct flash_ops flash_atmel_ops = {
101 .read = OP_READ,
102 .write = 0x82,
103 .erase = 0x81,
104 .status = 0xD7,
105};
106
107static struct flash_ops flash_winbond_ops = {
108 .read = OP_READ,
109 .write = 0x02,
110 .erase = 0x20,
111 .status = 0x05,
112};
113
114struct manufacturer_info {
115 const char *name;
116 uint8_t id;
117 struct flash_info *flashes;
118 struct flash_ops *ops;
119};
120
121static struct {
122 struct manufacturer_info *manufacturer;
123 struct flash_info *flash;
124 struct flash_ops *ops;
125 uint8_t manufacturer_id, device_id1, device_id2;
126 unsigned int write_length;
127 unsigned long sector_size, num_sectors;
128} flash;
129
130enum {
131 JED_MANU_SPANSION = 0x01,
132 JED_MANU_ST = 0x20,
133 JED_MANU_ATMEL = 0x1F,
134 JED_MANU_WINBOND = 0xEF,
135};
136
137static struct manufacturer_info flash_manufacturers[] = {
138 {
139 .name = "Spansion",
140 .id = JED_MANU_SPANSION,
141 .flashes = flash_spansion_serial_flash,
142 .ops = &flash_st_ops,
143 },
144 {
145 .name = "ST",
146 .id = JED_MANU_ST,
147 .flashes = flash_st_serial_flash,
148 .ops = &flash_st_ops,
149 },
150 {
151 .name = "Atmel",
152 .id = JED_MANU_ATMEL,
153 .flashes = flash_atmel_dataflash,
154 .ops = &flash_atmel_ops,
155 },
156 {
157 .name = "Winbond",
158 .id = JED_MANU_WINBOND,
159 .flashes = flash_winbond_serial_flash,
160 .ops = &flash_winbond_ops,
161 },
162};
163
164#define TIMEOUT 5000 /* timeout of 5 seconds */
165
Mike Frysingere9856222008-10-11 22:47:34 -0400166/* If part has multiple SPI flashes, assume SPI0 as that is
167 * the one we can boot off of ...
168 */
Mike Frysingere5653d02008-02-19 00:58:13 -0500169#ifndef pSPI_CTL
170# define pSPI_CTL pSPI0_CTL
171# define pSPI_BAUD pSPI0_BAUD
172# define pSPI_FLG pSPI0_FLG
173# define pSPI_RDBR pSPI0_RDBR
174# define pSPI_STAT pSPI0_STAT
175# define pSPI_TDBR pSPI0_TDBR
Mike Frysingere5653d02008-02-19 00:58:13 -0500176#endif
177
178/* Default to the SPI SSEL that we boot off of:
179 * BF54x, BF537, (everything new?): SSEL1
Mike Frysingere9856222008-10-11 22:47:34 -0400180 * BF51x, BF533, BF561: SSEL2
Mike Frysingere5653d02008-02-19 00:58:13 -0500181 */
182#ifndef CONFIG_SPI_FLASH_SSEL
Mike Frysingere1387002009-01-13 11:00:29 -0500183# define CONFIG_SPI_FLASH_SSEL BFIN_BOOT_SPI_SSEL
Mike Frysingere5653d02008-02-19 00:58:13 -0500184#endif
185#define SSEL_MASK (1 << CONFIG_SPI_FLASH_SSEL)
186
187static void SPI_INIT(void)
188{
189 /* [#3541] This delay appears to be necessary, but not sure
190 * exactly why as the history behind it is non-existant.
191 */
192 udelay(CONFIG_CCLK_HZ / 25000000);
193
194 /* enable SPI pins: SSEL, MOSI, MISO, SCK */
195#ifdef __ADSPBF54x__
Mike Frysingere9856222008-10-11 22:47:34 -0400196 *pPORTE_FER |= (PE0 | PE1 | PE2 | PE4);
Mike Frysingere5653d02008-02-19 00:58:13 -0500197#elif defined(__ADSPBF534__) || defined(__ADSPBF536__) || defined(__ADSPBF537__)
198 *pPORTF_FER |= (PF10 | PF11 | PF12 | PF13);
199#elif defined(__ADSPBF52x__)
200 bfin_write_PORTG_MUX((bfin_read_PORTG_MUX() & ~PORT_x_MUX_0_MASK) | PORT_x_MUX_0_FUNC_3);
201 bfin_write_PORTG_FER(bfin_read_PORTG_FER() | PG1 | PG2 | PG3 | PG4);
Mike Frysingere9856222008-10-11 22:47:34 -0400202#elif defined(__ADSPBF51x__)
203 bfin_write_PORTG_MUX((bfin_read_PORTG_MUX() & ~PORT_x_MUX_7_MASK) | PORT_x_MUX_7_FUNC_1);
204 bfin_write_PORTG_FER(bfin_read_PORTG_FER() | PG12 | PG13 | PG14 | PG15);
Mike Frysingere5653d02008-02-19 00:58:13 -0500205#endif
206
207 /* initate communication upon write of TDBR */
208 *pSPI_CTL = (SPE|MSTR|CPHA|CPOL|0x01);
209 *pSPI_BAUD = CONFIG_SPI_BAUD;
210}
211
212static void SPI_DEINIT(void)
213{
214 /* put SPI settings back to reset state */
215 *pSPI_CTL = 0x0400;
216 *pSPI_BAUD = 0;
217 SSYNC();
218}
219
220static void SPI_ON(void)
221{
222 /* toggle SSEL to reset the device so it'll take a new command */
223 *pSPI_FLG = 0xFF00 | SSEL_MASK;
224 SSYNC();
225
226 *pSPI_FLG = ((0xFF & ~SSEL_MASK) << 8) | SSEL_MASK;
227 SSYNC();
228}
229
230static void SPI_OFF(void)
231{
232 /* put SPI settings back to reset state */
233 *pSPI_FLG = 0xFF00;
234 SSYNC();
235}
236
237static uint8_t spi_write_read_byte(uint8_t transmit)
238{
239 *pSPI_TDBR = transmit;
240 SSYNC();
241
242 while ((*pSPI_STAT & TXS))
243 if (ctrlc())
244 break;
245 while (!(*pSPI_STAT & SPIF))
246 if (ctrlc())
247 break;
248 while (!(*pSPI_STAT & RXS))
249 if (ctrlc())
250 break;
251
252 /* Read dummy to empty the receive register */
253 return *pSPI_RDBR;
254}
255
256static uint8_t read_status_register(void)
257{
258 uint8_t status_register;
259
260 /* send instruction to read status register */
261 SPI_ON();
262 spi_write_read_byte(flash.ops->status);
263 /* send dummy to receive the status register */
264 status_register = spi_write_read_byte(0);
265 SPI_OFF();
266
267 return status_register;
268}
269
270static int wait_for_ready_status(void)
271{
272 ulong start = get_timer(0);
273
274 while (get_timer(0) - start < TIMEOUT) {
275 switch (flash.manufacturer_id) {
276 case JED_MANU_SPANSION:
277 case JED_MANU_ST:
278 case JED_MANU_WINBOND:
279 if (!(read_status_register() & 0x01))
280 return 0;
281 break;
282
283 case JED_MANU_ATMEL:
284 if (read_status_register() & 0x80)
285 return 0;
286 break;
287 }
288
289 if (ctrlc()) {
290 puts("\nAbort\n");
291 return -1;
292 }
293 }
294
295 puts("Timeout\n");
296 return -1;
297}
298
299/* Request and read the manufacturer and device id of parts which
300 * are compatible with the JEDEC standard (JEP106) and use that to
301 * setup other operating conditions.
302 */
303static int spi_detect_part(void)
304{
305 uint16_t dev_id;
306 size_t i;
307
308 static char called_init;
309 if (called_init)
310 return 0;
311
312 SPI_ON();
313
314 /* Send the request for the part identification */
315 spi_write_read_byte(0x9F);
316
317 /* Now read in the manufacturer id bytes */
318 do {
319 flash.manufacturer_id = spi_write_read_byte(0);
320 if (flash.manufacturer_id == 0x7F)
321 puts("Warning: unhandled manufacturer continuation byte!\n");
322 } while (flash.manufacturer_id == 0x7F);
323
324 /* Now read in the first device id byte */
325 flash.device_id1 = spi_write_read_byte(0);
326
327 /* Now read in the second device id byte */
328 flash.device_id2 = spi_write_read_byte(0);
329
330 SPI_OFF();
331
332 dev_id = (flash.device_id1 << 8) | flash.device_id2;
333
334 for (i = 0; i < ARRAY_SIZE(flash_manufacturers); ++i) {
335 if (flash.manufacturer_id == flash_manufacturers[i].id)
336 break;
337 }
338 if (i == ARRAY_SIZE(flash_manufacturers))
339 goto unknown;
340
341 flash.manufacturer = &flash_manufacturers[i];
342 flash.ops = flash_manufacturers[i].ops;
343
344 switch (flash.manufacturer_id) {
345 case JED_MANU_SPANSION:
346 case JED_MANU_ST:
347 case JED_MANU_WINBOND:
348 for (i = 0; flash.manufacturer->flashes[i].name; ++i) {
349 if (dev_id == flash.manufacturer->flashes[i].id)
350 break;
351 }
352 if (!flash.manufacturer->flashes[i].name)
353 goto unknown;
354
355 flash.flash = &flash.manufacturer->flashes[i];
356 flash.sector_size = flash.flash->sector_size;
357 flash.num_sectors = flash.flash->num_sectors;
358 flash.write_length = 256;
359 break;
360
361 case JED_MANU_ATMEL: {
362 uint8_t status = read_status_register();
363
364 for (i = 0; flash.manufacturer->flashes[i].name; ++i) {
365 if ((status & 0x3c) == flash.manufacturer->flashes[i].id)
366 break;
367 }
368 if (!flash.manufacturer->flashes[i].name)
369 goto unknown;
370
371 flash.flash = &flash.manufacturer->flashes[i];
372 flash.sector_size = flash.flash->sector_size;
373 flash.num_sectors = flash.flash->num_sectors;
374
375 /* see if flash is in "power of 2" mode */
376 if (status & 0x1)
377 flash.sector_size &= ~(1 << (ffs(flash.sector_size) - 1));
378
379 flash.write_length = flash.sector_size;
380 break;
381 }
382 }
383
384 called_init = 1;
385 return 0;
386
387 unknown:
388 printf("Unknown SPI device: 0x%02X 0x%02X 0x%02X\n",
389 flash.manufacturer_id, flash.device_id1, flash.device_id2);
390 return 1;
391}
392
393/*
394 * Function: spi_init_f
395 * Description: Init SPI-Controller (ROM part)
396 * return: ---
397 */
398void spi_init_f(void)
399{
400}
401
402/*
403 * Function: spi_init_r
404 * Description: Init SPI-Controller (RAM part) -
405 * The malloc engine is ready and we can move our buffers to
406 * normal RAM
407 * return: ---
408 */
409void spi_init_r(void)
410{
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200411#if defined(CONFIG_POST) && (CONFIG_POST & CONFIG_SYS_POST_SPI)
Mike Frysingere5653d02008-02-19 00:58:13 -0500412 /* Our testing strategy here is pretty basic:
413 * - fill src memory with an 8-bit pattern
414 * - write the src memory to the SPI flash
415 * - read the SPI flash into the dst memory
416 * - compare src and dst memory regions
417 * - repeat a few times
418 * The variations we test for:
419 * - change the 8-bit pattern a bit
420 * - change the read/write block size so we know:
421 * - writes smaller/equal/larger than the buffer work
422 * - writes smaller/equal/larger than the sector work
423 * - change the SPI offsets so we know:
424 * - writing partial sectors works
425 */
426 uint8_t *mem_src, *mem_dst;
427 size_t i, c, l, o;
428 size_t test_count, errors;
429 uint8_t pattern;
430
431 SPI_INIT();
432
433 if (spi_detect_part())
434 goto out;
435 eeprom_info();
436
437 ulong lengths[] = {
438 flash.write_length,
439 flash.write_length * 2,
440 flash.write_length / 2,
441 flash.sector_size,
442 flash.sector_size * 2,
443 flash.sector_size / 2
444 };
445 ulong offsets[] = {
446 0,
447 flash.write_length,
448 flash.write_length * 2,
449 flash.write_length / 2,
450 flash.write_length / 4,
451 flash.sector_size,
452 flash.sector_size * 2,
453 flash.sector_size / 2,
454 flash.sector_size / 4,
455 };
456
457 /* the exact addresses are arbitrary ... they just need to not overlap */
458 mem_src = (void *)(0);
459 mem_dst = (void *)(max(flash.write_length, flash.sector_size) * 2);
460
461 test_count = 0;
462 errors = 0;
463 pattern = 0x00;
464
465 for (i = 0; i < 16; ++i) { /* 16 = 8 bits * 2 iterations */
466 for (l = 0; l < ARRAY_SIZE(lengths); ++l) {
467 for (o = 0; o < ARRAY_SIZE(offsets); ++o) {
468 ulong len = lengths[l];
469 ulong off = offsets[o];
470
471 printf("Testing pattern 0x%02X of length %5lu and offset %5lu: ", pattern, len, off);
472
473 /* setup the source memory region */
474 memset(mem_src, pattern, len);
475
476 test_count += 4;
477 for (c = 0; c < 4; ++c) { /* 4 is just a random repeat count */
478 if (ctrlc()) {
479 puts("\nAbort\n");
480 goto out;
481 }
482
483 /* make sure background fill pattern != pattern */
484 memset(mem_dst, pattern ^ 0xFF, len);
485
486 /* write out the source memory and then read it back and compare */
487 eeprom_write(0, off, mem_src, len);
488 eeprom_read(0, off, mem_dst, len);
489
490 if (memcmp(mem_src, mem_dst, len)) {
491 for (c = 0; c < len; ++c)
492 if (mem_src[c] != mem_dst[c])
493 break;
494 printf(" FAIL @ offset %u, skipping repeats ", c);
495 ++errors;
496 break;
497 }
498
499 /* XXX: should shrink write region here to test with
500 * leading/trailing canaries so we know surrounding
501 * bytes don't get screwed.
502 */
503 }
504 puts("\n");
505 }
506 }
507
508 /* invert the pattern every other run and shift out bits slowly */
509 pattern ^= 0xFF;
510 if (i % 2)
511 pattern = (pattern | 0x01) << 1;
512 }
513
514 if (errors)
515 printf("SPI FAIL: Out of %i tests, there were %i errors ;(\n", test_count, errors);
516 else
517 printf("SPI PASS: %i tests worked!\n", test_count);
518
519 out:
520 SPI_DEINIT();
521
522#endif
523}
524
525static void transmit_address(uint32_t addr)
526{
527 /* Send the highest byte of the 24 bit address at first */
528 spi_write_read_byte(addr >> 16);
529 /* Send the middle byte of the 24 bit address at second */
530 spi_write_read_byte(addr >> 8);
531 /* Send the lowest byte of the 24 bit address finally */
532 spi_write_read_byte(addr);
533}
534
535/*
536 * Read a value from flash for verify purpose
537 * Inputs: unsigned long ulStart - holds the SPI start address
538 * int pnData - pointer to store value read from flash
539 * long lCount - number of elements to read
540 */
541static int read_flash(unsigned long address, long count, uchar *buffer)
542{
543 size_t i;
544
545 /* Send the read command to SPI device */
546 SPI_ON();
547 spi_write_read_byte(flash.ops->read);
548 transmit_address(address);
549
550#ifndef CONFIG_SPI_FLASH_SLOW_READ
551 /* Send dummy byte when doing SPI fast reads */
552 spi_write_read_byte(0);
553#endif
554
555 /* After the SPI device address has been placed on the MOSI pin the data can be */
556 /* received on the MISO pin. */
557 for (i = 1; i <= count; ++i) {
558 *buffer++ = spi_write_read_byte(0);
559 if (i % flash.sector_size == 0)
560 puts(".");
561 }
562
563 SPI_OFF();
564
565 return 0;
566}
567
568static int enable_writing(void)
569{
570 ulong start;
571
572 if (flash.manufacturer_id == JED_MANU_ATMEL)
573 return 0;
574
575 /* A write enable instruction must previously have been executed */
576 SPI_ON();
577 spi_write_read_byte(0x06);
578 SPI_OFF();
579
580 /* The status register will be polled to check the write enable latch "WREN" */
581 start = get_timer(0);
582 while (get_timer(0) - start < TIMEOUT) {
583 if (read_status_register() & 0x02)
584 return 0;
585
586 if (ctrlc()) {
587 puts("\nAbort\n");
588 return -1;
589 }
590 }
591
592 puts("Timeout\n");
593 return -1;
594}
595
596static long address_to_sector(unsigned long address)
597{
598 if (address > (flash.num_sectors * flash.sector_size) - 1)
599 return -1;
600 return address / flash.sector_size;
601}
602
603static int erase_sector(int address)
604{
605 /* sector gets checked in higher function, so assume it's valid
606 * here and figure out the offset of the sector in flash
607 */
608 if (enable_writing())
609 return -1;
610
611 /*
612 * Send the erase block command to the flash followed by the 24 address
613 * to point to the start of a sector
614 */
615 SPI_ON();
616 spi_write_read_byte(flash.ops->erase);
617 transmit_address(address);
618 SPI_OFF();
619
620 return wait_for_ready_status();
621}
622
623/* Write [count] bytes out of [buffer] into the given SPI [address] */
624static long write_flash(unsigned long address, long count, uchar *buffer)
625{
626 long i, write_buffer_size;
627
628 if (enable_writing())
629 return -1;
630
631 /* Send write command followed by the 24 bit address */
632 SPI_ON();
633 spi_write_read_byte(flash.ops->write);
634 transmit_address(address);
635
636 /* Shoot out a single write buffer */
637 write_buffer_size = min(count, flash.write_length);
638 for (i = 0; i < write_buffer_size; ++i)
639 spi_write_read_byte(buffer[i]);
640
641 SPI_OFF();
642
643 /* Wait for the flash to do its thing */
644 if (wait_for_ready_status()) {
645 puts("SPI Program Time out! ");
646 return -1;
647 }
648
649 return i;
650}
651
652/* Write [count] bytes out of [buffer] into the given SPI [address] */
653static int write_sector(unsigned long address, long count, uchar *buffer)
654{
655 long write_cnt;
656
657 while (count != 0) {
658 write_cnt = write_flash(address, count, buffer);
659 if (write_cnt == -1)
660 return -1;
661
662 /* Now that we've sent some bytes out to the flash, update
663 * our counters a bit
664 */
665 count -= write_cnt;
666 address += write_cnt;
667 buffer += write_cnt;
668 }
669
670 /* return the appropriate error code */
671 return 0;
672}
673
674/*
675 * Function: spi_write
676 */
677ssize_t spi_write(uchar *addr, int alen, uchar *buffer, int len)
678{
679 unsigned long offset;
680 int start_sector, end_sector;
681 int start_byte, end_byte;
682 uchar *temp = NULL;
683 int num, ret = 0;
684
685 SPI_INIT();
686
687 if (spi_detect_part())
688 goto out;
689
690 offset = addr[0] << 16 | addr[1] << 8 | addr[2];
691
692 /* Get the start block number */
693 start_sector = address_to_sector(offset);
694 if (start_sector == -1) {
695 puts("Invalid sector! ");
696 goto out;
697 }
698 end_sector = address_to_sector(offset + len - 1);
699 if (end_sector == -1) {
700 puts("Invalid sector! ");
701 goto out;
702 }
703
704 /* Since flashes operate in sector units but the eeprom command
705 * operates as a continuous stream of bytes, we need to emulate
706 * the eeprom behavior. So here we read in the sector, overlay
707 * any bytes we're actually modifying, erase the sector, and
708 * then write back out the new sector.
709 */
710 temp = malloc(flash.sector_size);
711 if (!temp) {
712 puts("Malloc for sector failed! ");
713 goto out;
714 }
715
716 for (num = start_sector; num <= end_sector; num++) {
717 unsigned long address = num * flash.sector_size;
718
719 /* XXX: should add an optimization when spanning sectors:
720 * No point in reading in a sector if we're going to be
721 * clobbering the whole thing. Need to also add a test
722 * case to make sure the optimization is correct.
723 */
724 if (read_flash(address, flash.sector_size, temp)) {
725 puts("Read sector failed! ");
726 len = 0;
727 break;
728 }
729
730 start_byte = max(address, offset);
731 end_byte = address + flash.sector_size - 1;
732 if (end_byte > (offset + len))
733 end_byte = (offset + len - 1);
734
735 memcpy(temp + start_byte - address,
736 buffer + start_byte - offset,
737 end_byte - start_byte + 1);
738
739 if (erase_sector(address)) {
740 puts("Erase sector failed! ");
741 goto out;
742 }
743
744 if (write_sector(address, flash.sector_size, temp)) {
745 puts("Write sector failed! ");
746 goto out;
747 }
748
749 puts(".");
750 }
751
752 ret = len;
753
754 out:
755 free(temp);
756
757 SPI_DEINIT();
758
759 return ret;
760}
761
762/*
763 * Function: spi_read
764 */
765ssize_t spi_read(uchar *addr, int alen, uchar *buffer, int len)
766{
767 unsigned long offset;
768
769 SPI_INIT();
770
771 if (spi_detect_part())
772 len = 0;
773 else {
774 offset = addr[0] << 16 | addr[1] << 8 | addr[2];
775 read_flash(offset, len, buffer);
776 }
777
778 SPI_DEINIT();
779
780 return len;
781}
782
783/*
784 * Spit out some useful information about the SPI eeprom
785 */
786int eeprom_info(void)
787{
788 int ret = 0;
789
790 SPI_INIT();
791
792 if (spi_detect_part())
793 ret = 1;
794 else
795 printf("SPI Device: %s 0x%02X (%s) 0x%02X 0x%02X\n"
Mike Frysinger9d016142008-10-12 06:02:55 -0400796 "Parameters: num sectors = %lu, sector size = %lu, write size = %i\n"
797 "Flash Size: %lu mbit (%lu mbyte)\n"
Mike Frysingere5653d02008-02-19 00:58:13 -0500798 "Status: 0x%02X\n",
799 flash.flash->name, flash.manufacturer_id, flash.manufacturer->name,
800 flash.device_id1, flash.device_id2, flash.num_sectors,
801 flash.sector_size, flash.write_length,
802 (flash.num_sectors * flash.sector_size) >> 17,
803 (flash.num_sectors * flash.sector_size) >> 20,
804 read_status_register());
805
806 SPI_DEINIT();
807
808 return ret;
809}
810
811#endif