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git01.mediatek.com / filogic / uboot / 6a51f189f1572ebd7bf1cf0c6b320a532be8eab1 / . / configs / pinebook-pro-rk3399_defconfig
blob: 58a8b91aa60fd70ae679af3a2c5ed6e7d2f4c3a4 [file] [log] [blame]
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]1CONFIG_ARM=y
Tom Rinie1e85442021-08-27 21:18:30 -0400[diff] [blame]2CONFIG_SKIP_LOWLEVEL_INIT=y
Peng Fanc8a61c02022-04-13 17:47:20 +0800[diff] [blame]3CONFIG_COUNTER_FREQUENCY=24000000
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]4CONFIG_ARCH_ROCKCHIP=y
Simon Glass72cc5382022-10-20 18:22:39 -0600[diff] [blame]5CONFIG_TEXT_BASE=0x00200000
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]6CONFIG_NR_DRAM_BANKS=1
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]7CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
8CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
Tom Rinia77d6f82023-05-01 11:50:26 -0400[diff] [blame]9CONFIG_SF_DEFAULT_SPEED=20000000
Peter Robinsoncee3edd2020-06-08 23:50:30 +0100[diff] [blame]10CONFIG_ENV_SIZE=0x8000
Peter Robinson9be115f2022-06-12 14:47:14 +0100[diff] [blame]11CONFIG_ENV_OFFSET=0x3F8000
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]12CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinebook-pro"
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]13CONFIG_DM_RESET=y
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]14CONFIG_ROCKCHIP_RK3399=y
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]15CONFIG_TARGET_PINEBOOK_PRO_RK3399=y
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]16CONFIG_SPL_STACK=0x400000
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]17CONFIG_DEBUG_UART_BASE=0xFF1A0000
18CONFIG_DEBUG_UART_CLOCK=24000000
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]19CONFIG_SPL_SPI_FLASH_SUPPORT=y
Simon Glassa5820472021-08-08 12:20:14 -0600[diff] [blame]20CONFIG_SPL_SPI=y
Tom Rini0997ee02021-08-23 10:25:31 -0400[diff] [blame]21CONFIG_SYS_LOAD_ADDR=0x800800
Tom Rinia77d6f82023-05-01 11:50:26 -0400[diff] [blame]22CONFIG_PCI=y
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]23CONFIG_DEBUG_UART=y
Tom Rini9e4bacb2020-06-04 19:29:09 -0400[diff] [blame]24CONFIG_BOOTDELAY=3
Peter Robinsoncee3edd2020-06-08 23:50:30 +0100[diff] [blame]25CONFIG_USE_PREBOOT=y
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]26CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-pinebook-pro.dtb"
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]27CONFIG_DISPLAY_BOARDINFO_LATE=y
Tom Rinif92b6fa2020-10-09 12:22:06 -0400[diff] [blame]28CONFIG_MISC_INIT_R=y
Tom Riniabb0f522022-05-16 17:20:26 -0400[diff] [blame]29CONFIG_SPL_MAX_SIZE=0x2e000
30CONFIG_SPL_PAD_TO=0x7f8000
Tom Rini65aa1242022-05-27 10:19:45 -0400[diff] [blame]31CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
32CONFIG_SPL_BSS_START_ADDR=0x400000
Tom Rini0cb89e72022-05-19 15:09:22 -0400[diff] [blame]33CONFIG_SPL_BSS_MAX_SIZE=0x2000
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]34# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
Tom Rini8a14ac42022-05-26 13:13:21 -0400[diff] [blame]35# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]36CONFIG_SPL_STACK_R=y
37CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
Peter Robinsoncee3edd2020-06-08 23:50:30 +0100[diff] [blame]38CONFIG_SPL_SPI_LOAD=y
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]39CONFIG_TPL=y
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]40CONFIG_CMD_BOOTZ=y
41CONFIG_CMD_GPIO=y
42CONFIG_CMD_GPT=y
43CONFIG_CMD_I2C=y
44CONFIG_CMD_MMC=y
Patrick Wildt44d52132020-06-07 12:08:35 +0200[diff] [blame]45CONFIG_CMD_PCI=y
Tom Rini9e4bacb2020-06-04 19:29:09 -0400[diff] [blame]46CONFIG_CMD_USB=y
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]47# CONFIG_CMD_SETEXPR is not set
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]48CONFIG_CMD_TIME=y
Tom Rini9e4bacb2020-06-04 19:29:09 -0400[diff] [blame]49CONFIG_CMD_PMIC=y
50CONFIG_CMD_REGULATOR=y
51CONFIG_SPL_OF_CONTROL=y
Tom Rini9e4bacb2020-06-04 19:29:09 -0400[diff] [blame]52CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
Peter Robinsoncee3edd2020-06-08 23:50:30 +0100[diff] [blame]53CONFIG_ENV_IS_IN_SPI_FLASH=y
Tom Rini9e4bacb2020-06-04 19:29:09 -0400[diff] [blame]54CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Hugh Cole-Baker008e43c2020-11-22 13:03:44 +0000[diff] [blame]55CONFIG_SPL_DM_SEQ_ALIAS=y
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]56CONFIG_ROCKCHIP_GPIO=y
57CONFIG_SYS_I2C_ROCKCHIP=y
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]58CONFIG_LED=y
59CONFIG_LED_GPIO=y
60CONFIG_MISC=y
61CONFIG_ROCKCHIP_EFUSE=y
Wolfgang Zarre5d935bc2023-05-01 09:43:20 +0200[diff] [blame]62CONFIG_MMC_IO_VOLTAGE=y
63CONFIG_SPL_MMC_IO_VOLTAGE=y
64CONFIG_MMC_UHS_SUPPORT=y
65CONFIG_SPL_MMC_UHS_SUPPORT=y
66CONFIG_MMC_HS400_ES_SUPPORT=y
67CONFIG_SPL_MMC_HS400_ES_SUPPORT=y
68CONFIG_MMC_HS400_SUPPORT=y
69CONFIG_SPL_MMC_HS400_SUPPORT=y
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]70CONFIG_MMC_DW=y
71CONFIG_MMC_DW_ROCKCHIP=y
72CONFIG_MMC_SDHCI=y
73CONFIG_MMC_SDHCI_SDMA=y
74CONFIG_MMC_SDHCI_ROCKCHIP=y
Hugh Cole-Baker008e43c2020-11-22 13:03:44 +0000[diff] [blame]75CONFIG_SF_DEFAULT_BUS=1
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]76CONFIG_SPI_FLASH_GIGADEVICE=y
77CONFIG_SPI_FLASH_WINBOND=y
Mark Kettenisf8463d62022-01-22 20:38:11 +0100[diff] [blame]78CONFIG_NVME_PCI=y
Peter Robinson7cbcda02020-11-10 10:09:06 +0000[diff] [blame]79CONFIG_PHY_ROCKCHIP_INNO_USB2=y
80CONFIG_PHY_ROCKCHIP_TYPEC=y
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]81CONFIG_DM_PMIC_FAN53555=y
Tom Rini9e4bacb2020-06-04 19:29:09 -0400[diff] [blame]82CONFIG_PMIC_RK8XX=y
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]83CONFIG_REGULATOR_PWM=y
84CONFIG_REGULATOR_RK8XX=y
85CONFIG_PWM_ROCKCHIP=y
Jagan Teki2da26d72022-12-14 23:20:48 +0530[diff] [blame]86CONFIG_RAM_ROCKCHIP_LPDDR4=y
Peter Robinsoncee3edd2020-06-08 23:50:30 +0100[diff] [blame]87CONFIG_DM_RNG=y
88CONFIG_RNG_ROCKCHIP=y
Tom Rini9e4bacb2020-06-04 19:29:09 -0400[diff] [blame]89CONFIG_BAUDRATE=1500000
90CONFIG_DEBUG_UART_SHIFT=2
Tom Rinidc172ee2022-12-04 09:39:03 -0500[diff] [blame]91CONFIG_SYS_NS16550_MEM32=y
Tom Rini9e4bacb2020-06-04 19:29:09 -0400[diff] [blame]92CONFIG_ROCKCHIP_SPI=y
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]93CONFIG_SYSRESET=y
94CONFIG_USB=y
95CONFIG_USB_XHCI_HCD=y
96CONFIG_USB_XHCI_DWC3=y
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]97CONFIG_USB_EHCI_HCD=y
98CONFIG_USB_EHCI_GENERIC=y
Peter Robinson34e63272020-06-08 23:50:29 +0100[diff] [blame]99CONFIG_USB_OHCI_HCD=y
100CONFIG_USB_OHCI_GENERIC=y
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]101CONFIG_USB_DWC3=y
Peter Robinson7cbcda02020-11-10 10:09:06 +0000[diff] [blame]102CONFIG_USB_DWC3_GENERIC=y
Tom Rini9e4bacb2020-06-04 19:29:09 -0400[diff] [blame]103CONFIG_USB_KEYBOARD=y
Peter Robinson7cbcda02020-11-10 10:09:06 +0000[diff] [blame]104CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]105CONFIG_USB_HOST_ETHER=y
106CONFIG_USB_ETHER_ASIX=y
107CONFIG_USB_ETHER_RTL8152=y
Simon Glass52cb5042022-10-18 07:46:31 -0600[diff] [blame]108CONFIG_VIDEO=y
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]109CONFIG_DISPLAY=y
110CONFIG_VIDEO_ROCKCHIP=y
111CONFIG_DISPLAY_ROCKCHIP_EDP=y
Tom Rini9e4bacb2020-06-04 19:29:09 -0400[diff] [blame]112CONFIG_SPL_TINY_MEMSET=y
113CONFIG_ERRNO_STR=y