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Heiko Schochercfcad352013-12-02 07:47:22 +01001/*
2 * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards
3 * (C) Copyright 2013 Siemens AG
4 *
5 * Based on:
6 * U-Boot file: include/configs/at91sam9260ek.h
7 *
8 * (C) Copyright 2007-2008
9 * Stelian Pop <stelian@popies.net>
10 * Lead Tech Design <www.leadtechdesign.com>
11 *
12 * SPDX-License-Identifier: GPL-2.0+
13 */
14
15#ifndef __CONFIG_H
16#define __CONFIG_H
17
18/*
19 * SoC must be defined first, before hardware.h is included.
20 * In this case SoC is defined in boards.cfg.
21 */
22#include <asm/hardware.h>
Heiko Schocherb7773572015-08-21 18:53:46 +020023#include <linux/sizes.h>
Heiko Schochercfcad352013-12-02 07:47:22 +010024
Heiko Schocher67067172014-11-18 09:41:57 +010025#if defined(CONFIG_SPL_BUILD)
Heiko Schocher67067172014-11-18 09:41:57 +010026#define CONFIG_SYS_ICACHE_OFF
27#define CONFIG_SYS_DCACHE_OFF
28#endif
Heiko Schochercfcad352013-12-02 07:47:22 +010029/*
30 * Warning: changing CONFIG_SYS_TEXT_BASE requires
31 * adapting the initial boot program.
32 * Since the linker has to swallow that define, we must use a pure
33 * hex number here!
34 */
35
Heiko Schocher5453c6c2014-10-31 08:31:05 +010036#define CONFIG_SYS_TEXT_BASE 0x21000000
Heiko Schochercfcad352013-12-02 07:47:22 +010037
38/* ARM asynchronous clock */
39#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
40#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */
Heiko Schochercfcad352013-12-02 07:47:22 +010041
42/* Misc CPU related */
43#define CONFIG_ARCH_CPU_INIT
44#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
45#define CONFIG_SETUP_MEMORY_TAGS
46#define CONFIG_INITRD_TAG
Heiko Schocher649d8102016-05-25 07:23:48 +020047#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
Heiko Schochercfcad352013-12-02 07:47:22 +010048
Heiko Schochercfcad352013-12-02 07:47:22 +010049/* general purpose I/O */
50#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
51#define CONFIG_AT91_GPIO
52#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
53
54/* serial console */
55#define CONFIG_ATMEL_USART
56#define CONFIG_USART_BASE ATMEL_BASE_DBGU
57#define CONFIG_USART_ID ATMEL_ID_SYS
Heiko Schochercfcad352013-12-02 07:47:22 +010058
Heiko Schochercfcad352013-12-02 07:47:22 +010059
60/*
61 * Command line configuration.
62 */
Heiko Schochercfcad352013-12-02 07:47:22 +010063#define CONFIG_CMD_NAND
64
65/*
66 * SDRAM: 1 bank, min 32, max 128 MB
67 * Initialized before u-boot gets started.
68 */
69#define CONFIG_NR_DRAM_BANKS 1
70#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
Heiko Schocher6dcb3622015-08-21 18:55:07 +020071#define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M)
Heiko Schochercfcad352013-12-02 07:47:22 +010072
73/*
74 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
75 * leaving the correct space for initial global data structure above
76 * that address while providing maximum stack area below.
77 */
Heiko Schocher6dcb3622015-08-21 18:55:07 +020078#define CONFIG_SYS_INIT_SP_ADDR \
Heiko Schochercfcad352013-12-02 07:47:22 +010079 (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
80
81/* NAND flash */
82#ifdef CONFIG_CMD_NAND
83#define CONFIG_NAND_ATMEL
84#define CONFIG_SYS_MAX_NAND_DEVICE 1
85#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
86#define CONFIG_SYS_NAND_DBW_8
87#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
88#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
89#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
90#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
91#endif
92
Heiko Schochercfcad352013-12-02 07:47:22 +010093/* Ethernet */
94#define CONFIG_MACB
Wenyou Yang7b811852016-05-17 13:11:35 +080095#define CONFIG_PHYLIB
Heiko Schochercfcad352013-12-02 07:47:22 +010096#define CONFIG_RMII
97#define CONFIG_AT91_WANTS_COMMON_PHY
98
Heiko Schocherc6af5c02015-01-21 08:38:23 +010099#define CONFIG_AT91SAM9_WATCHDOG
Heiko Schocher6dcb3622015-08-21 18:55:07 +0200100#define CONFIG_AT91_HW_WDT_TIMEOUT 15
Heiko Schocherc6af5c02015-01-21 08:38:23 +0100101#if !defined(CONFIG_SPL_BUILD)
102/* Enable the watchdog */
103#define CONFIG_HW_WATCHDOG
104#endif
105
Heiko Schochercfcad352013-12-02 07:47:22 +0100106/* USB */
107#if defined(CONFIG_BOARD_TAURUS)
108#define CONFIG_USB_ATMEL
Heiko Schochercf5137c2015-09-08 11:52:52 +0200109#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
Heiko Schochercfcad352013-12-02 07:47:22 +0100110#define CONFIG_USB_OHCI_NEW
111#define CONFIG_SYS_USB_OHCI_CPU_INIT
112#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000
113#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
114#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
Heiko Schochercf5137c2015-09-08 11:52:52 +0200115
116/* USB DFU support */
117#define CONFIG_CMD_MTDPARTS
118#define CONFIG_MTD_DEVICE
119#define CONFIG_MTD_PARTITIONS
120
Heiko Schochercf5137c2015-09-08 11:52:52 +0200121#define CONFIG_USB_GADGET_AT91
122
123/* DFU class support */
Heiko Schochercf5137c2015-09-08 11:52:52 +0200124#define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M)
125#define DFU_MANIFEST_POLL_TIMEOUT 25000
Heiko Schochercfcad352013-12-02 07:47:22 +0100126#endif
127
Heiko Schocher398b45b2014-10-31 08:30:56 +0100128/* SPI EEPROM */
129#define CONFIG_SPI
Heiko Schocher398b45b2014-10-31 08:30:56 +0100130#define CONFIG_ATMEL_SPI
Heiko Schocher398b45b2014-10-31 08:30:56 +0100131#define TAURUS_SPI_MASK (1 << 4)
132#define TAURUS_SPI_CS_PIN AT91_PIN_PA3
133
Heiko Schocher6f2a3252014-11-18 09:41:58 +0100134#if defined(CONFIG_SPL_BUILD)
135/* SPL related */
Heiko Schocher6f2a3252014-11-18 09:41:58 +0100136#define CONFIG_SPL_SPI_LOAD
137#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
138
139#define CONFIG_SF_DEFAULT_BUS 0
Heiko Schocher6dcb3622015-08-21 18:55:07 +0200140#define CONFIG_SF_DEFAULT_SPEED 1000000
141#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
Heiko Schocher6f2a3252014-11-18 09:41:58 +0100142#endif
143
Heiko Schochercfcad352013-12-02 07:47:22 +0100144/* load address */
145#define CONFIG_SYS_LOAD_ADDR 0x22000000
146
147/* bootstrap in spi flash , u-boot + env + linux in nandflash */
148#define CONFIG_ENV_IS_IN_NAND
149#define CONFIG_ENV_OFFSET 0x100000
150#define CONFIG_ENV_OFFSET_REDUND 0x180000
Heiko Schocher6dcb3622015-08-21 18:55:07 +0200151#define CONFIG_ENV_SIZE (SZ_128K) /* 1 sector = 128 kB */
Heiko Schochercfcad352013-12-02 07:47:22 +0100152#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
Heiko Schocherb7773572015-08-21 18:53:46 +0200153
154#if defined(CONFIG_BOARD_TAURUS)
155#define CONFIG_BOOTARGS_TAURUS \
Heiko Schochercfcad352013-12-02 07:47:22 +0100156 "console=ttyS0,115200 earlyprintk " \
157 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
158 "256k(env),256k(env_redundant),256k(spare)," \
159 "512k(dtb),6M(kernel)ro,-(rootfs) " \
160 "root=/dev/mtdblock7 rw rootfstype=jffs2"
Heiko Schocherb7773572015-08-21 18:53:46 +0200161#endif
162
163#if defined(CONFIG_BOARD_AXM)
164#define CONFIG_BOOTARGS_AXM \
165 "\0" \
166 "addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \
167 "${gatewayip}:${netmask}:${hostname}:${netdev}::off\0" \
168 "addtest=setenv bootargs ${bootargs} loglevel=4 test\0" \
169 "baudrate=115200\0" \
170 "boot_file=setenv bootfile /${project_dir}/kernel/uImage\0" \
171 "boot_retries=0\0" \
172 "bootcmd=run flash_self\0" \
173 "bootdelay=3\0" \
174 "ethact=macb0\0" \
175 "flash_nfs=run nand_kernel;run nfsargs;run addip;upgrade_available;"\
176 "bootm ${kernel_ram};reset\0" \
177 "flash_self=run nand_kernel;run setbootargs;upgrade_available;" \
178 "bootm ${kernel_ram};reset\0" \
179 "flash_self_test=run nand_kernel;run setbootargs addtest; " \
180 "upgrade_available;bootm ${kernel_ram};reset\0" \
181 "hostname=systemone\0" \
182 "kernel_Off=0x00200000\0" \
183 "kernel_Off_fallback=0x03800000\0" \
184 "kernel_ram=0x21500000\0" \
185 "kernel_size=0x00400000\0" \
186 "kernel_size_fallback=0x00400000\0" \
187 "loads_echo=1\0" \
188 "nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} " \
189 "${kernel_size}\0" \
190 "net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};" \
191 "run nfsargs;run addip;upgrade_available;bootm " \
192 "${kernel_ram};reset\0" \
193 "netdev=eth0\0" \
194 "nfsargs=run root_path;setenv bootargs ${bootargs} " \
195 "root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \
196 "at91sam9_wdt.wdt_timeout=16\0" \
197 "partitionset_active=A\0" \
198 "preboot=echo;echo Type 'run flash_self' to use kernel and root "\
199 "filesystem on memory;echo Type 'run flash_nfs' to use kernel " \
200 "from memory and root filesystem over NFS;echo Type 'run net_nfs' "\
201 "to get Kernel over TFTP and mount root filesystem over NFS;echo\0"\
202 "project_dir=systemone\0" \
203 "root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0"\
204 "rootfs=/dev/mtdblock5\0" \
205 "rootfs_fallback=/dev/mtdblock7\0" \
206 "setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops "\
207 "root=${rootfs} rootfstype=jffs2 panic=7 " \
208 "at91sam9_wdt.wdt_timeout=16\0" \
209 "stderr=serial\0" \
210 "stdin=serial\0" \
211 "stdout=serial\0" \
212 "upgrade_available=0\0"
213#endif
214
215#if defined(CONFIG_BOARD_TAURUS)
216#define CONFIG_BOOTARGS CONFIG_BOOTARGS_TAURUS
217#endif
218
219#if defined(CONFIG_BOARD_AXM)
220#define CONFIG_BOOTARGS CONFIG_BOOTARGS_AXM
221#endif
Heiko Schochercfcad352013-12-02 07:47:22 +0100222
Heiko Schochercfcad352013-12-02 07:47:22 +0100223#define CONFIG_SYS_CBSIZE 256
224#define CONFIG_SYS_MAXARGS 16
225#define CONFIG_SYS_PBSIZE \
226 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
227#define CONFIG_SYS_LONGHELP
228#define CONFIG_CMDLINE_EDITING
229#define CONFIG_AUTO_COMPLETE
230
231/*
232 * Size of malloc() pool
233 */
234#define CONFIG_SYS_MALLOC_LEN \
Heiko Schochercf5137c2015-09-08 11:52:52 +0200235 ROUND(3 * CONFIG_ENV_SIZE + SZ_4M, 0x1000)
Heiko Schochercfcad352013-12-02 07:47:22 +0100236
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100237/* Defines for SPL */
238#define CONFIG_SPL_FRAMEWORK
239#define CONFIG_SPL_TEXT_BASE 0x0
Heiko Schocherb7773572015-08-21 18:53:46 +0200240#define CONFIG_SPL_MAX_SIZE (31 * SZ_512)
241#define CONFIG_SPL_STACK (ATMEL_BASE_SRAM1 + SZ_16K)
Heiko Schocher6f2a3252014-11-18 09:41:58 +0100242#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \
243 CONFIG_SYS_MALLOC_LEN)
244#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100245
246#define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE
Heiko Schocher6dcb3622015-08-21 18:55:07 +0200247#define CONFIG_SPL_BSS_MAX_SIZE (3 * SZ_512)
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100248
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100249#define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100250#define CONFIG_SYS_USE_NANDFLASH 1
251#define CONFIG_SPL_NAND_DRIVERS
252#define CONFIG_SPL_NAND_BASE
253#define CONFIG_SPL_NAND_ECC
254#define CONFIG_SPL_NAND_RAW_ONLY
255#define CONFIG_SPL_NAND_SOFTECC
256#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
Heiko Schochercf5137c2015-09-08 11:52:52 +0200257#define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100258#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
259#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
260#define CONFIG_SYS_NAND_5_ADDR_CYCLE
261
Heiko Schocher6dcb3622015-08-21 18:55:07 +0200262#define CONFIG_SYS_NAND_SIZE (256 * SZ_1M)
263#define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K
264#define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K)
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100265#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
266 CONFIG_SYS_NAND_PAGE_SIZE)
267#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
268#define CONFIG_SYS_NAND_ECCSIZE 256
269#define CONFIG_SYS_NAND_ECCBYTES 3
270#define CONFIG_SYS_NAND_OOBSIZE 64
271#define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
272 48, 49, 50, 51, 52, 53, 54, 55, \
273 56, 57, 58, 59, 60, 61, 62, 63, }
274
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100275#define CONFIG_SPL_ATMEL_SIZE
276#define CONFIG_SYS_MASTER_CLOCK 132096000
277#define AT91_PLL_LOCK_TIMEOUT 1000000
278#define CONFIG_SYS_AT91_PLLA 0x202A3F01
279#define CONFIG_SYS_MCKR 0x1300
280#define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR)
281#define CONFIG_SYS_AT91_PLLB 0x10193F05
Heiko Schocherb7773572015-08-21 18:53:46 +0200282
Heiko Schochercfcad352013-12-02 07:47:22 +0100283#endif