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git01.mediatek.com / filogic / uboot / 69e784472c4e0315389729722a6178977a48d67c / . / arch / arm / dts / rk3328-orangepi-r1-plus-u-boot.dtsi
blob: 8ae003bbefd1f2278af54e9f073eb5f8c7867131 [file] [log] [blame]
Tianling Shen64ae7172023-05-20 19:20:49 +0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * (C) Copyright 2018-2019 Rockchip Electronics Co., Ltd
4 * (C) Copyright 2020 David Bauer
5 */
6
7#include "rk3328-u-boot.dtsi"
8#include "rk3328-sdram-ddr4-666.dtsi"
Tianling Shen64ae7172023-05-20 19:20:49 +0800[diff] [blame]9
Jonas Karlmand6a1b572024-02-17 00:22:34 +0000[diff] [blame]10&spi0 {
Jonas Karlmand6a1b572024-02-17 00:22:34 +0000[diff] [blame]11 flash@0 {
12 bootph-pre-ram;
13 bootph-some-ram;
14 };
Tianling Shen64ae7172023-05-20 19:20:49 +0800[diff] [blame]15};
16
Jonas Karlmandebdf8a2024-02-17 00:22:41 +0000[diff] [blame]17&spi0m2_clk {
18 bootph-pre-ram;
Jonas Karlman69e78442024-05-01 19:21:24 +0000[diff] [blame^]19 bootph-some-ram;
Jonas Karlmandebdf8a2024-02-17 00:22:41 +0000[diff] [blame]20};
21
22&spi0m2_cs0 {
23 bootph-pre-ram;
Jonas Karlman69e78442024-05-01 19:21:24 +0000[diff] [blame^]24 bootph-some-ram;
Jonas Karlmandebdf8a2024-02-17 00:22:41 +0000[diff] [blame]25};
26
27&spi0m2_rx {
28 bootph-pre-ram;
Jonas Karlman69e78442024-05-01 19:21:24 +0000[diff] [blame^]29 bootph-some-ram;
Jonas Karlmandebdf8a2024-02-17 00:22:41 +0000[diff] [blame]30};
31
32&spi0m2_tx {
33 bootph-pre-ram;
Jonas Karlman69e78442024-05-01 19:21:24 +0000[diff] [blame^]34 bootph-some-ram;
Jonas Karlmandebdf8a2024-02-17 00:22:41 +0000[diff] [blame]35};
36
Jonas Karlman08295ac2024-03-10 18:51:00 +0000[diff] [blame]37&usb20_otg {
38 dr_mode = "peripheral";
39};
40
Tianling Shen64ae7172023-05-20 19:20:49 +0800[diff] [blame]41&vcc_sd {
42 bootph-pre-ram;
43};