Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2014 - 2015 Xilinx, Inc. |
| 4 | * Michal Simek <michal.simek@xilinx.com> |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef _ASM_ARCH_SYS_PROTO_H |
| 8 | #define _ASM_ARCH_SYS_PROTO_H |
| 9 | |
Siva Durga Prasad Paladugu | 0e39bd7 | 2017-02-02 01:10:46 +0530 | [diff] [blame] | 10 | #define PAYLOAD_ARG_CNT 5 |
| 11 | |
Siva Durga Prasad Paladugu | 9f0a8e9 | 2017-07-25 11:51:36 +0530 | [diff] [blame] | 12 | #define ZYNQMP_CSU_SILICON_VER_MASK 0xF |
Siva Durga Prasad Paladugu | b1acb65 | 2018-02-28 13:26:53 +0530 | [diff] [blame] | 13 | #define ZYNQMP_SIP_SVC_PM_SECURE_IMG_LOAD 0xC200002D |
| 14 | #define KEY_PTR_LEN 32 |
Siva Durga Prasad Paladugu | 9f0a8e9 | 2017-07-25 11:51:36 +0530 | [diff] [blame] | 15 | |
Siva Durga Prasad Paladugu | 6809e81 | 2018-05-31 15:10:23 +0530 | [diff] [blame^] | 16 | #define ZYNQMP_FPGA_BIT_AUTH_DDR 1 |
| 17 | #define ZYNQMP_FPGA_BIT_AUTH_OCM 2 |
| 18 | #define ZYNQMP_FPGA_BIT_ENC_USR_KEY 3 |
| 19 | #define ZYNQMP_FPGA_BIT_ENC_DEV_KEY 4 |
Siva Durga Prasad Paladugu | 91c315d | 2018-03-01 17:44:47 +0530 | [diff] [blame] | 20 | #define ZYNQMP_FPGA_BIT_NS 5 |
| 21 | |
Siva Durga Prasad Paladugu | 6809e81 | 2018-05-31 15:10:23 +0530 | [diff] [blame^] | 22 | #define ZYNQMP_FPGA_AUTH_DDR 1 |
| 23 | |
Siva Durga Prasad Paladugu | 9f0a8e9 | 2017-07-25 11:51:36 +0530 | [diff] [blame] | 24 | enum { |
| 25 | IDCODE, |
| 26 | VERSION, |
Michal Simek | 50d8cef | 2017-08-22 14:58:53 +0200 | [diff] [blame] | 27 | IDCODE2, |
Siva Durga Prasad Paladugu | 9f0a8e9 | 2017-07-25 11:51:36 +0530 | [diff] [blame] | 28 | }; |
| 29 | |
| 30 | enum { |
| 31 | ZYNQMP_SILICON_V1, |
| 32 | ZYNQMP_SILICON_V2, |
| 33 | ZYNQMP_SILICON_V3, |
| 34 | ZYNQMP_SILICON_V4, |
| 35 | }; |
| 36 | |
Siva Durga Prasad Paladugu | 5e2a907 | 2017-07-13 19:01:09 +0530 | [diff] [blame] | 37 | enum { |
| 38 | TCM_LOCK, |
| 39 | TCM_SPLIT, |
| 40 | }; |
| 41 | |
Michal Simek | 44dd520 | 2017-07-31 10:37:09 +0200 | [diff] [blame] | 42 | int zynq_board_read_rom_ethaddr(unsigned char *ethaddr); |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 43 | unsigned int zynqmp_get_silicon_version(void); |
| 44 | |
Michal Simek | 456e454 | 2017-01-09 10:05:16 +0100 | [diff] [blame] | 45 | void handoff_setup(void); |
| 46 | |
Michal Simek | 8b35330 | 2017-02-07 14:32:26 +0100 | [diff] [blame] | 47 | void zynqmp_pmufw_version(void); |
Siva Durga Prasad Paladugu | 0e39bd7 | 2017-02-02 01:10:46 +0530 | [diff] [blame] | 48 | int zynqmp_mmio_write(const u32 address, const u32 mask, const u32 value); |
| 49 | int zynqmp_mmio_read(const u32 address, u32 *value); |
| 50 | int invoke_smc(u32 pm_api_id, u32 arg0, u32 arg1, u32 arg2, u32 arg3, |
| 51 | u32 *ret_payload); |
| 52 | |
Siva Durga Prasad Paladugu | 5e2a907 | 2017-07-13 19:01:09 +0530 | [diff] [blame] | 53 | void initialize_tcm(bool mode); |
Nitin Jain | 9bcc76f | 2018-04-20 12:30:40 +0530 | [diff] [blame] | 54 | void mem_map_fill(void); |
Siva Durga Prasad Paladugu | cd35d52 | 2017-07-25 11:51:38 +0530 | [diff] [blame] | 55 | int chip_id(unsigned char id); |
| 56 | |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 57 | #endif /* _ASM_ARCH_SYS_PROTO_H */ |