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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Michal Simek04b7e622015-01-15 10:01:51 +01002/*
3 * (C) Copyright 2014 - 2015 Xilinx, Inc.
4 * Michal Simek <michal.simek@xilinx.com>
Michal Simek04b7e622015-01-15 10:01:51 +01005 */
6
7#ifndef _ASM_ARCH_SYS_PROTO_H
8#define _ASM_ARCH_SYS_PROTO_H
9
Siva Durga Prasad Paladugu0e39bd72017-02-02 01:10:46 +053010#define PAYLOAD_ARG_CNT 5
11
Siva Durga Prasad Paladugu9f0a8e92017-07-25 11:51:36 +053012#define ZYNQMP_CSU_SILICON_VER_MASK 0xF
Siva Durga Prasad Paladugub1acb652018-02-28 13:26:53 +053013#define ZYNQMP_SIP_SVC_PM_SECURE_IMG_LOAD 0xC200002D
14#define KEY_PTR_LEN 32
Siva Durga Prasad Paladugu9f0a8e92017-07-25 11:51:36 +053015
Siva Durga Prasad Paladugu6809e812018-05-31 15:10:23 +053016#define ZYNQMP_FPGA_BIT_AUTH_DDR 1
17#define ZYNQMP_FPGA_BIT_AUTH_OCM 2
18#define ZYNQMP_FPGA_BIT_ENC_USR_KEY 3
19#define ZYNQMP_FPGA_BIT_ENC_DEV_KEY 4
Siva Durga Prasad Paladugu91c315d2018-03-01 17:44:47 +053020#define ZYNQMP_FPGA_BIT_NS 5
21
Siva Durga Prasad Paladugu6809e812018-05-31 15:10:23 +053022#define ZYNQMP_FPGA_AUTH_DDR 1
23
Siva Durga Prasad Paladugu9f0a8e92017-07-25 11:51:36 +053024enum {
25 IDCODE,
26 VERSION,
Michal Simek50d8cef2017-08-22 14:58:53 +020027 IDCODE2,
Siva Durga Prasad Paladugu9f0a8e92017-07-25 11:51:36 +053028};
29
30enum {
31 ZYNQMP_SILICON_V1,
32 ZYNQMP_SILICON_V2,
33 ZYNQMP_SILICON_V3,
34 ZYNQMP_SILICON_V4,
35};
36
Siva Durga Prasad Paladugu5e2a9072017-07-13 19:01:09 +053037enum {
38 TCM_LOCK,
39 TCM_SPLIT,
40};
41
Michal Simek44dd5202017-07-31 10:37:09 +020042int zynq_board_read_rom_ethaddr(unsigned char *ethaddr);
Michal Simek04b7e622015-01-15 10:01:51 +010043unsigned int zynqmp_get_silicon_version(void);
44
Michal Simek456e4542017-01-09 10:05:16 +010045void handoff_setup(void);
46
Michal Simek8b353302017-02-07 14:32:26 +010047void zynqmp_pmufw_version(void);
Siva Durga Prasad Paladugu0e39bd72017-02-02 01:10:46 +053048int zynqmp_mmio_write(const u32 address, const u32 mask, const u32 value);
49int zynqmp_mmio_read(const u32 address, u32 *value);
50int invoke_smc(u32 pm_api_id, u32 arg0, u32 arg1, u32 arg2, u32 arg3,
51 u32 *ret_payload);
52
Siva Durga Prasad Paladugu5e2a9072017-07-13 19:01:09 +053053void initialize_tcm(bool mode);
Nitin Jain9bcc76f2018-04-20 12:30:40 +053054void mem_map_fill(void);
Siva Durga Prasad Paladugucd35d522017-07-25 11:51:38 +053055int chip_id(unsigned char id);
56
Michal Simek04b7e622015-01-15 10:01:51 +010057#endif /* _ASM_ARCH_SYS_PROTO_H */