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git01.mediatek.com / filogic / uboot / 67f97d1bcafca0236eaf1c195e2bda9ae8d05fc5 / . / configs / orangepi-r1-plus-lts-rk3328_defconfig
blob: e9f7a1306923bd56814a68ee1b0e6ceb298fd48c [file] [log] [blame]
Tianling Shen0c8dea52023-05-20 19:20:50 +0800[diff] [blame]1CONFIG_ARM=y
2CONFIG_SKIP_LOWLEVEL_INIT=y
3CONFIG_COUNTER_FREQUENCY=24000000
4CONFIG_ARCH_ROCKCHIP=y
Tianling Shen0c8dea52023-05-20 19:20:50 +0800[diff] [blame]5CONFIG_SPL_GPIO=y
6CONFIG_NR_DRAM_BANKS=1
Tom Rini278f0f12023-08-07 15:17:12 -0400[diff] [blame]7CONFIG_SF_DEFAULT_SPEED=20000000
Tianling Shen0c8dea52023-05-20 19:20:50 +0800[diff] [blame]8CONFIG_ENV_OFFSET=0x3F8000
9CONFIG_DEFAULT_DEVICE_TREE="rk3328-orangepi-r1-plus-lts"
10CONFIG_DM_RESET=y
11CONFIG_ROCKCHIP_RK3328=y
Jonas Karlmandebdf8a2024-02-17 00:22:41 +0000[diff] [blame]12CONFIG_ROCKCHIP_SPI_IMAGE=y
Tianling Shen0c8dea52023-05-20 19:20:50 +0800[diff] [blame]13CONFIG_DEBUG_UART_BASE=0xFF130000
14CONFIG_DEBUG_UART_CLOCK=24000000
Jonas Karlmandebdf8a2024-02-17 00:22:41 +0000[diff] [blame]15CONFIG_SPL_SPI_FLASH_SUPPORT=y
16CONFIG_SPL_SPI=y
Tianling Shen0c8dea52023-05-20 19:20:50 +0800[diff] [blame]17CONFIG_SYS_LOAD_ADDR=0x800800
18CONFIG_DEBUG_UART=y
19# CONFIG_ANDROID_BOOT_IMAGE is not set
20CONFIG_FIT=y
21CONFIG_FIT_VERBOSE=y
Jonas Karlmandc23df72024-02-17 00:22:33 +0000[diff] [blame]22CONFIG_SPL_FIT_SIGNATURE=y
Tianling Shen0c8dea52023-05-20 19:20:50 +0800[diff] [blame]23CONFIG_SPL_LOAD_FIT=y
Jonas Karlmandc23df72024-02-17 00:22:33 +0000[diff] [blame]24CONFIG_LEGACY_IMAGE_FORMAT=y
Tianling Shen0c8dea52023-05-20 19:20:50 +0800[diff] [blame]25CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-orangepi-r1-plus-lts.dtb"
26# CONFIG_DISPLAY_CPUINFO is not set
27CONFIG_DISPLAY_BOARDINFO_LATE=y
Tianling Shen0c8dea52023-05-20 19:20:50 +0800[diff] [blame]28CONFIG_SPL_MAX_SIZE=0x40000
29CONFIG_SPL_PAD_TO=0x7f8000
Tianling Shen0c8dea52023-05-20 19:20:50 +0800[diff] [blame]30# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
Tianling Shen0c8dea52023-05-20 19:20:50 +0800[diff] [blame]31CONFIG_SPL_POWER=y
Jonas Karlmandebdf8a2024-02-17 00:22:41 +0000[diff] [blame]32CONFIG_SPL_SPI_LOAD=y
33CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
Tianling Shen0c8dea52023-05-20 19:20:50 +0800[diff] [blame]34CONFIG_SPL_ATF=y
35CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
Tianling Shen0c8dea52023-05-20 19:20:50 +0800[diff] [blame]36CONFIG_CMD_BOOTZ=y
Jonas Karlmandc23df72024-02-17 00:22:33 +0000[diff] [blame]37CONFIG_CMD_GPIO=y
Tianling Shen0c8dea52023-05-20 19:20:50 +0800[diff] [blame]38CONFIG_CMD_GPT=y
39CONFIG_CMD_MMC=y
40CONFIG_CMD_USB=y
41# CONFIG_CMD_SETEXPR is not set
42CONFIG_CMD_TIME=y
Jonas Karlmandc23df72024-02-17 00:22:33 +0000[diff] [blame]43CONFIG_CMD_REGULATOR=y
Tianling Shen0c8dea52023-05-20 19:20:50 +0800[diff] [blame]44CONFIG_SPL_OF_CONTROL=y
45CONFIG_TPL_OF_CONTROL=y
46CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
47CONFIG_TPL_OF_PLATDATA=y
48CONFIG_ENV_IS_IN_MMC=y
49CONFIG_SYS_RELOC_GD_ENV_ADDR=y
50CONFIG_SYS_MMC_ENV_DEV=1
Tianling Shen0c8dea52023-05-20 19:20:50 +0800[diff] [blame]51CONFIG_TPL_DM=y
Jonas Karlmandc23df72024-02-17 00:22:33 +0000[diff] [blame]52CONFIG_SPL_DM_SEQ_ALIAS=y
Tianling Shen0c8dea52023-05-20 19:20:50 +0800[diff] [blame]53CONFIG_REGMAP=y
54CONFIG_SPL_REGMAP=y
55CONFIG_TPL_REGMAP=y
56CONFIG_SYSCON=y
57CONFIG_SPL_SYSCON=y
58CONFIG_TPL_SYSCON=y
59CONFIG_CLK=y
60CONFIG_SPL_CLK=y
61CONFIG_FASTBOOT_BUF_ADDR=0x800800
62CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
63CONFIG_ROCKCHIP_GPIO=y
64CONFIG_SYS_I2C_ROCKCHIP=y
65CONFIG_MMC_DW=y
66CONFIG_MMC_DW_ROCKCHIP=y
Jonas Karlmandebdf8a2024-02-17 00:22:41 +0000[diff] [blame]67CONFIG_SPI_FLASH_SFDP_SUPPORT=y
Tianling Shen0c8dea52023-05-20 19:20:50 +0800[diff] [blame]68CONFIG_SPI_FLASH_GIGADEVICE=y
Jonas Karlmandebdf8a2024-02-17 00:22:41 +0000[diff] [blame]69CONFIG_SPI_FLASH_MACRONIX=y
70CONFIG_SPI_FLASH_WINBOND=y
71CONFIG_SPI_FLASH_XMC=y
72CONFIG_SPI_FLASH_ZBIT=y
Jonas Karlmandc23df72024-02-17 00:22:33 +0000[diff] [blame]73CONFIG_PHY_MOTORCOMM=y
74CONFIG_PHY_REALTEK=y
75CONFIG_DM_MDIO=y
76CONFIG_DM_ETH_PHY=y
77CONFIG_PHY_GIGE=y
Tianling Shen0c8dea52023-05-20 19:20:50 +0800[diff] [blame]78CONFIG_ETH_DESIGNWARE=y
79CONFIG_GMAC_ROCKCHIP=y
Jonas Karlmandc23df72024-02-17 00:22:33 +0000[diff] [blame]80CONFIG_PHY_ROCKCHIP_INNO_USB2=y
Tianling Shen0c8dea52023-05-20 19:20:50 +0800[diff] [blame]81CONFIG_PINCTRL=y
82CONFIG_SPL_PINCTRL=y
83CONFIG_DM_PMIC=y
84CONFIG_PMIC_RK8XX=y
Tianling Shen0c8dea52023-05-20 19:20:50 +0800[diff] [blame]85CONFIG_SPL_DM_REGULATOR=y
Tianling Shen0c8dea52023-05-20 19:20:50 +0800[diff] [blame]86CONFIG_DM_REGULATOR_FIXED=y
87CONFIG_SPL_DM_REGULATOR_FIXED=y
88CONFIG_REGULATOR_RK8XX=y
89CONFIG_PWM_ROCKCHIP=y
90CONFIG_RAM=y
91CONFIG_SPL_RAM=y
92CONFIG_TPL_RAM=y
Jonas Karlmandc23df72024-02-17 00:22:33 +0000[diff] [blame]93CONFIG_DM_RNG=y
94CONFIG_RNG_ROCKCHIP=y
Tianling Shen0c8dea52023-05-20 19:20:50 +0800[diff] [blame]95CONFIG_BAUDRATE=1500000
96CONFIG_DEBUG_UART_SHIFT=2
97CONFIG_SYS_NS16550_MEM32=y
98CONFIG_ROCKCHIP_SPI=y
99CONFIG_SYSINFO=y
100CONFIG_SYSRESET=y
101# CONFIG_TPL_SYSRESET is not set
102CONFIG_USB=y
103CONFIG_USB_XHCI_HCD=y
Tianling Shen0c8dea52023-05-20 19:20:50 +0800[diff] [blame]104CONFIG_USB_EHCI_HCD=y
105CONFIG_USB_EHCI_GENERIC=y
106CONFIG_USB_OHCI_HCD=y
107CONFIG_USB_OHCI_GENERIC=y
108CONFIG_USB_DWC2=y
109CONFIG_USB_DWC3=y
110# CONFIG_USB_DWC3_GADGET is not set
Jonas Karlmanac8d1572023-11-12 17:48:57 +0000[diff] [blame]111CONFIG_USB_DWC3_GENERIC=y
Tianling Shen0c8dea52023-05-20 19:20:50 +0800[diff] [blame]112CONFIG_USB_GADGET=y
113CONFIG_USB_GADGET_DWC2_OTG=y
114CONFIG_SPL_TINY_MEMSET=y
115CONFIG_TPL_TINY_MEMSET=y
116CONFIG_ERRNO_STR=y