| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/mips/cpus.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: MIPS CPUs |
| 8 | |
| 9 | maintainers: |
| 10 | - Thomas Bogendoerfer <tsbogend@alpha.franken.de> |
| 11 | - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> |
| 12 | |
| 13 | description: | |
| 14 | The device tree allows to describe the layout of CPUs in a system through |
| 15 | the "cpus" node, which in turn contains a number of subnodes (ie "cpu") |
| 16 | defining properties for every CPU. |
| 17 | |
| 18 | properties: |
| 19 | compatible: |
| 20 | enum: |
| 21 | - brcm,bmips3300 |
| 22 | - brcm,bmips4350 |
| 23 | - brcm,bmips4380 |
| 24 | - brcm,bmips5000 |
| 25 | - brcm,bmips5200 |
| 26 | - ingenic,xburst-mxu1.0 |
| 27 | - ingenic,xburst-fpu1.0-mxu1.1 |
| 28 | - ingenic,xburst-fpu2.0-mxu2.0 |
| 29 | - ingenic,xburst2-fpu2.1-mxu2.1-smt |
| 30 | - loongson,gs264 |
| 31 | - mips,m14Kc |
| 32 | - mips,mips4Kc |
| 33 | - mips,mips4KEc |
| 34 | - mips,mips24Kc |
| 35 | - mips,mips24KEc |
| 36 | - mips,mips74Kc |
| 37 | - mips,mips1004Kc |
| 38 | - mti,interaptiv |
| 39 | - mti,mips24KEc |
| 40 | - mti,mips14KEc |
| 41 | - mti,mips14Kc |
| 42 | |
| 43 | reg: |
| 44 | maxItems: 1 |
| 45 | |
| 46 | clocks: |
| 47 | maxItems: 1 |
| 48 | |
| 49 | device_type: true |
| 50 | |
| 51 | allOf: |
| 52 | - if: |
| 53 | properties: |
| 54 | compatible: |
| 55 | contains: |
| 56 | enum: |
| 57 | - ingenic,xburst-mxu1.0 |
| 58 | - ingenic,xburst-fpu1.0-mxu1.1 |
| 59 | - ingenic,xburst-fpu2.0-mxu2.0 |
| 60 | - ingenic,xburst2-fpu2.1-mxu2.1-smt |
| 61 | then: |
| 62 | required: |
| 63 | - device_type |
| 64 | - clocks |
| 65 | |
| 66 | required: |
| 67 | - compatible |
| 68 | - reg |
| 69 | |
| 70 | additionalProperties: false |
| 71 | |
| 72 | examples: |
| 73 | - | |
| 74 | cpus { |
| 75 | #size-cells = <0>; |
| 76 | #address-cells = <1>; |
| 77 | |
| 78 | cpu@0 { |
| 79 | compatible = "mips,mips1004Kc"; |
| 80 | device_type = "cpu"; |
| 81 | reg = <0>; |
| 82 | }; |
| 83 | |
| 84 | cpu@1 { |
| 85 | compatible = "mips,mips1004Kc"; |
| 86 | device_type = "cpu"; |
| 87 | reg = <1>; |
| 88 | }; |
| 89 | }; |
| 90 | |
| 91 | - | |
| 92 | // Example 2 (Ingenic CPU) |
| 93 | #include <dt-bindings/clock/ingenic,jz4780-cgu.h> |
| 94 | |
| 95 | cpus { |
| 96 | #address-cells = <1>; |
| 97 | #size-cells = <0>; |
| 98 | |
| 99 | cpu@0 { |
| 100 | compatible = "ingenic,xburst-fpu1.0-mxu1.1"; |
| 101 | device_type = "cpu"; |
| 102 | reg = <0>; |
| 103 | |
| 104 | clocks = <&cgu JZ4780_CLK_CPU>; |
| 105 | }; |
| 106 | |
| 107 | cpu@1 { |
| 108 | compatible = "ingenic,xburst-fpu1.0-mxu1.1"; |
| 109 | device_type = "cpu"; |
| 110 | reg = <1>; |
| 111 | |
| 112 | clocks = <&cgu JZ4780_CLK_CORE1>; |
| 113 | }; |
| 114 | }; |
| 115 | ... |