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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mips/cpus.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MIPS CPUs
+
+maintainers:
+ - Thomas Bogendoerfer <tsbogend@alpha.franken.de>
+ - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
+
+description: |
+ The device tree allows to describe the layout of CPUs in a system through
+ the "cpus" node, which in turn contains a number of subnodes (ie "cpu")
+ defining properties for every CPU.
+
+properties:
+ compatible:
+ enum:
+ - brcm,bmips3300
+ - brcm,bmips4350
+ - brcm,bmips4380
+ - brcm,bmips5000
+ - brcm,bmips5200
+ - ingenic,xburst-mxu1.0
+ - ingenic,xburst-fpu1.0-mxu1.1
+ - ingenic,xburst-fpu2.0-mxu2.0
+ - ingenic,xburst2-fpu2.1-mxu2.1-smt
+ - loongson,gs264
+ - mips,m14Kc
+ - mips,mips4Kc
+ - mips,mips4KEc
+ - mips,mips24Kc
+ - mips,mips24KEc
+ - mips,mips74Kc
+ - mips,mips1004Kc
+ - mti,interaptiv
+ - mti,mips24KEc
+ - mti,mips14KEc
+ - mti,mips14Kc
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ device_type: true
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - ingenic,xburst-mxu1.0
+ - ingenic,xburst-fpu1.0-mxu1.1
+ - ingenic,xburst-fpu2.0-mxu2.0
+ - ingenic,xburst2-fpu2.1-mxu2.1-smt
+ then:
+ required:
+ - device_type
+ - clocks
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ cpus {
+ #size-cells = <0>;
+ #address-cells = <1>;
+
+ cpu@0 {
+ compatible = "mips,mips1004Kc";
+ device_type = "cpu";
+ reg = <0>;
+ };
+
+ cpu@1 {
+ compatible = "mips,mips1004Kc";
+ device_type = "cpu";
+ reg = <1>;
+ };
+ };
+
+ - |
+ // Example 2 (Ingenic CPU)
+ #include <dt-bindings/clock/ingenic,jz4780-cgu.h>
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ compatible = "ingenic,xburst-fpu1.0-mxu1.1";
+ device_type = "cpu";
+ reg = <0>;
+
+ clocks = <&cgu JZ4780_CLK_CPU>;
+ };
+
+ cpu@1 {
+ compatible = "ingenic,xburst-fpu1.0-mxu1.1";
+ device_type = "cpu";
+ reg = <1>;
+
+ clocks = <&cgu JZ4780_CLK_CORE1>;
+ };
+ };
+...