wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 1 | /* |
| 2 | * COM1 NS16550 support |
Stefan Roese | 88fbf93 | 2010-04-15 16:07:28 +0200 | [diff] [blame] | 3 | * originally from linux source (arch/powerpc/boot/ns16550.c) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 4 | * modified to use CONFIG_SYS_ISA_MEM and new defines |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
Simon Glass | e98e01e | 2014-09-04 16:27:32 -0600 | [diff] [blame] | 7 | #include <common.h> |
Paul Burton | 8aadc56 | 2016-09-08 07:47:29 +0100 | [diff] [blame] | 8 | #include <clk.h> |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 9 | #include <dm.h> |
| 10 | #include <errno.h> |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 11 | #include <ns16550.h> |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 12 | #include <serial.h> |
Ladislav Michl | cc29442 | 2010-02-01 23:34:25 +0100 | [diff] [blame] | 13 | #include <watchdog.h> |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 14 | #include <linux/types.h> |
| 15 | #include <asm/io.h> |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 16 | |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 17 | DECLARE_GLOBAL_DATA_PTR; |
| 18 | |
Detlev Zundel | 166fb54 | 2009-04-03 11:53:01 +0200 | [diff] [blame] | 19 | #define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */ |
| 20 | #define UART_MCRVAL (UART_MCR_DTR | \ |
| 21 | UART_MCR_RTS) /* RTS/DTR */ |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 22 | |
| 23 | #ifndef CONFIG_DM_SERIAL |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 24 | #ifdef CONFIG_SYS_NS16550_PORT_MAPPED |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 25 | #define serial_out(x, y) outb(x, (ulong)y) |
| 26 | #define serial_in(y) inb((ulong)y) |
Dave Aldridge | a51bebc | 2011-09-01 22:47:14 +0000 | [diff] [blame] | 27 | #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0) |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 28 | #define serial_out(x, y) out_be32(y, x) |
| 29 | #define serial_in(y) in_be32(y) |
Dave Aldridge | a51bebc | 2011-09-01 22:47:14 +0000 | [diff] [blame] | 30 | #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0) |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 31 | #define serial_out(x, y) out_le32(y, x) |
| 32 | #define serial_in(y) in_le32(y) |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 33 | #else |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 34 | #define serial_out(x, y) writeb(x, y) |
| 35 | #define serial_in(y) readb(y) |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 36 | #endif |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 37 | #endif /* !CONFIG_DM_SERIAL */ |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 38 | |
Khoronzhuk, Ivan | 8090298 | 2014-07-16 00:59:25 +0300 | [diff] [blame] | 39 | #if defined(CONFIG_SOC_KEYSTONE) |
Vitaly Andrianov | 7bcf4d6 | 2014-04-04 13:16:53 -0400 | [diff] [blame] | 40 | #define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0 |
| 41 | #define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0)) |
Karicheri, Muralidharan | cbc0888 | 2014-04-09 15:38:46 -0400 | [diff] [blame] | 42 | #undef UART_MCRVAL |
| 43 | #ifdef CONFIG_SERIAL_HW_FLOW_CONTROL |
| 44 | #define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE) |
| 45 | #else |
| 46 | #define UART_MCRVAL (UART_MCR_RTS) |
| 47 | #endif |
Vitaly Andrianov | 7bcf4d6 | 2014-04-04 13:16:53 -0400 | [diff] [blame] | 48 | #endif |
| 49 | |
Prafulla Wadaskar | 6621637 | 2010-10-27 21:58:31 +0530 | [diff] [blame] | 50 | #ifndef CONFIG_SYS_NS16550_IER |
| 51 | #define CONFIG_SYS_NS16550_IER 0x00 |
| 52 | #endif /* CONFIG_SYS_NS16550_IER */ |
| 53 | |
Simon Glass | b31fb12 | 2015-02-27 22:06:26 -0700 | [diff] [blame] | 54 | static inline void serial_out_shift(void *addr, int shift, int value) |
Simon Glass | 6aba4fd | 2015-01-26 18:27:08 -0700 | [diff] [blame] | 55 | { |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 56 | #ifdef CONFIG_SYS_NS16550_PORT_MAPPED |
Simon Glass | 96e230b | 2014-10-10 07:49:13 -0600 | [diff] [blame] | 57 | outb(value, (ulong)addr); |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 58 | #elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN) |
| 59 | out_le32(addr, value); |
| 60 | #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN) |
| 61 | out_be32(addr, value); |
Simon Glass | 0b31ec7 | 2015-05-12 14:55:02 -0600 | [diff] [blame] | 62 | #elif defined(CONFIG_SYS_NS16550_MEM32) |
| 63 | writel(value, addr); |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 64 | #elif defined(CONFIG_SYS_BIG_ENDIAN) |
Simon Glass | 6aba4fd | 2015-01-26 18:27:08 -0700 | [diff] [blame] | 65 | writeb(value, addr + (1 << shift) - 1); |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 66 | #else |
| 67 | writeb(value, addr); |
| 68 | #endif |
| 69 | } |
| 70 | |
Simon Glass | b31fb12 | 2015-02-27 22:06:26 -0700 | [diff] [blame] | 71 | static inline int serial_in_shift(void *addr, int shift) |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 72 | { |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 73 | #ifdef CONFIG_SYS_NS16550_PORT_MAPPED |
Simon Glass | 96e230b | 2014-10-10 07:49:13 -0600 | [diff] [blame] | 74 | return inb((ulong)addr); |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 75 | #elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN) |
| 76 | return in_le32(addr); |
| 77 | #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN) |
| 78 | return in_be32(addr); |
Simon Glass | 0b31ec7 | 2015-05-12 14:55:02 -0600 | [diff] [blame] | 79 | #elif defined(CONFIG_SYS_NS16550_MEM32) |
| 80 | return readl(addr); |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 81 | #elif defined(CONFIG_SYS_BIG_ENDIAN) |
Axel Lin | b5c372d | 2015-02-28 15:55:36 +0800 | [diff] [blame] | 82 | return readb(addr + (1 << shift) - 1); |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 83 | #else |
| 84 | return readb(addr); |
| 85 | #endif |
| 86 | } |
| 87 | |
Marek Vasut | 3e97cbb | 2016-05-25 02:13:03 +0200 | [diff] [blame] | 88 | #ifdef CONFIG_DM_SERIAL |
| 89 | |
| 90 | #ifndef CONFIG_SYS_NS16550_CLK |
| 91 | #define CONFIG_SYS_NS16550_CLK 0 |
| 92 | #endif |
| 93 | |
Simon Glass | 6aba4fd | 2015-01-26 18:27:08 -0700 | [diff] [blame] | 94 | static void ns16550_writeb(NS16550_t port, int offset, int value) |
| 95 | { |
| 96 | struct ns16550_platdata *plat = port->plat; |
| 97 | unsigned char *addr; |
| 98 | |
| 99 | offset *= 1 << plat->reg_shift; |
Paul Burton | c8acc89 | 2016-05-17 07:43:26 +0100 | [diff] [blame] | 100 | addr = (unsigned char *)plat->base + offset; |
| 101 | |
Simon Glass | 6aba4fd | 2015-01-26 18:27:08 -0700 | [diff] [blame] | 102 | /* |
| 103 | * As far as we know it doesn't make sense to support selection of |
| 104 | * these options at run-time, so use the existing CONFIG options. |
| 105 | */ |
Michal Simek | 7e0cdc4 | 2016-02-16 16:17:49 +0100 | [diff] [blame] | 106 | serial_out_shift(addr + plat->reg_offset, plat->reg_shift, value); |
Simon Glass | 6aba4fd | 2015-01-26 18:27:08 -0700 | [diff] [blame] | 107 | } |
| 108 | |
| 109 | static int ns16550_readb(NS16550_t port, int offset) |
| 110 | { |
| 111 | struct ns16550_platdata *plat = port->plat; |
| 112 | unsigned char *addr; |
| 113 | |
| 114 | offset *= 1 << plat->reg_shift; |
Paul Burton | c8acc89 | 2016-05-17 07:43:26 +0100 | [diff] [blame] | 115 | addr = (unsigned char *)plat->base + offset; |
Simon Glass | 6aba4fd | 2015-01-26 18:27:08 -0700 | [diff] [blame] | 116 | |
Michal Simek | 7e0cdc4 | 2016-02-16 16:17:49 +0100 | [diff] [blame] | 117 | return serial_in_shift(addr + plat->reg_offset, plat->reg_shift); |
Simon Glass | 6aba4fd | 2015-01-26 18:27:08 -0700 | [diff] [blame] | 118 | } |
| 119 | |
Marek Vasut | f523c9c | 2016-12-01 02:06:29 +0100 | [diff] [blame] | 120 | static u32 ns16550_getfcr(NS16550_t port) |
| 121 | { |
| 122 | struct ns16550_platdata *plat = port->plat; |
| 123 | |
| 124 | return plat->fcr; |
| 125 | } |
| 126 | |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 127 | /* We can clean these up once everything is moved to driver model */ |
| 128 | #define serial_out(value, addr) \ |
Simon Glass | b31fb12 | 2015-02-27 22:06:26 -0700 | [diff] [blame] | 129 | ns16550_writeb(com_port, \ |
| 130 | (unsigned char *)addr - (unsigned char *)com_port, value) |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 131 | #define serial_in(addr) \ |
Simon Glass | b31fb12 | 2015-02-27 22:06:26 -0700 | [diff] [blame] | 132 | ns16550_readb(com_port, \ |
| 133 | (unsigned char *)addr - (unsigned char *)com_port) |
Marek Vasut | f523c9c | 2016-12-01 02:06:29 +0100 | [diff] [blame] | 134 | #else |
| 135 | static u32 ns16550_getfcr(NS16550_t port) |
| 136 | { |
Heiko Schocher | 06f108e | 2017-01-18 08:05:49 +0100 | [diff] [blame] | 137 | return UART_FCR_DEFVAL; |
Marek Vasut | f523c9c | 2016-12-01 02:06:29 +0100 | [diff] [blame] | 138 | } |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 139 | #endif |
| 140 | |
Marek Vasut | 3b164a5 | 2016-05-25 02:13:16 +0200 | [diff] [blame] | 141 | int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate) |
Simon Glass | e98e01e | 2014-09-04 16:27:32 -0600 | [diff] [blame] | 142 | { |
| 143 | const unsigned int mode_x_div = 16; |
| 144 | |
Simon Glass | 27afb52 | 2015-01-26 18:27:09 -0700 | [diff] [blame] | 145 | return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate); |
| 146 | } |
| 147 | |
Simon Glass | c31ebfe | 2014-09-04 16:27:33 -0600 | [diff] [blame] | 148 | static void NS16550_setbrg(NS16550_t com_port, int baud_divisor) |
| 149 | { |
| 150 | serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr); |
| 151 | serial_out(baud_divisor & 0xff, &com_port->dll); |
| 152 | serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm); |
| 153 | serial_out(UART_LCRVAL, &com_port->lcr); |
| 154 | } |
| 155 | |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 156 | void NS16550_init(NS16550_t com_port, int baud_divisor) |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 157 | { |
Gregoire Gentil | 6b05d0a | 2014-11-10 11:04:10 -0800 | [diff] [blame] | 158 | #if (defined(CONFIG_SPL_BUILD) && \ |
| 159 | (defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX))) |
Manfred Huber | f9b8ae3 | 2013-03-29 02:52:36 +0000 | [diff] [blame] | 160 | /* |
Gregoire Gentil | 6b05d0a | 2014-11-10 11:04:10 -0800 | [diff] [blame] | 161 | * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode |
| 162 | * before SPL starts only THRE bit is set. We have to empty the |
| 163 | * transmitter before initialization starts. |
Manfred Huber | f9b8ae3 | 2013-03-29 02:52:36 +0000 | [diff] [blame] | 164 | */ |
| 165 | if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE)) |
| 166 | == UART_LSR_THRE) { |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 167 | if (baud_divisor != -1) |
| 168 | NS16550_setbrg(com_port, baud_divisor); |
Manfred Huber | f9b8ae3 | 2013-03-29 02:52:36 +0000 | [diff] [blame] | 169 | serial_out(0, &com_port->mdr1); |
| 170 | } |
| 171 | #endif |
| 172 | |
Scott Wood | 6c6f061 | 2012-09-18 18:19:05 -0500 | [diff] [blame] | 173 | while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT)) |
| 174 | ; |
| 175 | |
Prafulla Wadaskar | 6621637 | 2010-10-27 21:58:31 +0530 | [diff] [blame] | 176 | serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier); |
Tom Rini | f28c434 | 2017-05-12 22:33:16 -0400 | [diff] [blame] | 177 | #if defined(CONFIG_ARCH_OMAP2PLUS) |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 178 | serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/ |
wdenk | 21136db | 2003-07-16 21:53:01 +0000 | [diff] [blame] | 179 | #endif |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 180 | serial_out(UART_MCRVAL, &com_port->mcr); |
Marek Vasut | f523c9c | 2016-12-01 02:06:29 +0100 | [diff] [blame] | 181 | serial_out(ns16550_getfcr(com_port), &com_port->fcr); |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 182 | if (baud_divisor != -1) |
| 183 | NS16550_setbrg(com_port, baud_divisor); |
Tom Rini | f28c434 | 2017-05-12 22:33:16 -0400 | [diff] [blame] | 184 | #if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_SOC_DA8XX) |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 185 | /* /16 is proper to hit 115200 with 48MHz */ |
| 186 | serial_out(0, &com_port->mdr1); |
Tom Rini | f28c434 | 2017-05-12 22:33:16 -0400 | [diff] [blame] | 187 | #endif |
Khoronzhuk, Ivan | 8090298 | 2014-07-16 00:59:25 +0300 | [diff] [blame] | 188 | #if defined(CONFIG_SOC_KEYSTONE) |
Vitaly Andrianov | 7bcf4d6 | 2014-04-04 13:16:53 -0400 | [diff] [blame] | 189 | serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC); |
| 190 | #endif |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 191 | } |
| 192 | |
Ron Madrid | dfa028a | 2009-02-18 14:30:44 -0800 | [diff] [blame] | 193 | #ifndef CONFIG_NS16550_MIN_FUNCTIONS |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 194 | void NS16550_reinit(NS16550_t com_port, int baud_divisor) |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 195 | { |
Prafulla Wadaskar | 6621637 | 2010-10-27 21:58:31 +0530 | [diff] [blame] | 196 | serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier); |
Simon Glass | c31ebfe | 2014-09-04 16:27:33 -0600 | [diff] [blame] | 197 | NS16550_setbrg(com_port, 0); |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 198 | serial_out(UART_MCRVAL, &com_port->mcr); |
Marek Vasut | f523c9c | 2016-12-01 02:06:29 +0100 | [diff] [blame] | 199 | serial_out(ns16550_getfcr(com_port), &com_port->fcr); |
Simon Glass | c31ebfe | 2014-09-04 16:27:33 -0600 | [diff] [blame] | 200 | NS16550_setbrg(com_port, baud_divisor); |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 201 | } |
Ron Madrid | dfa028a | 2009-02-18 14:30:44 -0800 | [diff] [blame] | 202 | #endif /* CONFIG_NS16550_MIN_FUNCTIONS */ |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 203 | |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 204 | void NS16550_putc(NS16550_t com_port, char c) |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 205 | { |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 206 | while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0) |
| 207 | ; |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 208 | serial_out(c, &com_port->thr); |
Stefan Roese | 57b9988 | 2010-10-12 09:39:45 +0200 | [diff] [blame] | 209 | |
| 210 | /* |
| 211 | * Call watchdog_reset() upon newline. This is done here in putc |
| 212 | * since the environment code uses a single puts() to print the complete |
| 213 | * environment upon "printenv". So we can't put this watchdog call |
| 214 | * in puts(). |
| 215 | */ |
| 216 | if (c == '\n') |
| 217 | WATCHDOG_RESET(); |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 218 | } |
| 219 | |
Ron Madrid | dfa028a | 2009-02-18 14:30:44 -0800 | [diff] [blame] | 220 | #ifndef CONFIG_NS16550_MIN_FUNCTIONS |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 221 | char NS16550_getc(NS16550_t com_port) |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 222 | { |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 223 | while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) { |
Marek Vasut | 9e1fca9 | 2012-09-15 10:25:19 +0200 | [diff] [blame] | 224 | #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY) |
wdenk | 29e7f5a | 2004-03-12 00:14:09 +0000 | [diff] [blame] | 225 | extern void usbtty_poll(void); |
| 226 | usbtty_poll(); |
| 227 | #endif |
Ladislav Michl | cc29442 | 2010-02-01 23:34:25 +0100 | [diff] [blame] | 228 | WATCHDOG_RESET(); |
wdenk | 29e7f5a | 2004-03-12 00:14:09 +0000 | [diff] [blame] | 229 | } |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 230 | return serial_in(&com_port->rbr); |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 231 | } |
| 232 | |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 233 | int NS16550_tstc(NS16550_t com_port) |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 234 | { |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 235 | return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0; |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 236 | } |
| 237 | |
Ron Madrid | dfa028a | 2009-02-18 14:30:44 -0800 | [diff] [blame] | 238 | #endif /* CONFIG_NS16550_MIN_FUNCTIONS */ |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 239 | |
Simon Glass | 27afb52 | 2015-01-26 18:27:09 -0700 | [diff] [blame] | 240 | #ifdef CONFIG_DEBUG_UART_NS16550 |
| 241 | |
| 242 | #include <debug_uart.h> |
| 243 | |
Simon Glass | 60517d7 | 2015-10-18 19:51:23 -0600 | [diff] [blame] | 244 | static inline void _debug_uart_init(void) |
Simon Glass | 27afb52 | 2015-01-26 18:27:09 -0700 | [diff] [blame] | 245 | { |
| 246 | struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE; |
| 247 | int baud_divisor; |
| 248 | |
| 249 | /* |
| 250 | * We copy the code from above because it is already horribly messy. |
| 251 | * Trying to refactor to nicely remove the duplication doesn't seem |
| 252 | * feasible. The better fix is to move all users of this driver to |
| 253 | * driver model. |
| 254 | */ |
Marek Vasut | 3b164a5 | 2016-05-25 02:13:16 +0200 | [diff] [blame] | 255 | baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK, |
| 256 | CONFIG_BAUDRATE); |
Simon Glass | 9246516 | 2015-06-23 15:39:06 -0600 | [diff] [blame] | 257 | serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER); |
Lokesh Vutla | 771d69c | 2017-04-22 15:57:25 +0530 | [diff] [blame] | 258 | serial_dout(&com_port->mcr, UART_MCRVAL); |
| 259 | serial_dout(&com_port->fcr, UART_FCR_DEFVAL); |
| 260 | |
| 261 | serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL); |
| 262 | serial_dout(&com_port->dll, baud_divisor & 0xff); |
| 263 | serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff); |
| 264 | serial_dout(&com_port->lcr, UART_LCRVAL); |
| 265 | } |
| 266 | |
| 267 | static inline void _debug_uart_putc(int ch) |
| 268 | { |
| 269 | struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE; |
| 270 | |
| 271 | while (!(serial_din(&com_port->lsr) & UART_LSR_THRE)) |
| 272 | ; |
| 273 | serial_dout(&com_port->thr, ch); |
| 274 | } |
| 275 | |
| 276 | DEBUG_UART_FUNCS |
| 277 | |
| 278 | #endif |
| 279 | |
| 280 | #ifdef CONFIG_DEBUG_UART_OMAP |
| 281 | |
| 282 | #include <debug_uart.h> |
| 283 | |
| 284 | static inline void _debug_uart_init(void) |
| 285 | { |
| 286 | struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE; |
| 287 | int baud_divisor; |
| 288 | |
| 289 | baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK, |
| 290 | CONFIG_BAUDRATE); |
| 291 | serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER); |
| 292 | serial_dout(&com_port->mdr1, 0x7); |
Simon Glass | 9246516 | 2015-06-23 15:39:06 -0600 | [diff] [blame] | 293 | serial_dout(&com_port->mcr, UART_MCRVAL); |
Heiko Schocher | 06f108e | 2017-01-18 08:05:49 +0100 | [diff] [blame] | 294 | serial_dout(&com_port->fcr, UART_FCR_DEFVAL); |
Simon Glass | 27afb52 | 2015-01-26 18:27:09 -0700 | [diff] [blame] | 295 | |
Simon Glass | 9246516 | 2015-06-23 15:39:06 -0600 | [diff] [blame] | 296 | serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL); |
| 297 | serial_dout(&com_port->dll, baud_divisor & 0xff); |
| 298 | serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff); |
| 299 | serial_dout(&com_port->lcr, UART_LCRVAL); |
Lokesh Vutla | 771d69c | 2017-04-22 15:57:25 +0530 | [diff] [blame] | 300 | serial_dout(&com_port->mdr1, 0x0); |
Simon Glass | 27afb52 | 2015-01-26 18:27:09 -0700 | [diff] [blame] | 301 | } |
| 302 | |
| 303 | static inline void _debug_uart_putc(int ch) |
| 304 | { |
| 305 | struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE; |
| 306 | |
Simon Glass | 9246516 | 2015-06-23 15:39:06 -0600 | [diff] [blame] | 307 | while (!(serial_din(&com_port->lsr) & UART_LSR_THRE)) |
Simon Glass | 27afb52 | 2015-01-26 18:27:09 -0700 | [diff] [blame] | 308 | ; |
Simon Glass | 9246516 | 2015-06-23 15:39:06 -0600 | [diff] [blame] | 309 | serial_dout(&com_port->thr, ch); |
Simon Glass | 27afb52 | 2015-01-26 18:27:09 -0700 | [diff] [blame] | 310 | } |
| 311 | |
| 312 | DEBUG_UART_FUNCS |
| 313 | |
| 314 | #endif |
| 315 | |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 316 | #ifdef CONFIG_DM_SERIAL |
Stefan Roese | 767b7db | 2017-07-14 17:25:54 +0200 | [diff] [blame] | 317 | |
| 318 | #if CONFIG_IS_ENABLED(SERIAL_IRQ_BUFFER) |
| 319 | |
| 320 | #define BUF_COUNT 256 |
| 321 | |
| 322 | static void rx_fifo_to_buf(struct udevice *dev) |
| 323 | { |
| 324 | struct NS16550 *const com_port = dev_get_priv(dev); |
| 325 | struct ns16550_platdata *plat = dev->platdata; |
| 326 | |
| 327 | /* Read all available chars into buffer */ |
| 328 | while ((serial_in(&com_port->lsr) & UART_LSR_DR)) { |
| 329 | plat->buf[plat->wr_ptr++] = serial_in(&com_port->rbr); |
| 330 | plat->wr_ptr %= BUF_COUNT; |
| 331 | } |
| 332 | } |
| 333 | |
| 334 | static int rx_pending(struct udevice *dev) |
| 335 | { |
| 336 | struct ns16550_platdata *plat = dev->platdata; |
| 337 | |
| 338 | /* |
| 339 | * At startup it may happen, that some already received chars are |
| 340 | * "stuck" in the RX FIFO, even with the interrupt enabled. This |
| 341 | * RX FIFO flushing makes sure, that these chars are read out and |
| 342 | * the RX interrupts works as expected. |
| 343 | */ |
| 344 | rx_fifo_to_buf(dev); |
| 345 | |
| 346 | return plat->rd_ptr != plat->wr_ptr ? 1 : 0; |
| 347 | } |
| 348 | |
| 349 | static int rx_get(struct udevice *dev) |
| 350 | { |
| 351 | struct ns16550_platdata *plat = dev->platdata; |
| 352 | char val; |
| 353 | |
| 354 | val = plat->buf[plat->rd_ptr++]; |
| 355 | plat->rd_ptr %= BUF_COUNT; |
| 356 | |
| 357 | return val; |
| 358 | } |
| 359 | |
| 360 | void ns16550_handle_irq(void *data) |
| 361 | { |
| 362 | struct udevice *dev = (struct udevice *)data; |
| 363 | struct NS16550 *const com_port = dev_get_priv(dev); |
| 364 | |
| 365 | /* Check if interrupt is pending */ |
| 366 | if (serial_in(&com_port->iir) & UART_IIR_NO_INT) |
| 367 | return; |
| 368 | |
| 369 | /* Flush all available characters from the RX FIFO into the RX buffer */ |
| 370 | rx_fifo_to_buf(dev); |
| 371 | } |
| 372 | |
| 373 | #else /* CONFIG_SERIAL_IRQ_BUFFER */ |
| 374 | |
| 375 | static int rx_pending(struct udevice *dev) |
| 376 | { |
| 377 | struct NS16550 *const com_port = dev_get_priv(dev); |
| 378 | |
| 379 | return serial_in(&com_port->lsr) & UART_LSR_DR ? 1 : 0; |
| 380 | } |
| 381 | |
| 382 | static int rx_get(struct udevice *dev) |
| 383 | { |
| 384 | struct NS16550 *const com_port = dev_get_priv(dev); |
| 385 | |
| 386 | return serial_in(&com_port->rbr); |
| 387 | } |
| 388 | |
| 389 | #endif /* CONFIG_SERIAL_IRQ_BUFFER */ |
| 390 | |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 391 | static int ns16550_serial_putc(struct udevice *dev, const char ch) |
| 392 | { |
| 393 | struct NS16550 *const com_port = dev_get_priv(dev); |
| 394 | |
| 395 | if (!(serial_in(&com_port->lsr) & UART_LSR_THRE)) |
| 396 | return -EAGAIN; |
| 397 | serial_out(ch, &com_port->thr); |
| 398 | |
| 399 | /* |
| 400 | * Call watchdog_reset() upon newline. This is done here in putc |
| 401 | * since the environment code uses a single puts() to print the complete |
| 402 | * environment upon "printenv". So we can't put this watchdog call |
| 403 | * in puts(). |
| 404 | */ |
| 405 | if (ch == '\n') |
| 406 | WATCHDOG_RESET(); |
| 407 | |
| 408 | return 0; |
| 409 | } |
| 410 | |
| 411 | static int ns16550_serial_pending(struct udevice *dev, bool input) |
| 412 | { |
| 413 | struct NS16550 *const com_port = dev_get_priv(dev); |
| 414 | |
| 415 | if (input) |
Stefan Roese | 767b7db | 2017-07-14 17:25:54 +0200 | [diff] [blame] | 416 | return rx_pending(dev); |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 417 | else |
| 418 | return serial_in(&com_port->lsr) & UART_LSR_THRE ? 0 : 1; |
| 419 | } |
| 420 | |
| 421 | static int ns16550_serial_getc(struct udevice *dev) |
| 422 | { |
Stefan Roese | 767b7db | 2017-07-14 17:25:54 +0200 | [diff] [blame] | 423 | if (!ns16550_serial_pending(dev, true)) |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 424 | return -EAGAIN; |
| 425 | |
Stefan Roese | 767b7db | 2017-07-14 17:25:54 +0200 | [diff] [blame] | 426 | return rx_get(dev); |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 427 | } |
| 428 | |
| 429 | static int ns16550_serial_setbrg(struct udevice *dev, int baudrate) |
| 430 | { |
| 431 | struct NS16550 *const com_port = dev_get_priv(dev); |
| 432 | struct ns16550_platdata *plat = com_port->plat; |
| 433 | int clock_divisor; |
| 434 | |
| 435 | clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate); |
| 436 | |
| 437 | NS16550_setbrg(com_port, clock_divisor); |
| 438 | |
| 439 | return 0; |
| 440 | } |
| 441 | |
| 442 | int ns16550_serial_probe(struct udevice *dev) |
| 443 | { |
| 444 | struct NS16550 *const com_port = dev_get_priv(dev); |
| 445 | |
Simon Glass | 3bf04f3 | 2014-10-22 21:37:05 -0600 | [diff] [blame] | 446 | com_port->plat = dev_get_platdata(dev); |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 447 | NS16550_init(com_port, -1); |
| 448 | |
Stefan Roese | 767b7db | 2017-07-14 17:25:54 +0200 | [diff] [blame] | 449 | #if CONFIG_IS_ENABLED(SERIAL_IRQ_BUFFER) |
| 450 | if (gd->flags & GD_FLG_RELOC) { |
| 451 | struct ns16550_platdata *plat = dev->platdata; |
| 452 | |
| 453 | /* Allocate the RX buffer */ |
| 454 | plat->buf = malloc(BUF_COUNT); |
| 455 | |
| 456 | /* Install the interrupt handler */ |
| 457 | irq_install_handler(plat->irq, ns16550_handle_irq, dev); |
| 458 | |
| 459 | /* Enable RX interrupts */ |
| 460 | serial_out(UART_IER_RDI, &com_port->ier); |
| 461 | } |
| 462 | #endif |
| 463 | |
| 464 | return 0; |
| 465 | } |
| 466 | |
| 467 | #if CONFIG_IS_ENABLED(SERIAL_PRESENT) && \ |
| 468 | (!defined(CONFIG_TPL_BUILD) || defined(CONFIG_TPL_DM_SERIAL)) |
| 469 | static int ns16550_serial_remove(struct udevice *dev) |
| 470 | { |
| 471 | #if CONFIG_IS_ENABLED(SERIAL_IRQ_BUFFER) |
| 472 | if (gd->flags & GD_FLG_RELOC) { |
| 473 | struct ns16550_platdata *plat = dev->platdata; |
| 474 | |
| 475 | irq_free_handler(plat->irq); |
| 476 | } |
| 477 | #endif |
| 478 | |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 479 | return 0; |
| 480 | } |
Stefan Roese | 767b7db | 2017-07-14 17:25:54 +0200 | [diff] [blame] | 481 | #endif |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 482 | |
Marek Vasut | 1a59eec | 2016-12-01 02:06:30 +0100 | [diff] [blame] | 483 | #if CONFIG_IS_ENABLED(OF_CONTROL) |
| 484 | enum { |
| 485 | PORT_NS16550 = 0, |
Marek Vasut | 92a744f | 2016-12-01 02:06:31 +0100 | [diff] [blame] | 486 | PORT_JZ4780, |
Marek Vasut | 1a59eec | 2016-12-01 02:06:30 +0100 | [diff] [blame] | 487 | }; |
| 488 | #endif |
| 489 | |
Simon Glass | 18798be | 2016-07-04 11:58:23 -0600 | [diff] [blame] | 490 | #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 491 | int ns16550_serial_ofdata_to_platdata(struct udevice *dev) |
| 492 | { |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 493 | struct ns16550_platdata *plat = dev->platdata; |
Marek Vasut | 92a744f | 2016-12-01 02:06:31 +0100 | [diff] [blame] | 494 | const u32 port_type = dev_get_driver_data(dev); |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 495 | fdt_addr_t addr; |
Masahiro Yamada | 09abe2b | 2016-09-26 20:45:27 +0900 | [diff] [blame] | 496 | struct clk clk; |
| 497 | int err; |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 498 | |
Bin Meng | 0203c1c | 2014-12-31 16:05:12 +0800 | [diff] [blame] | 499 | /* try Processor Local Bus device first */ |
Simon Glass | 386dbfb | 2017-06-12 06:21:56 -0600 | [diff] [blame] | 500 | addr = dev_read_addr(dev); |
Simon Glass | f1037ad | 2015-11-29 13:17:54 -0700 | [diff] [blame] | 501 | #if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI) |
Bin Meng | 0203c1c | 2014-12-31 16:05:12 +0800 | [diff] [blame] | 502 | if (addr == FDT_ADDR_T_NONE) { |
| 503 | /* then try pci device */ |
| 504 | struct fdt_pci_addr pci_addr; |
| 505 | u32 bar; |
| 506 | int ret; |
| 507 | |
| 508 | /* we prefer to use a memory-mapped register */ |
Simon Glass | dd79d6e | 2017-01-17 16:52:55 -0700 | [diff] [blame] | 509 | ret = fdtdec_get_pci_addr(gd->fdt_blob, dev_of_offset(dev), |
Bin Meng | 0203c1c | 2014-12-31 16:05:12 +0800 | [diff] [blame] | 510 | FDT_PCI_SPACE_MEM32, "reg", |
| 511 | &pci_addr); |
| 512 | if (ret) { |
| 513 | /* try if there is any i/o-mapped register */ |
| 514 | ret = fdtdec_get_pci_addr(gd->fdt_blob, |
Simon Glass | dd79d6e | 2017-01-17 16:52:55 -0700 | [diff] [blame] | 515 | dev_of_offset(dev), |
Bin Meng | 0203c1c | 2014-12-31 16:05:12 +0800 | [diff] [blame] | 516 | FDT_PCI_SPACE_IO, |
| 517 | "reg", &pci_addr); |
| 518 | if (ret) |
| 519 | return ret; |
| 520 | } |
| 521 | |
Simon Glass | f1037ad | 2015-11-29 13:17:54 -0700 | [diff] [blame] | 522 | ret = fdtdec_get_pci_bar32(dev, &pci_addr, &bar); |
Bin Meng | 0203c1c | 2014-12-31 16:05:12 +0800 | [diff] [blame] | 523 | if (ret) |
| 524 | return ret; |
| 525 | |
| 526 | addr = bar; |
| 527 | } |
| 528 | #endif |
| 529 | |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 530 | if (addr == FDT_ADDR_T_NONE) |
| 531 | return -EINVAL; |
| 532 | |
Paul Burton | c8acc89 | 2016-05-17 07:43:26 +0100 | [diff] [blame] | 533 | #ifdef CONFIG_SYS_NS16550_PORT_MAPPED |
Simon Glass | 2546394 | 2014-10-22 21:37:04 -0600 | [diff] [blame] | 534 | plat->base = addr; |
Paul Burton | c8acc89 | 2016-05-17 07:43:26 +0100 | [diff] [blame] | 535 | #else |
| 536 | plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE); |
| 537 | #endif |
| 538 | |
Philipp Tomsich | e74958e | 2017-06-07 18:46:02 +0200 | [diff] [blame] | 539 | plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0); |
| 540 | plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0); |
Paul Burton | 8aadc56 | 2016-09-08 07:47:29 +0100 | [diff] [blame] | 541 | |
| 542 | err = clk_get_by_index(dev, 0, &clk); |
| 543 | if (!err) { |
| 544 | err = clk_get_rate(&clk); |
| 545 | if (!IS_ERR_VALUE(err)) |
| 546 | plat->clock = err; |
Alexandre Courbot | eaa24e7f | 2016-09-30 17:37:00 +0900 | [diff] [blame] | 547 | } else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) { |
Paul Burton | 8aadc56 | 2016-09-08 07:47:29 +0100 | [diff] [blame] | 548 | debug("ns16550 failed to get clock\n"); |
| 549 | return err; |
| 550 | } |
| 551 | |
| 552 | if (!plat->clock) |
Philipp Tomsich | e74958e | 2017-06-07 18:46:02 +0200 | [diff] [blame] | 553 | plat->clock = dev_read_u32_default(dev, "clock-frequency", |
| 554 | CONFIG_SYS_NS16550_CLK); |
Thomas Chou | 16b2e7e | 2015-11-19 21:48:05 +0800 | [diff] [blame] | 555 | if (!plat->clock) { |
| 556 | debug("ns16550 clock not defined\n"); |
| 557 | return -EINVAL; |
| 558 | } |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 559 | |
Heiko Schocher | 06f108e | 2017-01-18 08:05:49 +0100 | [diff] [blame] | 560 | plat->fcr = UART_FCR_DEFVAL; |
Marek Vasut | 92a744f | 2016-12-01 02:06:31 +0100 | [diff] [blame] | 561 | if (port_type == PORT_JZ4780) |
| 562 | plat->fcr |= UART_FCR_UME; |
Marek Vasut | f523c9c | 2016-12-01 02:06:29 +0100 | [diff] [blame] | 563 | |
Stefan Roese | 767b7db | 2017-07-14 17:25:54 +0200 | [diff] [blame] | 564 | #if CONFIG_IS_ENABLED(SERIAL_IRQ_BUFFER) |
| 565 | plat->irq = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), |
| 566 | "interrupts", 0); |
| 567 | if (!plat->irq) { |
| 568 | debug("ns16550 interrupt not provided\n"); |
| 569 | return -EINVAL; |
| 570 | } |
| 571 | #endif |
| 572 | |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 573 | return 0; |
| 574 | } |
Simon Glass | 3bf04f3 | 2014-10-22 21:37:05 -0600 | [diff] [blame] | 575 | #endif |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 576 | |
| 577 | const struct dm_serial_ops ns16550_serial_ops = { |
| 578 | .putc = ns16550_serial_putc, |
| 579 | .pending = ns16550_serial_pending, |
| 580 | .getc = ns16550_serial_getc, |
| 581 | .setbrg = ns16550_serial_setbrg, |
| 582 | }; |
Thomas Chou | 16b2e7e | 2015-11-19 21:48:05 +0800 | [diff] [blame] | 583 | |
Alexandru Gagniuc | b1ab189 | 2017-03-27 12:54:19 -0700 | [diff] [blame] | 584 | #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) |
Thomas Chou | dad5367 | 2015-12-14 20:45:09 +0800 | [diff] [blame] | 585 | /* |
| 586 | * Please consider existing compatible strings before adding a new |
| 587 | * one to keep this table compact. Or you may add a generic "ns16550" |
| 588 | * compatible string to your dts. |
| 589 | */ |
Thomas Chou | 16b2e7e | 2015-11-19 21:48:05 +0800 | [diff] [blame] | 590 | static const struct udevice_id ns16550_serial_ids[] = { |
Marek Vasut | 1a59eec | 2016-12-01 02:06:30 +0100 | [diff] [blame] | 591 | { .compatible = "ns16550", .data = PORT_NS16550 }, |
| 592 | { .compatible = "ns16550a", .data = PORT_NS16550 }, |
Marek Vasut | 92a744f | 2016-12-01 02:06:31 +0100 | [diff] [blame] | 593 | { .compatible = "ingenic,jz4780-uart", .data = PORT_JZ4780 }, |
Marek Vasut | 1a59eec | 2016-12-01 02:06:30 +0100 | [diff] [blame] | 594 | { .compatible = "nvidia,tegra20-uart", .data = PORT_NS16550 }, |
| 595 | { .compatible = "snps,dw-apb-uart", .data = PORT_NS16550 }, |
| 596 | { .compatible = "ti,omap2-uart", .data = PORT_NS16550 }, |
| 597 | { .compatible = "ti,omap3-uart", .data = PORT_NS16550 }, |
| 598 | { .compatible = "ti,omap4-uart", .data = PORT_NS16550 }, |
| 599 | { .compatible = "ti,am3352-uart", .data = PORT_NS16550 }, |
| 600 | { .compatible = "ti,am4372-uart", .data = PORT_NS16550 }, |
| 601 | { .compatible = "ti,dra742-uart", .data = PORT_NS16550 }, |
Thomas Chou | 16b2e7e | 2015-11-19 21:48:05 +0800 | [diff] [blame] | 602 | {} |
| 603 | }; |
Alexandru Gagniuc | b1ab189 | 2017-03-27 12:54:19 -0700 | [diff] [blame] | 604 | #endif /* OF_CONTROL && !OF_PLATDATA */ |
Thomas Chou | 16b2e7e | 2015-11-19 21:48:05 +0800 | [diff] [blame] | 605 | |
Simon Glass | 9ebf348 | 2015-12-13 21:36:59 -0700 | [diff] [blame] | 606 | #if CONFIG_IS_ENABLED(SERIAL_PRESENT) |
Alexandru Gagniuc | b1ab189 | 2017-03-27 12:54:19 -0700 | [diff] [blame] | 607 | |
| 608 | /* TODO(sjg@chromium.org): Integrate this into a macro like CONFIG_IS_ENABLED */ |
| 609 | #if !defined(CONFIG_TPL_BUILD) || defined(CONFIG_TPL_DM_SERIAL) |
Thomas Chou | 16b2e7e | 2015-11-19 21:48:05 +0800 | [diff] [blame] | 610 | U_BOOT_DRIVER(ns16550_serial) = { |
| 611 | .name = "ns16550_serial", |
| 612 | .id = UCLASS_SERIAL, |
Alexandru Gagniuc | b1ab189 | 2017-03-27 12:54:19 -0700 | [diff] [blame] | 613 | #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) |
Thomas Chou | 16b2e7e | 2015-11-19 21:48:05 +0800 | [diff] [blame] | 614 | .of_match = ns16550_serial_ids, |
| 615 | .ofdata_to_platdata = ns16550_serial_ofdata_to_platdata, |
| 616 | .platdata_auto_alloc_size = sizeof(struct ns16550_platdata), |
| 617 | #endif |
| 618 | .priv_auto_alloc_size = sizeof(struct NS16550), |
| 619 | .probe = ns16550_serial_probe, |
Stefan Roese | 767b7db | 2017-07-14 17:25:54 +0200 | [diff] [blame] | 620 | .remove = ns16550_serial_remove, |
Thomas Chou | 16b2e7e | 2015-11-19 21:48:05 +0800 | [diff] [blame] | 621 | .ops = &ns16550_serial_ops, |
Simon Glass | 6ef533e | 2015-12-04 08:58:38 -0700 | [diff] [blame] | 622 | .flags = DM_FLAG_PRE_RELOC, |
Thomas Chou | 16b2e7e | 2015-11-19 21:48:05 +0800 | [diff] [blame] | 623 | }; |
Simon Glass | 9ebf348 | 2015-12-13 21:36:59 -0700 | [diff] [blame] | 624 | #endif |
Alexandru Gagniuc | b1ab189 | 2017-03-27 12:54:19 -0700 | [diff] [blame] | 625 | #endif /* SERIAL_PRESENT */ |
| 626 | |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 627 | #endif /* CONFIG_DM_SERIAL */ |