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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
TsiChung Liewf6afe722007-06-18 13:50:13 -05002/*
3 * IO header file
4 *
Alison Wange14f7322012-03-26 21:49:02 +00005 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
TsiChung Liewf6afe722007-06-18 13:50:13 -05006 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
TsiChung Liewf6afe722007-06-18 13:50:13 -05007 */
Haiying Wangc123a382007-02-21 16:52:31 +01008
TsiChungLiewf4e17e12007-07-05 22:42:23 -05009#ifndef __ASM_M68K_IO_H__
TsiChung Liewf6afe722007-06-18 13:50:13 -050010#define __ASM_M68K_IO_H__
11
12#include <asm/byteorder.h>
13
TsiChung Liewd48cd882009-07-22 16:32:39 +000014#ifndef _IO_BASE
15#define _IO_BASE 0
16#endif
17
TsiChungLiew9b052632008-01-14 17:35:44 -060018#define __raw_readb(addr) (*(volatile u8 *)(addr))
19#define __raw_readw(addr) (*(volatile u16 *)(addr))
20#define __raw_readl(addr) (*(volatile u32 *)(addr))
Haavard Skinnemoen47f60852007-12-13 12:56:31 +010021
TsiChungLiew9b052632008-01-14 17:35:44 -060022#define __raw_writeb(b,addr) ((*(volatile u8 *) (addr)) = (b))
23#define __raw_writew(w,addr) ((*(volatile u16 *) (addr)) = (w))
24#define __raw_writel(l,addr) ((*(volatile u32 *) (addr)) = (l))
Haavard Skinnemoen47f60852007-12-13 12:56:31 +010025
TsiChungLiewaedd3d72007-08-15 15:39:17 -050026#define readb(addr) in_8((volatile u8 *)(addr))
27#define writeb(b,addr) out_8((volatile u8 *)(addr), (b))
TsiChung Liewf6afe722007-06-18 13:50:13 -050028#if !defined(__BIG_ENDIAN)
TsiChungLiewaedd3d72007-08-15 15:39:17 -050029#define readw(addr) (*(volatile u16 *) (addr))
30#define readl(addr) (*(volatile u32 *) (addr))
31#define writew(b,addr) ((*(volatile u16 *) (addr)) = (b))
32#define writel(b,addr) ((*(volatile u32 *) (addr)) = (b))
TsiChung Liewf6afe722007-06-18 13:50:13 -050033#else
Chao Fudaad3612013-12-13 13:39:07 +080034#define readw(addr) in_be16((volatile u16 *)(addr))
35#define readl(addr) in_be32((volatile u32 *)(addr))
36#define writew(b,addr) out_be16((volatile u16 *)(addr),(b))
37#define writel(b,addr) out_be32((volatile u32 *)(addr),(b))
TsiChung Liewf6afe722007-06-18 13:50:13 -050038#endif
39
40/*
41 * The insw/outsw/insl/outsl macros don't do byte-swapping.
42 * They are only used in practice for transferring buffers which
43 * are arrays of bytes, and byte-swapping is not appropriate in
44 * that case. - paulus
45 */
TsiChungLiewaedd3d72007-08-15 15:39:17 -050046#define insb(port, buf, ns) _insb((u8 *)((port)+_IO_BASE), (buf), (ns))
47#define outsb(port, buf, ns) _outsb((u8 *)((port)+_IO_BASE), (buf), (ns))
48#define insw(port, buf, ns) _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
49#define outsw(port, buf, ns) _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
50#define insl(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
51#define outsl(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
TsiChung Liewf6afe722007-06-18 13:50:13 -050052
TsiChungLiewaedd3d72007-08-15 15:39:17 -050053#define inb(port) in_8((u8 *)((port)+_IO_BASE))
54#define outb(val, port) out_8((u8 *)((port)+_IO_BASE), (val))
TsiChung Liewf6afe722007-06-18 13:50:13 -050055#if !defined(__BIG_ENDIAN)
TsiChungLiewaedd3d72007-08-15 15:39:17 -050056#define inw(port) in_be16((u16 *)((port)+_IO_BASE))
57#define outw(val, port) out_be16((u16 *)((port)+_IO_BASE), (val))
58#define inl(port) in_be32((u32 *)((port)+_IO_BASE))
59#define outl(val, port) out_be32((u32 *)((port)+_IO_BASE), (val))
TsiChung Liewf6afe722007-06-18 13:50:13 -050060#else
TsiChungLiewaedd3d72007-08-15 15:39:17 -050061#define inw(port) in_le16((u16 *)((port)+_IO_BASE))
62#define outw(val, port) out_le16((u16 *)((port)+_IO_BASE), (val))
63#define inl(port) in_le32((u32 *)((port)+_IO_BASE))
64#define outl(val, port) out_le32((u32 *)((port)+_IO_BASE), (val))
TsiChung Liewf6afe722007-06-18 13:50:13 -050065#endif
66
Jason Jin39a12ea2011-04-18 17:54:04 +080067#define mb() __asm__ __volatile__ ("" : : : "memory")
68
Måns Rullgård4dc39702015-11-06 12:44:01 +000069static inline void _insb(volatile u8 * port, void *buf, int ns)
TsiChung Liewf6afe722007-06-18 13:50:13 -050070{
71 u8 *data = (u8 *) buf;
72 while (ns--)
73 *data++ = *port;
74}
75
Måns Rullgård4dc39702015-11-06 12:44:01 +000076static inline void _outsb(volatile u8 * port, const void *buf, int ns)
TsiChung Liewf6afe722007-06-18 13:50:13 -050077{
78 u8 *data = (u8 *) buf;
79 while (ns--)
80 *port = *data++;
81}
82
Måns Rullgård4dc39702015-11-06 12:44:01 +000083static inline void _insw(volatile u16 * port, void *buf, int ns)
TsiChung Liewf6afe722007-06-18 13:50:13 -050084{
85 u16 *data = (u16 *) buf;
86 while (ns--)
87 *data++ = __sw16(*port);
88}
89
Måns Rullgård4dc39702015-11-06 12:44:01 +000090static inline void _outsw(volatile u16 * port, const void *buf, int ns)
TsiChung Liewf6afe722007-06-18 13:50:13 -050091{
92 u16 *data = (u16 *) buf;
93 while (ns--) {
94 *port = __sw16(*data);
95 data++;
96 }
97}
98
Måns Rullgård4dc39702015-11-06 12:44:01 +000099static inline void _insl(volatile u32 * port, void *buf, int nl)
TsiChung Liewf6afe722007-06-18 13:50:13 -0500100{
101 u32 *data = (u32 *) buf;
102 while (nl--)
103 *data++ = __sw32(*port);
104}
105
Måns Rullgård4dc39702015-11-06 12:44:01 +0000106static inline void _outsl(volatile u32 * port, const void *buf, int nl)
TsiChung Liewf6afe722007-06-18 13:50:13 -0500107{
108 u32 *data = (u32 *) buf;
109 while (nl--) {
110 *port = __sw32(*data);
111 data++;
112 }
113}
114
Måns Rullgård4dc39702015-11-06 12:44:01 +0000115static inline void _insw_ns(volatile u16 * port, void *buf, int ns)
TsiChung Liewf6afe722007-06-18 13:50:13 -0500116{
117 u16 *data = (u16 *) buf;
118 while (ns--)
119 *data++ = *port;
120}
121
Måns Rullgård4dc39702015-11-06 12:44:01 +0000122static inline void _outsw_ns(volatile u16 * port, const void *buf, int ns)
TsiChung Liewf6afe722007-06-18 13:50:13 -0500123{
124 u16 *data = (u16 *) buf;
125 while (ns--) {
126 *port = *data++;
127 }
128}
129
Måns Rullgård4dc39702015-11-06 12:44:01 +0000130static inline void _insl_ns(volatile u32 * port, void *buf, int nl)
TsiChung Liewf6afe722007-06-18 13:50:13 -0500131{
132 u32 *data = (u32 *) buf;
133 while (nl--)
134 *data++ = *port;
135}
136
Måns Rullgård4dc39702015-11-06 12:44:01 +0000137static inline void _outsl_ns(volatile u32 * port, const void *buf, int nl)
TsiChung Liewf6afe722007-06-18 13:50:13 -0500138{
139 u32 *data = (u32 *) buf;
140 while (nl--) {
141 *port = *data;
142 data++;
143 }
144}
145
146/*
147 * The *_ns versions below don't do byte-swapping.
148 * Neither do the standard versions now, these are just here
149 * for older code.
150 */
TsiChungLiewaedd3d72007-08-15 15:39:17 -0500151#define insw_ns(port, buf, ns) _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
152#define outsw_ns(port, buf, ns) _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
153#define insl_ns(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
154#define outsl_ns(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
TsiChung Liewf6afe722007-06-18 13:50:13 -0500155
156#define IO_SPACE_LIMIT ~0
157
158/*
159 * 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
160 */
Måns Rullgård4dc39702015-11-06 12:44:01 +0000161static inline int in_8(volatile u8 * addr)
TsiChung Liewf6afe722007-06-18 13:50:13 -0500162{
163 return (int)*addr;
164}
165
Måns Rullgård4dc39702015-11-06 12:44:01 +0000166static inline void out_8(volatile u8 * addr, int val)
TsiChung Liewf6afe722007-06-18 13:50:13 -0500167{
168 *addr = (u8) val;
169}
170
Måns Rullgård4dc39702015-11-06 12:44:01 +0000171static inline int in_le16(volatile u16 * addr)
TsiChung Liewf6afe722007-06-18 13:50:13 -0500172{
173 return __sw16(*addr);
174}
175
Måns Rullgård4dc39702015-11-06 12:44:01 +0000176static inline int in_be16(volatile u16 * addr)
TsiChung Liewf6afe722007-06-18 13:50:13 -0500177{
178 return (*addr & 0xFFFF);
179}
180
Måns Rullgård4dc39702015-11-06 12:44:01 +0000181static inline void out_le16(volatile u16 * addr, int val)
TsiChung Liewf6afe722007-06-18 13:50:13 -0500182{
183 *addr = __sw16(val);
184}
185
Måns Rullgård4dc39702015-11-06 12:44:01 +0000186static inline void out_be16(volatile u16 * addr, int val)
TsiChung Liewf6afe722007-06-18 13:50:13 -0500187{
188 *addr = (u16) val;
189}
190
Måns Rullgård4dc39702015-11-06 12:44:01 +0000191static inline unsigned in_le32(volatile u32 * addr)
TsiChung Liewf6afe722007-06-18 13:50:13 -0500192{
193 return __sw32(*addr);
194}
195
Måns Rullgård4dc39702015-11-06 12:44:01 +0000196static inline unsigned in_be32(volatile u32 * addr)
TsiChung Liewf6afe722007-06-18 13:50:13 -0500197{
198 return (*addr);
199}
200
Måns Rullgård4dc39702015-11-06 12:44:01 +0000201static inline void out_le32(volatile unsigned *addr, int val)
TsiChung Liewf6afe722007-06-18 13:50:13 -0500202{
203 *addr = __sw32(val);
204}
205
Måns Rullgård4dc39702015-11-06 12:44:01 +0000206static inline void out_be32(volatile unsigned *addr, int val)
Haiying Wangc123a382007-02-21 16:52:31 +0100207{
TsiChung Liewf6afe722007-06-18 13:50:13 -0500208 *addr = val;
Haiying Wangc123a382007-02-21 16:52:31 +0100209}
210
Alison Wange14f7322012-03-26 21:49:02 +0000211/* Clear and set bits in one shot. These macros can be used to clear and
212 * set multiple bits in a register using a single call. These macros can
213 * also be used to set a multiple-bit bit pattern using a mask, by
214 * specifying the mask in the 'clear' parameter and the new bit pattern
215 * in the 'set' parameter.
216 */
217
218#define clrbits(type, addr, clear) \
219 out_##type((addr), in_##type(addr) & ~(clear))
220
221#define setbits(type, addr, set) \
222 out_##type((addr), in_##type(addr) | (set))
223
224#define clrsetbits(type, addr, clear, set) \
225 out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
226
227#define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
228#define setbits_be32(addr, set) setbits(be32, addr, set)
229#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
230
231#define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
232#define setbits_le32(addr, set) setbits(le32, addr, set)
233#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
234
235#define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
236#define setbits_be16(addr, set) setbits(be16, addr, set)
237#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
238
239#define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
240#define setbits_le16(addr, set) setbits(le16, addr, set)
241#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
242
243#define clrbits_8(addr, clear) clrbits(8, addr, clear)
244#define setbits_8(addr, set) setbits(8, addr, set)
245#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
246
TsiChungLiew54d7b342007-08-05 03:43:30 -0500247static inline void sync(void)
248{
249 /* This sync function is for PowerPC or other architecture instruction
250 * ColdFire does not have this instruction. Dummy function, added for
251 * compatibility (CFI driver)
252 */
253}
Haavard Skinnemoenf9855512007-12-13 12:56:33 +0100254
Paul Burtonc1b91e92017-09-14 15:05:04 -0700255#include <asm-generic/io.h>
Kumar Gala9364a672008-12-13 17:20:27 -0600256
TsiChung Liewf6afe722007-06-18 13:50:13 -0500257#endif /* __ASM_M68K_IO_H__ */