blob: db368a7b8c23b001a47555c201bdcd83f675f33a [file] [log] [blame]
Heiko Stuebnerfc367852019-07-16 22:18:21 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2019 Rockchip Electronics Co., Ltd
4 */
5
6#include <common.h>
7#include <debug_uart.h>
8#include <dm.h>
Simon Glass97589732020-05-10 11:40:02 -06009#include <init.h>
Heiko Stuebnerfc367852019-07-16 22:18:21 +020010#include <ram.h>
11#include <spl.h>
Heiko Stuebnerfc367852019-07-16 22:18:21 +020012#include <asm/io.h>
13#include <asm/arch-rockchip/bootrom.h>
14#include <asm/arch-rockchip/sdram_px30.h>
15
16#define TIMER_LOAD_COUNT0 0x00
17#define TIMER_LOAD_COUNT1 0x04
18#define TIMER_CUR_VALUE0 0x08
19#define TIMER_CUR_VALUE1 0x0c
20#define TIMER_CONTROL_REG 0x10
21
22#define TIMER_EN 0x1
23#define TIMER_FMODE (0 << 1)
24#define TIMER_RMODE (1 << 1)
25
26void secure_timer_init(void)
27{
28 writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
29 writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_LOAD_COUNT0);
30 writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_LOAD_COUNT1);
31 writel(TIMER_EN | TIMER_FMODE,
32 CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
33}
34
35void board_init_f(ulong dummy)
36{
37 int ret;
38
Lukasz Czechowski6460a702024-04-17 13:21:28 +020039#if defined(CONFIG_DEBUG_UART) && defined(CONFIG_TPL_SERIAL)
Heiko Stuebnerfc367852019-07-16 22:18:21 +020040 debug_uart_init();
41 /*
42 * Debug UART can be used from here if required:
43 *
44 * debug_uart_init();
45 * printch('a');
46 * printhex8(0x1234);
47 * printascii("string");
48 */
Lukasz Czechowski6460a702024-04-17 13:21:28 +020049#if CONFIG_TPL_BANNER_PRINT
Heiko Stuebnerfc367852019-07-16 22:18:21 +020050 printascii("U-Boot TPL board init\n");
51#endif
Lukasz Czechowski6460a702024-04-17 13:21:28 +020052#endif
Heiko Stuebnerfc367852019-07-16 22:18:21 +020053
54 secure_timer_init();
55 ret = sdram_init();
56 if (ret)
57 printascii("sdram_init failed\n");
58
59 /* return to maskrom */
60 back_to_bootrom(BROM_BOOT_NEXTSTAGE);
61}