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Tom Rini53633a82024-02-29 12:33:36 -05001# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mips/cpus.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MIPS CPUs
8
9maintainers:
10 - Thomas Bogendoerfer <tsbogend@alpha.franken.de>
11 - 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
12
13description: |
14 The device tree allows to describe the layout of CPUs in a system through
15 the "cpus" node, which in turn contains a number of subnodes (ie "cpu")
16 defining properties for every CPU.
17
18properties:
19 compatible:
20 enum:
21 - brcm,bmips3300
22 - brcm,bmips4350
23 - brcm,bmips4380
24 - brcm,bmips5000
25 - brcm,bmips5200
Tom Rini6bb92fc2024-05-20 09:54:58 -060026 - img,i6500
Tom Rini53633a82024-02-29 12:33:36 -050027 - ingenic,xburst-fpu1.0-mxu1.1
28 - ingenic,xburst-fpu2.0-mxu2.0
Tom Rini6bb92fc2024-05-20 09:54:58 -060029 - ingenic,xburst-mxu1.0
Tom Rini53633a82024-02-29 12:33:36 -050030 - ingenic,xburst2-fpu2.1-mxu2.1-smt
31 - loongson,gs264
32 - mips,m14Kc
Tom Rini6bb92fc2024-05-20 09:54:58 -060033 - mips,mips1004Kc
Tom Rini53633a82024-02-29 12:33:36 -050034 - mips,mips24KEc
Tom Rini6bb92fc2024-05-20 09:54:58 -060035 - mips,mips24Kc
36 - mips,mips4KEc
37 - mips,mips4Kc
Tom Rini53633a82024-02-29 12:33:36 -050038 - mips,mips74Kc
Tom Rini53633a82024-02-29 12:33:36 -050039 - mti,interaptiv
Tom Rini53633a82024-02-29 12:33:36 -050040 - mti,mips14KEc
41 - mti,mips14Kc
Tom Rini6bb92fc2024-05-20 09:54:58 -060042 - mti,mips24KEc
Tom Rini53633a82024-02-29 12:33:36 -050043
44 reg:
45 maxItems: 1
46
47 clocks:
48 maxItems: 1
49
50 device_type: true
51
52allOf:
53 - if:
54 properties:
55 compatible:
56 contains:
57 enum:
58 - ingenic,xburst-mxu1.0
59 - ingenic,xburst-fpu1.0-mxu1.1
60 - ingenic,xburst-fpu2.0-mxu2.0
61 - ingenic,xburst2-fpu2.1-mxu2.1-smt
62 then:
63 required:
64 - device_type
65 - clocks
66
67required:
68 - compatible
69 - reg
70
71additionalProperties: false
72
73examples:
74 - |
75 cpus {
76 #size-cells = <0>;
77 #address-cells = <1>;
78
79 cpu@0 {
80 compatible = "mips,mips1004Kc";
81 device_type = "cpu";
82 reg = <0>;
83 };
84
85 cpu@1 {
86 compatible = "mips,mips1004Kc";
87 device_type = "cpu";
88 reg = <1>;
89 };
90 };
91
92 - |
93 // Example 2 (Ingenic CPU)
94 #include <dt-bindings/clock/ingenic,jz4780-cgu.h>
95
96 cpus {
97 #address-cells = <1>;
98 #size-cells = <0>;
99
100 cpu@0 {
101 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
102 device_type = "cpu";
103 reg = <0>;
104
105 clocks = <&cgu JZ4780_CLK_CPU>;
106 };
107
108 cpu@1 {
109 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
110 device_type = "cpu";
111 reg = <1>;
112
113 clocks = <&cgu JZ4780_CLK_CORE1>;
114 };
115 };
116...