blob: f6909d05a043544ed80a6712e85f83b06521b12b [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Mingkai Hueee86ff2015-10-26 19:47:52 +08002/*
3 * Copyright (C) 2015 Freescale Semiconductor
Yangbo Lubb32e682021-06-03 10:51:19 +08004 * Copyright 2019-2021 NXP
Mingkai Hueee86ff2015-10-26 19:47:52 +08005 */
6
7#ifndef __LS1043A_COMMON_H
8#define __LS1043A_COMMON_H
9
Sumit Garg2a2857b2017-03-30 09:52:38 +053010/* SPL build */
11#ifdef CONFIG_SPL_BUILD
12#define SPL_NO_FMAN
13#define SPL_NO_DSPI
14#define SPL_NO_PCIE
15#define SPL_NO_ENV
16#define SPL_NO_MISC
17#define SPL_NO_USB
18#define SPL_NO_SATA
19#define SPL_NO_QE
20#define SPL_NO_EEPROM
21#endif
22#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT))
23#define SPL_NO_MMC
24#endif
Yangbo Lu83c4ece2017-09-15 09:51:58 +080025#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT_QSPI))
Sumit Garg2a2857b2017-03-30 09:52:38 +053026#define SPL_NO_IFC
27#endif
28
Mingkai Hueee86ff2015-10-26 19:47:52 +080029#define CONFIG_REMAKE_ELF
Mingkai Hueee86ff2015-10-26 19:47:52 +080030
Bharat Bhushan882b6322017-03-22 12:06:27 +053031#include <asm/arch/stream_id_lsch2.h>
Mingkai Hueee86ff2015-10-26 19:47:52 +080032#include <asm/arch/config.h>
Mingkai Hueee86ff2015-10-26 19:47:52 +080033
34/* Link Definitions */
Rajesh Bhagatb89aed42018-11-05 18:02:44 +000035#ifdef CONFIG_TFABOOT
36#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
37#else
Mingkai Hueee86ff2015-10-26 19:47:52 +080038#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
Rajesh Bhagatb89aed42018-11-05 18:02:44 +000039#endif
Mingkai Hueee86ff2015-10-26 19:47:52 +080040
Mingkai Hueee86ff2015-10-26 19:47:52 +080041#define CONFIG_VERY_BIG_RAM
42#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
43#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
44#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
Shaohui Xief6c83952015-11-23 15:23:48 +080045#define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL
Mingkai Hueee86ff2015-10-26 19:47:52 +080046
Michael Wallef056e0f2020-06-01 21:53:26 +020047#define CPU_RELEASE_ADDR secondary_boot_addr
Hou Zhiqiangc7098fa2015-10-26 19:47:57 +080048
Mingkai Hueee86ff2015-10-26 19:47:52 +080049/* Generic Timer Definitions */
50#define COUNTER_FREQUENCY 25000000 /* 25MHz */
51
Mingkai Hueee86ff2015-10-26 19:47:52 +080052/* Serial Port */
Mingkai Hueee86ff2015-10-26 19:47:52 +080053#define CONFIG_SYS_NS16550_SERIAL
54#define CONFIG_SYS_NS16550_REG_SIZE 1
Hou Zhiqiang3f91cda2017-01-10 16:44:15 +080055#define CONFIG_SYS_NS16550_CLK (get_serial_clock())
Mingkai Hueee86ff2015-10-26 19:47:52 +080056
Mingkai Hueee86ff2015-10-26 19:47:52 +080057#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
58
Gong Qianyuf671f6c2015-10-26 19:47:56 +080059/* SD boot SPL */
60#ifdef CONFIG_SD_BOOT
Gong Qianyuf671f6c2015-10-26 19:47:56 +080061
Ruchika Guptad6b89202017-04-17 18:07:17 +053062#define CONFIG_SPL_MAX_SIZE 0x17000
Gong Qianyuf671f6c2015-10-26 19:47:56 +080063#define CONFIG_SPL_STACK 0x1001e000
64#define CONFIG_SPL_PAD_TO 0x1d000
65
York Sunf7eed6b2017-09-28 08:42:16 -070066#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
67 CONFIG_SPL_BSS_MAX_SIZE)
Gong Qianyuf671f6c2015-10-26 19:47:56 +080068#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
York Sunf7eed6b2017-09-28 08:42:16 -070069#define CONFIG_SPL_BSS_START_ADDR 0x8f000000
Gong Qianyuf671f6c2015-10-26 19:47:56 +080070#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
Ruchika Guptad6b89202017-04-17 18:07:17 +053071
Udit Agarwal22ec2382019-11-07 16:11:32 +000072#ifdef CONFIG_NXP_ESBC
Ruchika Guptad6b89202017-04-17 18:07:17 +053073#define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
74/*
75 * HDR would be appended at end of image and copied to DDR along
76 * with U-Boot image. Here u-boot max. size is 512K. So if binary
77 * size increases then increase this size in case of secure boot as
78 * it uses raw u-boot image instead of fit image.
79 */
80#define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
81#else
82#define CONFIG_SYS_MONITOR_LEN 0x100000
Udit Agarwal22ec2382019-11-07 16:11:32 +000083#endif /* ifdef CONFIG_NXP_ESBC */
Gong Qianyuf671f6c2015-10-26 19:47:56 +080084#endif
85
Gong Qianyu8168a0f2015-10-26 19:47:53 +080086/* NAND SPL */
87#ifdef CONFIG_NAND_BOOT
88#define CONFIG_SPL_PBL_PAD
Gong Qianyu8168a0f2015-10-26 19:47:53 +080089#define CONFIG_SPL_MAX_SIZE 0x1a000
90#define CONFIG_SPL_STACK 0x1001d000
91#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
92#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
93#define CONFIG_SYS_SPL_MALLOC_START 0x80200000
94#define CONFIG_SPL_BSS_START_ADDR 0x80100000
95#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
96#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
Ruchika Guptaba688752017-04-17 18:07:18 +053097
Udit Agarwal22ec2382019-11-07 16:11:32 +000098#ifdef CONFIG_NXP_ESBC
Ruchika Guptaba688752017-04-17 18:07:18 +053099#define CONFIG_U_BOOT_HDR_SIZE (16 << 10)
Udit Agarwal22ec2382019-11-07 16:11:32 +0000100#endif /* ifdef CONFIG_NXP_ESBC */
Ruchika Guptaba688752017-04-17 18:07:18 +0530101
102#ifdef CONFIG_U_BOOT_HDR_SIZE
103/*
104 * HDR would be appended at end of image and copied to DDR along
105 * with U-Boot image. Here u-boot max. size is 512K. So if binary
106 * size increases then increase this size in case of secure boot as
107 * it uses raw u-boot image instead of fit image.
108 */
109#define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
110#else
111#define CONFIG_SYS_MONITOR_LEN 0x100000
112#endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */
113
Gong Qianyu8168a0f2015-10-26 19:47:53 +0800114#endif
115
Biwen Li46de4002021-02-05 19:01:56 +0800116/* GPIO */
117#ifdef CONFIG_DM_GPIO
118#ifndef CONFIG_MPC8XXX_GPIO
119#define CONFIG_MPC8XXX_GPIO
120#endif
121#endif
122
Mingkai Hueee86ff2015-10-26 19:47:52 +0800123/* IFC */
Sumit Garg2a2857b2017-03-30 09:52:38 +0530124#ifndef SPL_NO_IFC
Rajesh Bhagatb89aed42018-11-05 18:02:44 +0000125#if defined(CONFIG_TFABOOT) || \
126 (!defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI))
Mingkai Hueee86ff2015-10-26 19:47:52 +0800127#define CONFIG_FSL_IFC
128/*
129 * CONFIG_SYS_FLASH_BASE has the final address (core view)
130 * CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view)
131 * CONFIG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address
132 * CONFIG_SYS_TEXT_BASE is linked to 0x60000000 for booting
133 */
134#define CONFIG_SYS_FLASH_BASE 0x60000000
135#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE
136#define CONFIG_SYS_FLASH_BASE_PHYS_EARLY 0x00000000
137
Masahiro Yamada8cea9b52017-02-11 22:43:54 +0900138#ifdef CONFIG_MTD_NOR_FLASH
Mingkai Hueee86ff2015-10-26 19:47:52 +0800139#define CONFIG_SYS_FLASH_QUIET_TEST
140#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
141#endif
Gong Qianyu760df892016-01-25 15:16:06 +0800142#endif
Sumit Garg2a2857b2017-03-30 09:52:38 +0530143#endif
Mingkai Hueee86ff2015-10-26 19:47:52 +0800144
145/* I2C */
Mingkai Hueee86ff2015-10-26 19:47:52 +0800146
147/* PCIe */
Sumit Garg2a2857b2017-03-30 09:52:38 +0530148#ifndef SPL_NO_PCIE
Mingkai Hueee86ff2015-10-26 19:47:52 +0800149#define CONFIG_PCIE1 /* PCIE controller 1 */
150#define CONFIG_PCIE2 /* PCIE controller 2 */
151#define CONFIG_PCIE3 /* PCIE controller 3 */
Mingkai Hueee86ff2015-10-26 19:47:52 +0800152
Mingkai Hueee86ff2015-10-26 19:47:52 +0800153#ifdef CONFIG_PCI
Mingkai Hueee86ff2015-10-26 19:47:52 +0800154#define CONFIG_PCI_SCAN_SHOW
Mingkai Hueee86ff2015-10-26 19:47:52 +0800155#endif
Sumit Garg2a2857b2017-03-30 09:52:38 +0530156#endif
Mingkai Hueee86ff2015-10-26 19:47:52 +0800157
Gong Qianyu51c18dc2016-01-25 15:16:05 +0800158/* DSPI */
Sumit Garg2a2857b2017-03-30 09:52:38 +0530159#ifndef SPL_NO_DSPI
Gong Qianyu51c18dc2016-01-25 15:16:05 +0800160#ifdef CONFIG_FSL_DSPI
Gong Qianyu51c18dc2016-01-25 15:16:05 +0800161#define CONFIG_SPI_FLASH_STMICRO /* cs0 */
162#define CONFIG_SPI_FLASH_SST /* cs1 */
163#define CONFIG_SPI_FLASH_EON /* cs2 */
Gong Qianyu760df892016-01-25 15:16:06 +0800164#endif
Sumit Garg2a2857b2017-03-30 09:52:38 +0530165#endif
Gong Qianyu51c18dc2016-01-25 15:16:05 +0800166
Shaohui Xie04643262015-10-26 19:47:54 +0800167/* FMan ucode */
Sumit Garg2a2857b2017-03-30 09:52:38 +0530168#ifndef SPL_NO_FMAN
Shaohui Xie04643262015-10-26 19:47:54 +0800169#define CONFIG_SYS_DPAA_FMAN
170#ifdef CONFIG_SYS_DPAA_FMAN
171#define CONFIG_SYS_FM_MURAM_SIZE 0x60000
172
Rajesh Bhagatb89aed42018-11-05 18:02:44 +0000173#ifdef CONFIG_TFABOOT
174#define CONFIG_SYS_FMAN_FW_ADDR 0x900000
175#define CONFIG_SYS_QE_FW_ADDR 0x940000
176
Rajesh Bhagatb89aed42018-11-05 18:02:44 +0000177
178#else
Qianyu Gongc80a20c2016-04-01 17:52:52 +0800179#ifdef CONFIG_NAND_BOOT
Alison Wangb5b8bfa2017-05-16 10:45:58 +0800180/* Store Fman ucode at offeset 0x900000(72 blocks). */
Alison Wangb5b8bfa2017-05-16 10:45:58 +0800181#define CONFIG_SYS_FMAN_FW_ADDR (72 * CONFIG_SYS_NAND_BLOCK_SIZE)
Qianyu Gong9a207ca2016-04-01 17:52:53 +0800182#elif defined(CONFIG_SD_BOOT)
183/*
184 * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
185 * about 1MB (2040 blocks), Env is stored after the image, and the env size is
Alison Wangb5b8bfa2017-05-16 10:45:58 +0800186 * 0x2000 (16 blocks), 8 + 2040 + 16 = 2064, enlarge it to 18432(0x4800).
Qianyu Gong9a207ca2016-04-01 17:52:53 +0800187 */
Alison Wangb5b8bfa2017-05-16 10:45:58 +0800188#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x4800)
Zhao Qiangff124382018-12-05 17:01:42 +0800189#define CONFIG_SYS_QE_FW_ADDR (512 * 0x4A00)
Qianyu Gong9a207ca2016-04-01 17:52:53 +0800190#elif defined(CONFIG_QSPI_BOOT)
Alison Wangb5b8bfa2017-05-16 10:45:58 +0800191#define CONFIG_SYS_FMAN_FW_ADDR 0x40900000
Gong Qianyu760df892016-01-25 15:16:06 +0800192#else
Shaohui Xie04643262015-10-26 19:47:54 +0800193/* FMan fireware Pre-load address */
Alison Wangb5b8bfa2017-05-16 10:45:58 +0800194#define CONFIG_SYS_FMAN_FW_ADDR 0x60900000
Zhao Qiang82cd8c62017-05-25 09:47:40 +0800195#define CONFIG_SYS_QE_FW_ADDR 0x60940000
Gong Qianyu760df892016-01-25 15:16:06 +0800196#endif
Rajesh Bhagatb89aed42018-11-05 18:02:44 +0000197#endif
Shaohui Xie04643262015-10-26 19:47:54 +0800198#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
199#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
200#endif
Sumit Garg2a2857b2017-03-30 09:52:38 +0530201#endif
Shaohui Xie04643262015-10-26 19:47:54 +0800202
Mingkai Hueee86ff2015-10-26 19:47:52 +0800203/* Miscellaneous configurable options */
Mingkai Hueee86ff2015-10-26 19:47:52 +0800204
205#define CONFIG_HWCONFIG
206#define HWCONFIG_BUFFER_SIZE 128
207
Sumit Garg2a2857b2017-03-30 09:52:38 +0530208#ifndef SPL_NO_MISC
Shengzhou Liu9d662542017-06-08 15:59:48 +0800209#ifndef CONFIG_SPL_BUILD
210#define BOOT_TARGET_DEVICES(func) \
211 func(MMC, mmc, 0) \
Mian Yousaf Kaukab6519df72019-01-29 16:38:40 +0100212 func(USB, usb, 0) \
213 func(DHCP, dhcp, na)
Shengzhou Liu9d662542017-06-08 15:59:48 +0800214#include <config_distro_bootcmd.h>
215#endif
216
Mingkai Hueee86ff2015-10-26 19:47:52 +0800217/* Initial environment variables */
218#define CONFIG_EXTRA_ENV_SETTINGS \
219 "hwconfig=fsl_ddr:bank_intlv=auto\0" \
Mingkai Hueee86ff2015-10-26 19:47:52 +0800220 "fdt_high=0xffffffffffffffff\0" \
221 "initrd_high=0xffffffffffffffff\0" \
Shengzhou Liu9d662542017-06-08 15:59:48 +0800222 "fdt_addr=0x64f00000\0" \
Vinitha Pillai-B572230c6e10a2017-11-22 10:38:35 +0530223 "kernel_addr=0x61000000\0" \
Shengzhou Liu9d662542017-06-08 15:59:48 +0800224 "scriptaddr=0x80000000\0" \
Sumit Garg9cbcc4d2017-06-05 23:51:51 +0530225 "scripthdraddr=0x80080000\0" \
Shengzhou Liu9d662542017-06-08 15:59:48 +0800226 "fdtheader_addr_r=0x80100000\0" \
227 "kernelheader_addr_r=0x80200000\0" \
228 "kernel_addr_r=0x81000000\0" \
Wen He335b3862018-11-20 16:55:25 +0800229 "kernel_start=0x1000000\0" \
230 "kernelheader_start=0x800000\0" \
Shengzhou Liu9d662542017-06-08 15:59:48 +0800231 "fdt_addr_r=0x90000000\0" \
232 "load_addr=0xa0000000\0" \
Manish Tomar8d388012020-11-05 14:08:55 +0530233 "kernelheader_addr=0x60600000\0" \
Qianyu Gong2758edf2016-03-15 16:35:57 +0800234 "kernel_size=0x2800000\0" \
Vinitha Pillai-B572230c6e10a2017-11-22 10:38:35 +0530235 "kernelheader_size=0x40000\0" \
Shengzhou Liu42862752017-11-09 17:57:55 +0800236 "kernel_addr_sd=0x8000\0" \
237 "kernel_size_sd=0x14000\0" \
Manish Tomar8d388012020-11-05 14:08:55 +0530238 "kernelhdr_addr_sd=0x3000\0" \
Vinitha Pillai-B572230c6e10a2017-11-22 10:38:35 +0530239 "kernelhdr_size_sd=0x10\0" \
Shengzhou Liu9d662542017-06-08 15:59:48 +0800240 "console=ttyS0,115200\0" \
York Sunf7eed6b2017-09-28 08:42:16 -0700241 "boot_os=y\0" \
Tom Rini5ad8e112017-10-22 17:55:07 -0400242 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
Shengzhou Liu9d662542017-06-08 15:59:48 +0800243 BOOTENV \
244 "boot_scripts=ls1043ardb_boot.scr\0" \
Sumit Garg9cbcc4d2017-06-05 23:51:51 +0530245 "boot_script_hdr=hdr_ls1043ardb_bs.out\0" \
Shengzhou Liu9d662542017-06-08 15:59:48 +0800246 "scan_dev_for_boot_part=" \
247 "part list ${devtype} ${devnum} devplist; " \
248 "env exists devplist || setenv devplist 1; " \
249 "for distro_bootpart in ${devplist}; do " \
250 "if fstype ${devtype} " \
251 "${devnum}:${distro_bootpart} " \
252 "bootfstype; then " \
253 "run scan_dev_for_boot; " \
254 "fi; " \
255 "done\0" \
Sumit Garg9cbcc4d2017-06-05 23:51:51 +0530256 "boot_a_script=" \
257 "load ${devtype} ${devnum}:${distro_bootpart} " \
258 "${scriptaddr} ${prefix}${script}; " \
259 "env exists secureboot && load ${devtype} " \
260 "${devnum}:${distro_bootpart} " \
Vinitha V Pillai25355ec2019-04-23 05:52:17 +0000261 "${scripthdraddr} ${prefix}${boot_script_hdr}; " \
262 "env exists secureboot " \
Sumit Garg9cbcc4d2017-06-05 23:51:51 +0530263 "&& esbc_validate ${scripthdraddr};" \
264 "source ${scriptaddr}\0" \
Shengzhou Liu9d662542017-06-08 15:59:48 +0800265 "qspi_bootcmd=echo Trying load from qspi..;" \
266 "sf probe && sf read $load_addr " \
Wen Hecabe55c2019-11-14 15:08:15 +0800267 "$kernel_start $kernel_size; env exists secureboot " \
268 "&& sf read $kernelheader_addr_r $kernelheader_start " \
Vinitha Pillai-B572230c6e10a2017-11-22 10:38:35 +0530269 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
270 "bootm $load_addr#$board\0" \
Shengzhou Liu9d662542017-06-08 15:59:48 +0800271 "nor_bootcmd=echo Trying load from nor..;" \
272 "cp.b $kernel_addr $load_addr " \
Vinitha Pillai-B572230c6e10a2017-11-22 10:38:35 +0530273 "$kernel_size; env exists secureboot " \
274 "&& cp.b $kernelheader_addr $kernelheader_addr_r " \
275 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
276 "bootm $load_addr#$board\0" \
Wen He335b3862018-11-20 16:55:25 +0800277 "nand_bootcmd=echo Trying load from NAND..;" \
278 "nand info; nand read $load_addr " \
279 "$kernel_start $kernel_size; env exists secureboot " \
280 "&& nand read $kernelheader_addr_r $kernelheader_start " \
281 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
282 "bootm $load_addr#$board\0" \
Shengzhou Liu42862752017-11-09 17:57:55 +0800283 "sd_bootcmd=echo Trying load from SD ..;" \
284 "mmcinfo; mmc read $load_addr " \
285 "$kernel_addr_sd $kernel_size_sd && " \
Vinitha Pillai-B572230c6e10a2017-11-22 10:38:35 +0530286 "env exists secureboot && mmc read $kernelheader_addr_r " \
287 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
288 " && esbc_validate ${kernelheader_addr_r};" \
Shengzhou Liu42862752017-11-09 17:57:55 +0800289 "bootm $load_addr#$board\0"
290
Wenbin Song1738ca72016-07-21 18:55:16 +0800291
Shengzhou Liu9d662542017-06-08 15:59:48 +0800292#undef CONFIG_BOOTCOMMAND
Rajesh Bhagatb89aed42018-11-05 18:02:44 +0000293#ifdef CONFIG_TFABOOT
294#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \
295 "env exists secureboot && esbc_halt;"
296#define SD_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; " \
297 "env exists secureboot && esbc_halt;"
298#define IFC_NOR_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; " \
299 "env exists secureboot && esbc_halt;"
Pankit Garg69210722018-12-27 04:37:53 +0000300#define IFC_NAND_BOOTCOMMAND "run distro_bootcmd; run nand_bootcmd; " \
301 "env exists secureboot && esbc_halt;"
Rajesh Bhagatb89aed42018-11-05 18:02:44 +0000302#else
Qianyu Gongbaacecb2016-04-25 16:53:53 +0800303#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
Vinitha Pillai-B572230c6e10a2017-11-22 10:38:35 +0530304#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \
305 "env exists secureboot && esbc_halt;"
Shengzhou Liu42862752017-11-09 17:57:55 +0800306#elif defined(CONFIG_SD_BOOT)
Vinitha Pillai-B572230c6e10a2017-11-22 10:38:35 +0530307#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; " \
308 "env exists secureboot && esbc_halt;"
Qianyu Gongbaacecb2016-04-25 16:53:53 +0800309#else
Vinitha Pillai-B572230c6e10a2017-11-22 10:38:35 +0530310#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; " \
311 "env exists secureboot && esbc_halt;"
Qianyu Gongbaacecb2016-04-25 16:53:53 +0800312#endif
Sumit Garg2a2857b2017-03-30 09:52:38 +0530313#endif
Rajesh Bhagatb89aed42018-11-05 18:02:44 +0000314#endif
Mingkai Hueee86ff2015-10-26 19:47:52 +0800315
316/* Monitor Command Prompt */
317#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
Sumit Garg2a2857b2017-03-30 09:52:38 +0530318
Mingkai Hueee86ff2015-10-26 19:47:52 +0800319#define CONFIG_SYS_MAXARGS 64 /* max command args */
320
321#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
322
Simon Glass89e0a3a2017-05-17 08:23:10 -0600323#include <asm/arch/soc.h>
324
Mingkai Hueee86ff2015-10-26 19:47:52 +0800325#endif /* __LS1043A_COMMON_H */