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git01.mediatek.com / filogic / uboot / 62ddaa2ea72b8af2a4a4088502b04449d8eab37d / . / board / BuR / common / bur_common.h
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Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
Hannes Petermaierfb003662014-02-07 08:07:36 +0100[diff] [blame]2/*
3 * bur_comon.h
4 *
5 * common board information header for B&R boards
6 *
Hannes Schmelzer7935f032015-05-28 15:41:12 +0200[diff] [blame]7 * Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at>
Hannes Petermaierfb003662014-02-07 08:07:36 +0100[diff] [blame]8 * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
Hannes Petermaierfb003662014-02-07 08:07:36 +0100[diff] [blame]9 */
10
11#ifndef _BUR_COMMON_H_
12#define _BUR_COMMON_H_
13
Dario Binacchi90184bc2020-02-22 14:05:49 +0100[diff] [blame]14#if !CONFIG_IS_ENABLED(DM_VIDEO)
Hannes Petermaier69d0d7d2015-02-03 13:22:26 +0100[diff] [blame]15#include <../../../drivers/video/am335x-fb.h>
16
17int load_lcdtiming(struct am335x_lcdpanel *panel);
Dario Binacchi90184bc2020-02-22 14:05:49 +0100[diff] [blame]18#endif
19
Hannes Petermaier69d0d7d2015-02-03 13:22:26 +0100[diff] [blame]20void br_summaryscreen(void);
Hannes Schmelzer717ee362019-01-31 09:24:45 +0100[diff] [blame]21void pmicsetup(u32 mpupll, unsigned int bus);
Hannes Petermaierfb003662014-02-07 08:07:36 +0100[diff] [blame]22void enable_uart0_pin_mux(void);
Hannes Petermaier2e68d2b2015-03-19 10:43:15 +0100[diff] [blame]23void enable_i2c_pin_mux(void);
Hannes Petermaierfb003662014-02-07 08:07:36 +0100[diff] [blame]24void enable_board_pin_mux(void);
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +0900[diff] [blame]25int board_eth_init(struct bd_info *bis);
Hannes Petermaierfb003662014-02-07 08:07:36 +0100[diff] [blame]26
Hannes Schmelzer6cd12ce2019-04-10 14:13:13 +0200[diff] [blame]27int brdefaultip_setup(int bus, int chip);
28
Hannes Petermaierfb003662014-02-07 08:07:36 +0100[diff] [blame]29#endif