| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| Chin Liang See | 1922dad | 2013-08-07 10:08:03 -0500 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2013 Altera Corporation <www.altera.com> |
| Chin Liang See | 1922dad | 2013-08-07 10:08:03 -0500 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <asm/io.h> |
| Marek Vasut | b10a607 | 2015-08-24 11:51:46 +0200 | [diff] [blame] | 9 | #include <asm/arch/reset_manager.h> |
| Chin Liang See | 1922dad | 2013-08-07 10:08:03 -0500 | [diff] [blame] | 10 | |
| Chin Liang See | 1922dad | 2013-08-07 10:08:03 -0500 | [diff] [blame] | 11 | static const struct socfpga_reset_manager *reset_manager_base = |
| 12 | (void *)SOCFPGA_RSTMGR_ADDRESS; |
| Marek Vasut | 49edbd4 | 2015-07-09 04:27:28 +0200 | [diff] [blame] | 13 | |
| 14 | /* |
| Chin Liang See | 1922dad | 2013-08-07 10:08:03 -0500 | [diff] [blame] | 15 | * Write the reset manager register to cause reset |
| 16 | */ |
| 17 | void reset_cpu(ulong addr) |
| 18 | { |
| 19 | /* request a warm reset */ |
| Ley Foon Tan | dd5d12d | 2017-04-26 02:44:34 +0800 | [diff] [blame] | 20 | writel(1 << RSTMGR_CTRL_SWWARMRSTREQ_LSB, |
| 21 | &reset_manager_base->ctrl); |
| Chin Liang See | 1922dad | 2013-08-07 10:08:03 -0500 | [diff] [blame] | 22 | /* |
| 23 | * infinite loop here as watchdog will trigger and reset |
| 24 | * the processor |
| 25 | */ |
| 26 | while (1) |
| 27 | ; |
| 28 | } |