blob: e320c011aef52b411ea0aa03db80aa3bb181a5c2 [file] [log] [blame]
Chin Liang See1922dad2013-08-07 10:08:03 -05001/*
2 * Copyright (C) 2013 Altera Corporation <www.altera.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7
8#include <common.h>
9#include <asm/io.h>
10#include <asm/arch/reset_manager.h>
11
12DECLARE_GLOBAL_DATA_PTR;
13
14static const struct socfpga_reset_manager *reset_manager_base =
15 (void *)SOCFPGA_RSTMGR_ADDRESS;
16
17/*
18 * Write the reset manager register to cause reset
19 */
20void reset_cpu(ulong addr)
21{
22 /* request a warm reset */
23 writel((1 << RSTMGR_CTRL_SWWARMRSTREQ_LSB),
24 &reset_manager_base->ctrl);
25 /*
26 * infinite loop here as watchdog will trigger and reset
27 * the processor
28 */
29 while (1)
30 ;
31}
32
33/*
34 * Release peripherals from reset based on handoff
35 */
36void reset_deassert_peripherals_handoff(void)
37{
38 writel(0, &reset_manager_base->per_mod_reset);
39}