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Wolfgang Denk4646d2a2006-05-30 15:56:48 +02001/*
2 * (C) Copyright 2006
3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <command.h>
26#include <malloc.h>
27#include <asm/arch/ixp425.h>
28
29DECLARE_GLOBAL_DATA_PTR;
30
Wolfgang Denk4646d2a2006-05-30 15:56:48 +020031/* predefine these here for FPGA programming (before including fpga.c) */
32#define SET_FPGA(data) *IXP425_GPIO_GPOUTR = (data)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020033#define FPGA_DONE_STATE (*IXP425_GPIO_GPINR & CONFIG_SYS_FPGA_DONE)
34#define FPGA_INIT_STATE (*IXP425_GPIO_GPINR & CONFIG_SYS_FPGA_INIT)
Wolfgang Denk4646d2a2006-05-30 15:56:48 +020035#define OLD_VAL old_val
36
37static unsigned long old_val = 0;
38
39/*
40 * include common fpga code (for prodrive boards)
41 */
42#include "../common/fpga.c"
43
44/*
45 * Miscelaneous platform dependent initialisations
46 */
Wolfgang Denk4646d2a2006-05-30 15:56:48 +020047int board_init(void)
48{
49 /* arch number of PDNB3 */
50 gd->bd->bi_arch_number = MACH_TYPE_PDNB3;
51
52 /* adress of boot parameters */
53 gd->bd->bi_boot_params = 0x00000100;
54
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020055 GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_FPGA_RESET);
56 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_FPGA_RESET);
Wolfgang Denk4646d2a2006-05-30 15:56:48 +020057
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020058 GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_SYS_RUNNING);
59 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_SYS_RUNNING);
Wolfgang Denk4646d2a2006-05-30 15:56:48 +020060
61 /*
62 * Setup GPIO's for FPGA programming
63 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020064 GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_PRG);
65 GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_CLK);
66 GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_DATA);
67 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PRG);
68 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_CLK);
69 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_DATA);
70 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_INIT);
71 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_DONE);
Wolfgang Denk4646d2a2006-05-30 15:56:48 +020072
73 /*
74 * Setup GPIO's for interrupts
75 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020076 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTA);
77 GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTA);
78 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTB);
79 GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTB);
80 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_RESTORE_INT);
81 GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_RESTORE_INT);
82 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_RESTART_INT);
83 GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_RESTART_INT);
Wolfgang Denk4646d2a2006-05-30 15:56:48 +020084
85 /*
86 * Setup GPIO's for 33MHz clock output
87 */
88 *IXP425_GPIO_GPCLKR = 0x01FF0000;
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020089 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_CLK_33M);
Wolfgang Denk4646d2a2006-05-30 15:56:48 +020090
91 /*
92 * Setup other chip select's
93 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020094 *IXP425_EXP_CS1 = CONFIG_SYS_EXP_CS1;
Wolfgang Denk4646d2a2006-05-30 15:56:48 +020095
96 return 0;
97}
98
99/*
100 * Check Board Identity
101 */
102int checkboard(void)
103{
Wolfgang Denk5c1cfee2011-05-04 10:32:28 +0000104 char buf[64];
105 int i = getenv_f("serial#", buf, sizeof(buf));
Wolfgang Denk4646d2a2006-05-30 15:56:48 +0200106
107 puts("Board: PDNB3");
108
Wolfgang Denk5c1cfee2011-05-04 10:32:28 +0000109 if (i > 0) {
Wolfgang Denk4646d2a2006-05-30 15:56:48 +0200110 puts(", serial# ");
Wolfgang Denk5c1cfee2011-05-04 10:32:28 +0000111 puts(buf);
Wolfgang Denk4646d2a2006-05-30 15:56:48 +0200112 }
113 putc('\n');
114
115 return (0);
116}
117
118int dram_init(void)
119{
120 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
121 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
122
123 return (0);
124}
125
126int do_fpga_boot(unsigned char *fpgadata)
127{
128 unsigned char *dst;
129 int status;
130 int index;
131 int i;
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200132 ulong len = CONFIG_SYS_MALLOC_LEN;
Wolfgang Denk4646d2a2006-05-30 15:56:48 +0200133
134 /*
135 * Setup GPIO's for FPGA programming
136 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200137 GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_PRG);
138 GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_CLK);
139 GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_DATA);
Wolfgang Denk4646d2a2006-05-30 15:56:48 +0200140
141 /*
142 * Save value so no readback is required upon programming
143 */
144 old_val = *IXP425_GPIO_GPOUTR;
145
146 /*
147 * First try to decompress fpga image (gzip compressed?)
148 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200149 dst = malloc(CONFIG_SYS_FPGA_MAX_SIZE);
150 if (gunzip(dst, CONFIG_SYS_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
Wolfgang Denk4646d2a2006-05-30 15:56:48 +0200151 printf("Error: Image has to be gzipp'ed!\n");
152 return -1;
153 }
154
155 status = fpga_boot(dst, len);
156 if (status != 0) {
157 printf("\nFPGA: Booting failed ");
158 switch (status) {
159 case ERROR_FPGA_PRG_INIT_LOW:
160 printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
161 break;
162 case ERROR_FPGA_PRG_INIT_HIGH:
163 printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
164 break;
165 case ERROR_FPGA_PRG_DONE:
166 printf("(Timeout: DONE not high after programming FPGA)\n ");
167 break;
168 }
169
170 /* display infos on fpgaimage */
171 index = 15;
172 for (i=0; i<4; i++) {
173 len = dst[index];
174 printf("FPGA: %s\n", &(dst[index+1]));
175 index += len+3;
176 }
177 putc ('\n');
178 /* delayed reboot */
179 for (i=5; i>0; i--) {
180 printf("Rebooting in %2d seconds \r",i);
181 for (index=0;index<1000;index++)
182 udelay(1000);
183 }
184 putc('\n');
185 do_reset(NULL, 0, 0, NULL);
186 }
187
188 puts("FPGA: ");
189
190 /* display infos on fpgaimage */
191 index = 15;
192 for (i=0; i<4; i++) {
193 len = dst[index];
194 printf("%s ", &(dst[index+1]));
195 index += len+3;
196 }
197 putc('\n');
198
199 free(dst);
200
201 /*
202 * Reset FPGA
203 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200204 GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_FPGA_RESET);
Wolfgang Denk4646d2a2006-05-30 15:56:48 +0200205 udelay(10);
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200206 GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_FPGA_RESET);
Wolfgang Denk4646d2a2006-05-30 15:56:48 +0200207
208 return (0);
209}
210
Wolfgang Denk6262d0212010-06-28 22:00:46 +0200211int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
Wolfgang Denk4646d2a2006-05-30 15:56:48 +0200212{
213 ulong addr;
214
Wolfgang Denk3b683112010-07-17 01:06:04 +0200215 if (argc < 2)
216 return cmd_usage(cmdtp);
Wolfgang Denk4646d2a2006-05-30 15:56:48 +0200217
218 addr = simple_strtoul(argv[1], NULL, 16);
219
220 return do_fpga_boot((unsigned char *)addr);
221}
222
223U_BOOT_CMD(
224 fpga, 2, 0, do_fpga,
Peter Tyserdfb72b82009-01-27 18:03:12 -0600225 "boot FPGA",
Wolfgang Denkc54781c2009-05-24 17:06:54 +0200226 "address size\n - boot FPGA with gzipped image at <address>"
Wolfgang Denk4646d2a2006-05-30 15:56:48 +0200227);
228
Jon Loeliger145318c2007-07-09 18:38:39 -0500229#if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI)
Wolfgang Denk4646d2a2006-05-30 15:56:48 +0200230extern struct pci_controller hose;
231extern void pci_ixp_init(struct pci_controller * hose);
232
233void pci_init_board(void)
234{
235 extern void pci_ixp_init (struct pci_controller *hose);
236
237 pci_ixp_init(&hose);
238}
239#endif