Wolfgang Denk | 4646d2a | 2006-05-30 15:56:48 +0200 | [diff] [blame^] | 1 | /* |
| 2 | * (C) Copyright 2006 |
| 3 | * Stefan Roese, DENX Software Engineering, sr@denx.de. |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | #include <common.h> |
| 25 | #include <command.h> |
| 26 | #include <malloc.h> |
| 27 | #include <asm/arch/ixp425.h> |
| 28 | |
| 29 | DECLARE_GLOBAL_DATA_PTR; |
| 30 | |
| 31 | /* Prototypes */ |
| 32 | int gunzip(void *, int, unsigned char *, unsigned long *); |
| 33 | int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); |
| 34 | |
| 35 | /* predefine these here for FPGA programming (before including fpga.c) */ |
| 36 | #define SET_FPGA(data) *IXP425_GPIO_GPOUTR = (data) |
| 37 | #define FPGA_DONE_STATE (*IXP425_GPIO_GPINR & CFG_FPGA_DONE) |
| 38 | #define FPGA_INIT_STATE (*IXP425_GPIO_GPINR & CFG_FPGA_INIT) |
| 39 | #define OLD_VAL old_val |
| 40 | |
| 41 | static unsigned long old_val = 0; |
| 42 | |
| 43 | /* |
| 44 | * include common fpga code (for prodrive boards) |
| 45 | */ |
| 46 | #include "../common/fpga.c" |
| 47 | |
| 48 | /* |
| 49 | * Miscelaneous platform dependent initialisations |
| 50 | */ |
| 51 | int board_post_init(void) |
| 52 | { |
| 53 | return (0); |
| 54 | } |
| 55 | |
| 56 | int board_init(void) |
| 57 | { |
| 58 | /* arch number of PDNB3 */ |
| 59 | gd->bd->bi_arch_number = MACH_TYPE_PDNB3; |
| 60 | |
| 61 | /* adress of boot parameters */ |
| 62 | gd->bd->bi_boot_params = 0x00000100; |
| 63 | |
| 64 | GPIO_OUTPUT_SET(CFG_GPIO_FPGA_RESET); |
| 65 | GPIO_OUTPUT_ENABLE(CFG_GPIO_FPGA_RESET); |
| 66 | |
| 67 | GPIO_OUTPUT_SET(CFG_GPIO_SYS_RUNNING); |
| 68 | GPIO_OUTPUT_ENABLE(CFG_GPIO_SYS_RUNNING); |
| 69 | |
| 70 | /* |
| 71 | * Setup GPIO's for FPGA programming |
| 72 | */ |
| 73 | GPIO_OUTPUT_CLEAR(CFG_GPIO_PRG); |
| 74 | GPIO_OUTPUT_CLEAR(CFG_GPIO_CLK); |
| 75 | GPIO_OUTPUT_CLEAR(CFG_GPIO_DATA); |
| 76 | GPIO_OUTPUT_ENABLE(CFG_GPIO_PRG); |
| 77 | GPIO_OUTPUT_ENABLE(CFG_GPIO_CLK); |
| 78 | GPIO_OUTPUT_ENABLE(CFG_GPIO_DATA); |
| 79 | GPIO_OUTPUT_DISABLE(CFG_GPIO_INIT); |
| 80 | GPIO_OUTPUT_DISABLE(CFG_GPIO_DONE); |
| 81 | |
| 82 | /* |
| 83 | * Setup GPIO's for interrupts |
| 84 | */ |
| 85 | GPIO_OUTPUT_DISABLE(CFG_GPIO_PCI_INTA); |
| 86 | GPIO_INT_ACT_LOW_SET(CFG_GPIO_PCI_INTA); |
| 87 | GPIO_OUTPUT_DISABLE(CFG_GPIO_PCI_INTB); |
| 88 | GPIO_INT_ACT_LOW_SET(CFG_GPIO_PCI_INTB); |
| 89 | GPIO_OUTPUT_DISABLE(CFG_GPIO_RESTORE_INT); |
| 90 | GPIO_INT_ACT_LOW_SET(CFG_GPIO_RESTORE_INT); |
| 91 | GPIO_OUTPUT_DISABLE(CFG_GPIO_RESTART_INT); |
| 92 | GPIO_INT_ACT_LOW_SET(CFG_GPIO_RESTART_INT); |
| 93 | |
| 94 | /* |
| 95 | * Setup GPIO's for 33MHz clock output |
| 96 | */ |
| 97 | *IXP425_GPIO_GPCLKR = 0x01FF0000; |
| 98 | GPIO_OUTPUT_ENABLE(CFG_GPIO_CLK_33M); |
| 99 | |
| 100 | /* |
| 101 | * Setup other chip select's |
| 102 | */ |
| 103 | *IXP425_EXP_CS1 = CFG_EXP_CS1; |
| 104 | |
| 105 | return 0; |
| 106 | } |
| 107 | |
| 108 | /* |
| 109 | * Check Board Identity |
| 110 | */ |
| 111 | int checkboard(void) |
| 112 | { |
| 113 | char *s = getenv("serial#"); |
| 114 | |
| 115 | puts("Board: PDNB3"); |
| 116 | |
| 117 | if (s != NULL) { |
| 118 | puts(", serial# "); |
| 119 | puts(s); |
| 120 | } |
| 121 | putc('\n'); |
| 122 | |
| 123 | return (0); |
| 124 | } |
| 125 | |
| 126 | int dram_init(void) |
| 127 | { |
| 128 | gd->bd->bi_dram[0].start = PHYS_SDRAM_1; |
| 129 | gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; |
| 130 | |
| 131 | return (0); |
| 132 | } |
| 133 | |
| 134 | int do_fpga_boot(unsigned char *fpgadata) |
| 135 | { |
| 136 | unsigned char *dst; |
| 137 | int status; |
| 138 | int index; |
| 139 | int i; |
| 140 | ulong len = CFG_MALLOC_LEN; |
| 141 | |
| 142 | /* |
| 143 | * Setup GPIO's for FPGA programming |
| 144 | */ |
| 145 | GPIO_OUTPUT_CLEAR(CFG_GPIO_PRG); |
| 146 | GPIO_OUTPUT_CLEAR(CFG_GPIO_CLK); |
| 147 | GPIO_OUTPUT_CLEAR(CFG_GPIO_DATA); |
| 148 | |
| 149 | /* |
| 150 | * Save value so no readback is required upon programming |
| 151 | */ |
| 152 | old_val = *IXP425_GPIO_GPOUTR; |
| 153 | |
| 154 | /* |
| 155 | * First try to decompress fpga image (gzip compressed?) |
| 156 | */ |
| 157 | dst = malloc(CFG_FPGA_MAX_SIZE); |
| 158 | if (gunzip(dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) { |
| 159 | printf("Error: Image has to be gzipp'ed!\n"); |
| 160 | return -1; |
| 161 | } |
| 162 | |
| 163 | status = fpga_boot(dst, len); |
| 164 | if (status != 0) { |
| 165 | printf("\nFPGA: Booting failed "); |
| 166 | switch (status) { |
| 167 | case ERROR_FPGA_PRG_INIT_LOW: |
| 168 | printf("(Timeout: INIT not low after asserting PROGRAM*)\n "); |
| 169 | break; |
| 170 | case ERROR_FPGA_PRG_INIT_HIGH: |
| 171 | printf("(Timeout: INIT not high after deasserting PROGRAM*)\n "); |
| 172 | break; |
| 173 | case ERROR_FPGA_PRG_DONE: |
| 174 | printf("(Timeout: DONE not high after programming FPGA)\n "); |
| 175 | break; |
| 176 | } |
| 177 | |
| 178 | /* display infos on fpgaimage */ |
| 179 | index = 15; |
| 180 | for (i=0; i<4; i++) { |
| 181 | len = dst[index]; |
| 182 | printf("FPGA: %s\n", &(dst[index+1])); |
| 183 | index += len+3; |
| 184 | } |
| 185 | putc ('\n'); |
| 186 | /* delayed reboot */ |
| 187 | for (i=5; i>0; i--) { |
| 188 | printf("Rebooting in %2d seconds \r",i); |
| 189 | for (index=0;index<1000;index++) |
| 190 | udelay(1000); |
| 191 | } |
| 192 | putc('\n'); |
| 193 | do_reset(NULL, 0, 0, NULL); |
| 194 | } |
| 195 | |
| 196 | puts("FPGA: "); |
| 197 | |
| 198 | /* display infos on fpgaimage */ |
| 199 | index = 15; |
| 200 | for (i=0; i<4; i++) { |
| 201 | len = dst[index]; |
| 202 | printf("%s ", &(dst[index+1])); |
| 203 | index += len+3; |
| 204 | } |
| 205 | putc('\n'); |
| 206 | |
| 207 | free(dst); |
| 208 | |
| 209 | /* |
| 210 | * Reset FPGA |
| 211 | */ |
| 212 | GPIO_OUTPUT_CLEAR(CFG_GPIO_FPGA_RESET); |
| 213 | udelay(10); |
| 214 | GPIO_OUTPUT_SET(CFG_GPIO_FPGA_RESET); |
| 215 | |
| 216 | return (0); |
| 217 | } |
| 218 | |
| 219 | int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
| 220 | { |
| 221 | ulong addr; |
| 222 | |
| 223 | if (argc < 2) { |
| 224 | printf ("Usage:\n%s\n", cmdtp->usage); |
| 225 | return 1; |
| 226 | } |
| 227 | |
| 228 | addr = simple_strtoul(argv[1], NULL, 16); |
| 229 | |
| 230 | return do_fpga_boot((unsigned char *)addr); |
| 231 | } |
| 232 | |
| 233 | U_BOOT_CMD( |
| 234 | fpga, 2, 0, do_fpga, |
| 235 | "fpga - boot FPGA\n", |
| 236 | "address size\n - boot FPGA with gzipped image at <address>\n" |
| 237 | ); |
| 238 | |
| 239 | #if (CONFIG_COMMANDS & CFG_CMD_PCI) || defined(CONFIG_PCI) |
| 240 | extern struct pci_controller hose; |
| 241 | extern void pci_ixp_init(struct pci_controller * hose); |
| 242 | |
| 243 | void pci_init_board(void) |
| 244 | { |
| 245 | extern void pci_ixp_init (struct pci_controller *hose); |
| 246 | |
| 247 | pci_ixp_init(&hose); |
| 248 | } |
| 249 | #endif |