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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Andy Yan2d982da2017-06-01 18:00:55 +08002/*
3 * (C) Copyright 2016 Rockchip Electronics Co., Ltd
Andy Yan2d982da2017-06-01 18:00:55 +08004 */
5#ifndef __CONFIG_RV1108_COMMON_H
6#define __CONFIG_RV1108_COMMON_H
7
Kever Yang9fbe17c2019-03-28 11:01:23 +08008#include <asm/arch-rockchip/hardware.h>
Andy Yan2d982da2017-06-01 18:00:55 +08009#include "rockchip-common.h"
10
Kever Yangaf376322019-07-22 19:59:09 +080011#define CONFIG_IRAM_BASE 0x10080000
12
Tom Rini6a5dccc2022-11-16 13:10:41 -050013#define CFG_SYS_TIMER_RATE (24 * 1000 * 1000)
Andy Yan2d982da2017-06-01 18:00:55 +080014/* TIMER1,initialized by ddr initialize code */
Tom Rini6a5dccc2022-11-16 13:10:41 -050015#define CFG_SYS_TIMER_BASE 0x10350020
16#define CFG_SYS_TIMER_COUNTER (CFG_SYS_TIMER_BASE + 8)
Andy Yan2d982da2017-06-01 18:00:55 +080017
Tom Rinibb4dd962022-11-16 13:10:37 -050018#define CFG_SYS_SDRAM_BASE 0x60000000
Andy Yan2d982da2017-06-01 18:00:55 +080019
William Wub8408c42017-08-09 11:36:27 +080020/* rockchip ohci host driver */
Otavio Salvadord49cf012018-11-30 11:34:17 -020021
Otavio Salvadord49cf012018-11-30 11:34:17 -020022#define ENV_MEM_LAYOUT_SETTINGS \
23 "scriptaddr=0x60000000\0" \
24 "fdt_addr_r=0x61f00000\0" \
25 "kernel_addr_r=0x62000000\0" \
26 "ramdisk_addr_r=0x64000000\0"
27
28#include <config_distro_bootcmd.h>
29#define CONFIG_EXTRA_ENV_SETTINGS \
30 ENV_MEM_LAYOUT_SETTINGS \
31 "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
32 "partitions=" PARTS_DEFAULT \
33 BOOTENV
Tom Rini1e57cbb2022-06-10 22:59:38 -040034
Otavio Salvadord49cf012018-11-30 11:34:17 -020035#endif