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Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +01001/*
2 * (C) Copyright 2007-2008
Stelian Pop5ee0c7f2011-11-01 00:00:39 +01003 * Stelian Pop <stelian@popies.net>
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +01004 * Lead Tech Design <www.leadtechdesign.com>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#include <common.h>
Asen Dimov2be3b312011-07-26 01:23:39 +000026#include <asm/io.h>
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +010027#include <asm/arch/at91_common.h>
28#include <asm/arch/at91_pmc.h>
29#include <asm/arch/gpio.h>
Asen Dimov2be3b312011-07-26 01:23:39 +000030
31/*
32 * if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all
33 * peripheral pins. Good to have if hardware is soldered optionally
34 * or in case of SPI no slave is selected. Avoid lines to float
35 * needlessly. Use a short local PUP define.
36 *
37 * Due to errata "TXD floats when CTS is inactive" pullups are always
38 * on for TXD pins.
39 */
40#ifdef CONFIG_AT91_GPIO_PULLUP
41# define PUP CONFIG_AT91_GPIO_PULLUP
42#else
43# define PUP 0
44#endif
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +010045
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020046void at91_serial0_hw_init(void)
47{
Asen Dimov2be3b312011-07-26 01:23:39 +000048 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010049
Jens Scharsigb49d15c2010-02-03 22:46:46 +010050 at91_set_a_periph(AT91_PIO_PORTC, 8, 1); /* TXD0 */
51 at91_set_a_periph(AT91_PIO_PORTC, 9, 0); /* RXD0 */
Asen Dimov2be3b312011-07-26 01:23:39 +000052 writel(1 << ATMEL_ID_USART0, &pmc->pcer);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020053}
54
55void at91_serial1_hw_init(void)
56{
Asen Dimov2be3b312011-07-26 01:23:39 +000057 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010058
Jens Scharsigb49d15c2010-02-03 22:46:46 +010059 at91_set_a_periph(AT91_PIO_PORTC, 12, 1); /* TXD1 */
60 at91_set_a_periph(AT91_PIO_PORTC, 13, 0); /* RXD1 */
Asen Dimov2be3b312011-07-26 01:23:39 +000061 writel(1 << ATMEL_ID_USART1, &pmc->pcer);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020062}
63
64void at91_serial2_hw_init(void)
65{
Asen Dimov2be3b312011-07-26 01:23:39 +000066 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010067
Jens Scharsigb49d15c2010-02-03 22:46:46 +010068 at91_set_a_periph(AT91_PIO_PORTC, 14, 1); /* TXD2 */
69 at91_set_a_periph(AT91_PIO_PORTC, 15, 0); /* RXD2 */
Asen Dimov2be3b312011-07-26 01:23:39 +000070 writel(1 << ATMEL_ID_USART2, &pmc->pcer);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020071}
72
Asen Dimov2be3b312011-07-26 01:23:39 +000073void at91_seriald_hw_init(void)
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020074{
Asen Dimov2be3b312011-07-26 01:23:39 +000075 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010076
Jens Scharsigb49d15c2010-02-03 22:46:46 +010077 at91_set_a_periph(AT91_PIO_PORTA, 9, 0); /* DRXD */
78 at91_set_a_periph(AT91_PIO_PORTA, 10, 1); /* DTXD */
Asen Dimov2be3b312011-07-26 01:23:39 +000079 writel(1 << ATMEL_ID_SYS, &pmc->pcer);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020080}
81
Asen Dimov2be3b312011-07-26 01:23:39 +000082#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +010083void at91_spi0_hw_init(unsigned long cs_mask)
84{
Asen Dimov2be3b312011-07-26 01:23:39 +000085 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010086
Asen Dimov2be3b312011-07-26 01:23:39 +000087 at91_set_a_periph(AT91_PIO_PORTA, 0, PUP); /* SPI0_MISO */
88 at91_set_a_periph(AT91_PIO_PORTA, 1, PUP); /* SPI0_MOSI */
89 at91_set_a_periph(AT91_PIO_PORTA, 2, PUP); /* SPI0_SPCK */
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +010090
91 /* Enable clock */
Asen Dimov2be3b312011-07-26 01:23:39 +000092 writel(1 << ATMEL_ID_SPI0, &pmc->pcer);
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +010093
94 if (cs_mask & (1 << 0)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +010095 at91_set_a_periph(AT91_PIO_PORTA, 3, 1);
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +010096 }
97 if (cs_mask & (1 << 1)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +010098 at91_set_a_periph(AT91_PIO_PORTA, 4, 1);
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +010099 }
100 if (cs_mask & (1 << 2)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100101 at91_set_a_periph(AT91_PIO_PORTA, 5, 1);
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +0100102 }
103 if (cs_mask & (1 << 3)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100104 at91_set_a_periph(AT91_PIO_PORTA, 6, 1);
Jean-Christophe PLAGNIOL-VILLARDc2a22732009-03-27 13:14:52 +0100105 }
106 if (cs_mask & (1 << 4)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100107 at91_set_pio_output(AT91_PIO_PORTA, 3, 1);
Jean-Christophe PLAGNIOL-VILLARDc2a22732009-03-27 13:14:52 +0100108 }
109 if (cs_mask & (1 << 5)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100110 at91_set_pio_output(AT91_PIO_PORTA, 4, 1);
Jean-Christophe PLAGNIOL-VILLARDc2a22732009-03-27 13:14:52 +0100111 }
112 if (cs_mask & (1 << 6)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100113 at91_set_pio_output(AT91_PIO_PORTA, 5, 1);
Jean-Christophe PLAGNIOL-VILLARDc2a22732009-03-27 13:14:52 +0100114 }
115 if (cs_mask & (1 << 7)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100116 at91_set_pio_output(AT91_PIO_PORTA, 6, 1);
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +0100117 }
118}
119
120void at91_spi1_hw_init(unsigned long cs_mask)
121{
Asen Dimov2be3b312011-07-26 01:23:39 +0000122 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
Jens Scharsiga4db1ca2010-02-03 22:46:58 +0100123
Asen Dimov2be3b312011-07-26 01:23:39 +0000124 at91_set_a_periph(AT91_PIO_PORTB, 30, PUP); /* SPI1_MISO */
125 at91_set_a_periph(AT91_PIO_PORTB, 31, PUP); /* SPI1_MOSI */
126 at91_set_a_periph(AT91_PIO_PORTB, 29, PUP); /* SPI1_SPCK */
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +0100127
128 /* Enable clock */
Asen Dimov2be3b312011-07-26 01:23:39 +0000129 writel(1 << ATMEL_ID_SPI1, &pmc->pcer);
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +0100130
131 if (cs_mask & (1 << 0)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100132 at91_set_a_periph(AT91_PIO_PORTB, 28, 1);
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +0100133 }
134 if (cs_mask & (1 << 1)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100135 at91_set_b_periph(AT91_PIO_PORTA, 24, 1);
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +0100136 }
137 if (cs_mask & (1 << 2)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100138 at91_set_b_periph(AT91_PIO_PORTA, 25, 1);
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +0100139 }
140 if (cs_mask & (1 << 3)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100141 at91_set_a_periph(AT91_PIO_PORTA, 26, 1);
Jean-Christophe PLAGNIOL-VILLARDc2a22732009-03-27 13:14:52 +0100142 }
143 if (cs_mask & (1 << 4)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100144 at91_set_pio_output(AT91_PIO_PORTB, 28, 1);
Jean-Christophe PLAGNIOL-VILLARDc2a22732009-03-27 13:14:52 +0100145 }
146 if (cs_mask & (1 << 5)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100147 at91_set_pio_output(AT91_PIO_PORTA, 24, 1);
Jean-Christophe PLAGNIOL-VILLARDc2a22732009-03-27 13:14:52 +0100148 }
149 if (cs_mask & (1 << 6)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100150 at91_set_pio_output(AT91_PIO_PORTA, 25, 1);
Jean-Christophe PLAGNIOL-VILLARDc2a22732009-03-27 13:14:52 +0100151 }
152 if (cs_mask & (1 << 7)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100153 at91_set_pio_output(AT91_PIO_PORTA, 26, 1);
Jean-Christophe PLAGNIOL-VILLARD12dcdef2009-03-21 21:07:59 +0100154 }
155}
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +0200156#endif