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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +02002/*
3 * Copyright (C) 2013 Samsung Electronics
4 * Sanghee Kim <sh0130.kim@samsung.com>
5 * Piotr Wilczek <p.wilczek@samsung.com>
6 *
7 * Configuation settings for the SAMSUNG TRATS2 (EXYNOS4412) board.
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +02008 */
9
Piotr Wilczek87d2e782014-03-07 14:59:49 +010010#ifndef __CONFIG_TRATS2_H
11#define __CONFIG_TRATS2_H
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020012
Simon Glassbe165002014-10-07 22:01:44 -060013#include <configs/exynos4-common.h>
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020014
Piotr Wilczek87d2e782014-03-07 14:59:49 +010015#define CONFIG_TIZEN /* TIZEN lib */
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020016
17#ifndef CONFIG_SYS_L2CACHE_OFF
18#define CONFIG_SYS_L2_PL310
19#define CONFIG_SYS_PL310_BASE 0x10502000
20#endif
21
Piotr Wilczek87d2e782014-03-07 14:59:49 +010022/* TRATS2 has 4 banks of DRAM */
Piotr Wilczek87d2e782014-03-07 14:59:49 +010023#define CONFIG_SYS_SDRAM_BASE 0x40000000
24#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
25#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020026
Piotr Wilczek87d2e782014-03-07 14:59:49 +010027#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
28 - GENERATED_GBL_DATA_SIZE)
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020029
Piotr Wilczek87d2e782014-03-07 14:59:49 +010030#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020031
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020032/* Tizen - partitions definitions */
Przemyslaw Marczak276e8d92014-02-28 18:53:36 +010033#define PARTS_CSA "csa-mmc"
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020034#define PARTS_BOOT "boot"
Przemyslaw Marczak276e8d92014-02-28 18:53:36 +010035#define PARTS_QBOOT "qboot"
Piotr Wilczek953b8422013-11-27 11:11:02 +010036#define PARTS_CSC "csc"
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020037#define PARTS_ROOT "platform"
38#define PARTS_DATA "data"
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020039#define PARTS_UMS "ums"
40
41#define PARTS_DEFAULT \
Piotr Wilczek5539e1e2013-12-30 09:40:40 +010042 "uuid_disk=${uuid_gpt_disk};" \
Piotr Wilczek953b8422013-11-27 11:11:02 +010043 "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
Przemyslaw Marczak276e8d92014-02-28 18:53:36 +010044 "name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
45 "name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020046 "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
Piotr Wilczek953b8422013-11-27 11:11:02 +010047 "name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
Przemyslaw Marczak276e8d92014-02-28 18:53:36 +010048 "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020049 "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
50
Piotr Wilczek9317ba12013-11-12 15:22:46 +010051#define CONFIG_DFU_ALT \
Mateusz Zalega0ab80bf2014-04-28 21:13:25 +020052 "u-boot raw 0x80 0x800;" \
Łukasz Majewskib7afe212014-07-22 10:17:06 +020053 "/uImage ext4 0 2;" \
54 "/modem.bin ext4 0 2;" \
55 "/exynos4412-trats2.dtb ext4 0 2;" \
Przemyslaw Marczak276e8d92014-02-28 18:53:36 +010056 ""PARTS_CSA" part 0 1;" \
Łukasz Majewski5cd4f742014-01-14 08:02:24 +010057 ""PARTS_BOOT" part 0 2;" \
Przemyslaw Marczak276e8d92014-02-28 18:53:36 +010058 ""PARTS_QBOOT" part 0 3;" \
59 ""PARTS_CSC" part 0 4;" \
Łukasz Majewski5cd4f742014-01-14 08:02:24 +010060 ""PARTS_ROOT" part 0 5;" \
61 ""PARTS_DATA" part 0 6;" \
Przemyslaw Marczakea60f022014-01-22 12:02:47 +010062 ""PARTS_UMS" part 0 7;" \
Łukasz Majewskif106bf52015-04-01 12:34:30 +020063 "params.bin raw 0x38 0x8;" \
64 "/Image.itb ext4 0 2\0"
Piotr Wilczek9317ba12013-11-12 15:22:46 +010065
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020066#define CONFIG_EXTRA_ENV_SETTINGS \
67 "bootk=" \
Piotr Wilczek155f67d2014-01-22 15:54:37 +010068 "run loaduimage;" \
69 "if run loaddtb; then " \
70 "bootm 0x40007FC0 - ${fdtaddr};" \
71 "fi;" \
72 "bootm 0x40007FC0;\0" \
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020073 "updatebackup=" \
Jaehoon Chung92441af2014-04-30 09:09:15 +090074 "mmc dev 0 2; mmc write 0x51000000 0 0x800;" \
75 " mmc dev 0 0\0" \
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020076 "updatebootb=" \
Jaehoon Chung92441af2014-04-30 09:09:15 +090077 "mmc read 0x51000000 0x80 0x800; run updatebackup\0" \
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020078 "mmcboot=" \
79 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
80 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
Piotr Wilczek155f67d2014-01-22 15:54:37 +010081 "run bootk\0" \
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020082 "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
83 "boottrace=setenv opts initcall_debug; run bootcmd\0" \
84 "verify=n\0" \
85 "rootfstype=ext4\0" \
Andre Heider698793b2020-09-17 08:52:01 +020086 "console=console=ttySAC2,115200n8\0" \
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020087 "kernelname=uImage\0" \
Piotr Wilczek61bba482013-11-27 11:11:00 +010088 "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 " \
89 "${kernelname}\0" \
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020090 "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
91 "${fdtfile}\0" \
Piotr Wilczek5539e1e2013-12-30 09:40:40 +010092 "mmcdev=" __stringify(CONFIG_MMC_DEFAULT_DEV) "\0" \
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020093 "mmcbootpart=2\0" \
94 "mmcrootpart=5\0" \
95 "opts=always_resume=1\0" \
96 "partitions=" PARTS_DEFAULT \
Piotr Wilczek9317ba12013-11-12 15:22:46 +010097 "dfu_alt_info=" CONFIG_DFU_ALT \
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +020098 "uartpath=ap\0" \
99 "usbpath=ap\0" \
100 "consoleon=set console console=ttySAC2,115200n8; save; reset\0" \
101 "consoleoff=set console console=ram; save; reset\0" \
102 "spladdr=0x40000100\0" \
103 "splsize=0x200\0" \
104 "splfile=falcon.bin\0" \
105 "spl_export=" \
106 "setexpr spl_imgsize ${splsize} + 8 ;" \
107 "setenv spl_imgsize 0x${spl_imgsize};" \
108 "setexpr spl_imgaddr ${spladdr} - 8 ;" \
109 "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
110 "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
111 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
112 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
113 "spl export atags 0x40007FC0;" \
114 "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
115 "mw.l ${spl_addr_tmp} ${splsize};" \
116 "ext4write mmc ${mmcdev}:${mmcbootpart}" \
117 " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
118 "setenv spl_imgsize;" \
119 "setenv spl_imgaddr;" \
120 "setenv spl_addr_tmp;\0" \
Tom Rini84afe7a2021-08-10 17:34:22 -0400121 ENV_ITB \
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +0200122 "fdtaddr=40800000\0" \
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +0200123
Albert ARIBAUDb8fb7b82014-04-08 09:25:08 +0200124/* GPT */
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +0200125
Przemyslaw Marczaka537a852014-03-25 10:58:22 +0100126/* Security subsystem - enable hw_rand() */
127#define CONFIG_EXYNOS_ACE_SHA
Przemyslaw Marczaka537a852014-03-25 10:58:22 +0100128
Przemyslaw Marczak283a3202014-01-22 11:24:12 +0100129/* Common misc for Samsung */
130#define CONFIG_MISC_COMMON
131
Przemyslaw Marczakd87efc92014-01-22 11:24:19 +0100132/* Download menu - Samsung common */
133#define CONFIG_LCD_MENU
Przemyslaw Marczakd87efc92014-01-22 11:24:19 +0100134
135/* Download menu - definitions for check keys */
136#ifndef __ASSEMBLY__
Przemyslaw Marczakd87efc92014-01-22 11:24:19 +0100137
138#define KEY_PWR_PMIC_NAME "MAX77686_PMIC"
139#define KEY_PWR_STATUS_REG MAX77686_REG_PMIC_STATUS1
140#define KEY_PWR_STATUS_MASK (1 << 0)
141#define KEY_PWR_INTERRUPT_REG MAX77686_REG_PMIC_INT1
142#define KEY_PWR_INTERRUPT_MASK (1 << 1)
143
Akshay Saraswatbbb1a622014-05-13 10:30:15 +0530144#define KEY_VOL_UP_GPIO EXYNOS4X12_GPIO_X22
145#define KEY_VOL_DOWN_GPIO EXYNOS4X12_GPIO_X33
Przemyslaw Marczakd87efc92014-01-22 11:24:19 +0100146#endif /* __ASSEMBLY__ */
147
148/* LCD console */
149#define LCD_BPP LCD_COLOR16
Przemyslaw Marczakd87efc92014-01-22 11:24:19 +0100150
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +0200151/* LCD */
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +0200152#define CONFIG_FB_ADDR 0x52504000
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +0200153#define CONFIG_EXYNOS_MIPI_DSIM
Przemyslaw Marczak02f4a092013-11-29 18:30:43 +0100154#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +0200155
Piotr Wilczek2b3c92a2013-09-20 15:01:27 +0200156#endif /* __CONFIG_H */