| Joel Stanley | 086765c | 2022-02-16 18:23:22 +1030 | [diff] [blame] | 1 | menuconfig ASPEED_RAM |
| 2 | bool "ASPEED SDRAM configuration" |
| Chia-Wei Wang | 8fb5259 | 2024-09-10 17:39:19 +0800 | [diff] [blame] | 3 | depends on RAM |
| 4 | depends on ARCH_ASPEED || TARGET_ASPEED_AST2700_IBEX |
| Joel Stanley | 086765c | 2022-02-16 18:23:22 +1030 | [diff] [blame] | 5 | default ARCH_ASPEED |
| 6 | help |
| 7 | Configuration options for DDR SDRAM on ASPEED systems. |
| 8 | |
| 9 | RAM initialisation is always built in for the platform. This menu |
| 10 | allows customisation of the configuration used. |
| 11 | |
| Dylan Hung | f7d8f83 | 2020-09-07 16:25:07 +0800 | [diff] [blame] | 12 | config ASPEED_DDR4_DUALX8 |
| 13 | bool "Enable Dual X8 DDR4 die" |
| Joel Stanley | 086765c | 2022-02-16 18:23:22 +1030 | [diff] [blame] | 14 | depends on ASPEED_RAM |
| 15 | help |
| 16 | Say Y if dual X8 DDR4 die is used on the board. The ASPEED DDRM |
| 17 | SRAM controller needs to know if the memory chip mounted on the |
| 18 | board is dual x8 die or not, otherwise it may get the wrong |
| 19 | size of the memory space. |
| 20 | |
| 21 | config ASPEED_BYPASS_SELFTEST |
| 22 | depends on ASPEED_RAM |
| 23 | depends on ASPEED_AST2600 |
| 24 | bool "Bypass self test during initialization" |
| 25 | help |
| 26 | Say Y here to bypass DRAM self test to speed up the boot time. |
| 27 | |
| 28 | config ASPEED_ECC |
| 29 | bool "ASPEED SDRAM ECC" |
| 30 | depends on ASPEED_RAM |
| 31 | depends on ASPEED_AST2600 |
| Dylan Hung | f7d8f83 | 2020-09-07 16:25:07 +0800 | [diff] [blame] | 32 | help |
| Joel Stanley | 086765c | 2022-02-16 18:23:22 +1030 | [diff] [blame] | 33 | Enable SDRAM ECC function. This configures the SDRAM controller to |
| 34 | perform error detection and correction, sacrificing 1/9th of the |
| 35 | installed RAM to do so. |
| Dylan Hung | 8247002 | 2020-12-14 13:54:24 +0800 | [diff] [blame] | 36 | |
| Joel Stanley | 086765c | 2022-02-16 18:23:22 +1030 | [diff] [blame] | 37 | |
| 38 | config ASPEED_ECC_SIZE |
| 39 | int "ECC size: 0=driver auto-caluated" |
| 40 | depends on ASPEED_ECC |
| 41 | default 0 |
| 42 | help |
| 43 | SDRAM size with the error correcting code enabled. The unit is |
| 44 | in Megabytes. Noted that only the 8/9 of the configured size |
| 45 | can be used by the system. The remaining 1/9 will be used by |
| 46 | the ECC engine. If the size is set to 0, the sdram driver will |
| 47 | calculate the SDRAM size and set the whole range be ECC enabled. |
| Dylan Hung | 8247002 | 2020-12-14 13:54:24 +0800 | [diff] [blame] | 48 | |
| 49 | choice |
| Joel Stanley | 086765c | 2022-02-16 18:23:22 +1030 | [diff] [blame] | 50 | prompt "AST2600 DDR4 target date rate" |
| Dylan Hung | 8247002 | 2020-12-14 13:54:24 +0800 | [diff] [blame] | 51 | default ASPEED_DDR4_1600 |
| Joel Stanley | 086765c | 2022-02-16 18:23:22 +1030 | [diff] [blame] | 52 | depends on ASPEED_RAM |
| 53 | depends on ASPEED_AST2600 |
| Dylan Hung | 8247002 | 2020-12-14 13:54:24 +0800 | [diff] [blame] | 54 | |
| 55 | config ASPEED_DDR4_400 |
| Joel Stanley | 086765c | 2022-02-16 18:23:22 +1030 | [diff] [blame] | 56 | bool "400Mbps" |
| Dylan Hung | 8247002 | 2020-12-14 13:54:24 +0800 | [diff] [blame] | 57 | help |
| 58 | select DDR4 target data rate at 400M |
| 59 | |
| 60 | config ASPEED_DDR4_800 |
| Joel Stanley | 086765c | 2022-02-16 18:23:22 +1030 | [diff] [blame] | 61 | bool "800Mbps" |
| Dylan Hung | 8247002 | 2020-12-14 13:54:24 +0800 | [diff] [blame] | 62 | help |
| 63 | select DDR4 target data rate at 800M |
| 64 | |
| 65 | config ASPEED_DDR4_1333 |
| Joel Stanley | 086765c | 2022-02-16 18:23:22 +1030 | [diff] [blame] | 66 | bool "1333Mbps" |
| Dylan Hung | 8247002 | 2020-12-14 13:54:24 +0800 | [diff] [blame] | 67 | help |
| 68 | select DDR4 target data rate at 1333M |
| 69 | |
| 70 | config ASPEED_DDR4_1600 |
| Joel Stanley | 086765c | 2022-02-16 18:23:22 +1030 | [diff] [blame] | 71 | bool "1600Mbps" |
| Dylan Hung | 8247002 | 2020-12-14 13:54:24 +0800 | [diff] [blame] | 72 | help |
| 73 | select DDR4 target data rate at 1600M |
| 74 | endchoice |
| 75 | |
| Chia-Wei Wang | 8fb5259 | 2024-09-10 17:39:19 +0800 | [diff] [blame] | 76 | choice |
| 77 | prompt "AST2700 DDR target date rate" |
| 78 | default ASPEED_DDR_3200 |
| 79 | depends on ASPEED_RAM |
| 80 | depends on TARGET_ASPEED_AST2700_IBEX |
| 81 | |
| 82 | config ASPEED_DDR_1600 |
| 83 | bool "1600 Mbps" |
| 84 | help |
| 85 | select DDR target data rate at 1600M |
| 86 | |
| 87 | config ASPEED_DDR_2400 |
| 88 | bool "2400 Mbps" |
| 89 | help |
| 90 | select DDR target data rate at 2400M |
| 91 | |
| 92 | config ASPEED_DDR_3200 |
| 93 | bool "3200 Mbps" |
| 94 | help |
| 95 | select DDR target data rate at 3200M |
| 96 | endchoice |