ram: aspeed: Rework kconfig options
Ensure the ASPEED related options are grouped together under the RAM
option when enabling support.
This also makes some minor grammar corrections and renames options so
they present cleanly in menuconfig.
There should be no functional change to the configuration or binary.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Dylan Hung <dylan_hung@aspeedtech.com>
diff --git a/drivers/ram/aspeed/Kconfig b/drivers/ram/aspeed/Kconfig
index 576d5af..0deab86 100644
--- a/drivers/ram/aspeed/Kconfig
+++ b/drivers/ram/aspeed/Kconfig
@@ -1,66 +1,77 @@
-if RAM || SPL_RAM
+menuconfig ASPEED_RAM
+ bool "ASPEED SDRAM configuration"
+ depends on RAM && ARCH_ASPEED
+ default ARCH_ASPEED
+ help
+ Configuration options for DDR SDRAM on ASPEED systems.
+
+ RAM initialisation is always built in for the platform. This menu
+ allows customisation of the configuration used.
+
+if ASPEED_RAM
config ASPEED_DDR4_DUALX8
bool "Enable Dual X8 DDR4 die"
- depends on DM && OF_CONTROL && ARCH_ASPEED
+ depends on ASPEED_RAM
+ help
+ Say Y if dual X8 DDR4 die is used on the board. The ASPEED DDRM
+ SRAM controller needs to know if the memory chip mounted on the
+ board is dual x8 die or not, otherwise it may get the wrong
+ size of the memory space.
+
+config ASPEED_BYPASS_SELFTEST
+ depends on ASPEED_RAM
+ depends on ASPEED_AST2600
+ bool "Bypass self test during initialization"
+ help
+ Say Y here to bypass DRAM self test to speed up the boot time.
+
+config ASPEED_ECC
+ bool "ASPEED SDRAM ECC"
+ depends on ASPEED_RAM
+ depends on ASPEED_AST2600
help
- Say Y if dual X8 DDR4 die is used on the board. The aspeed ddr sdram
- controller needs to know if the memory chip mounted on the board is dual
- x8 die or not. Or it may get the wrong size of the memory space.
+ Enable SDRAM ECC function. This configures the SDRAM controller to
+ perform error detection and correction, sacrificing 1/9th of the
+ installed RAM to do so.
-if ASPEED_AST2600
+
+config ASPEED_ECC_SIZE
+ int "ECC size: 0=driver auto-caluated"
+ depends on ASPEED_ECC
+ default 0
+ help
+ SDRAM size with the error correcting code enabled. The unit is
+ in Megabytes. Noted that only the 8/9 of the configured size
+ can be used by the system. The remaining 1/9 will be used by
+ the ECC engine. If the size is set to 0, the sdram driver will
+ calculate the SDRAM size and set the whole range be ECC enabled.
choice
- prompt "DDR4 target date rate"
+ prompt "AST2600 DDR4 target date rate"
default ASPEED_DDR4_1600
+ depends on ASPEED_RAM
+ depends on ASPEED_AST2600
config ASPEED_DDR4_400
- bool "DDR4 targets at 400Mbps"
- depends on DM && OF_CONTROL && ARCH_ASPEED
+ bool "400Mbps"
help
select DDR4 target data rate at 400M
config ASPEED_DDR4_800
- bool "DDR4 targets at 800Mbps"
- depends on DM && OF_CONTROL && ARCH_ASPEED
+ bool "800Mbps"
help
select DDR4 target data rate at 800M
config ASPEED_DDR4_1333
- bool "DDR4 targets at 1333Mbps"
- depends on DM && OF_CONTROL && ARCH_ASPEED
+ bool "1333Mbps"
help
select DDR4 target data rate at 1333M
config ASPEED_DDR4_1600
- bool "DDR4 targets at 1600Mbps"
- depends on DM && OF_CONTROL && ARCH_ASPEED
+ bool "1600Mbps"
help
select DDR4 target data rate at 1600M
endchoice
-config ASPEED_BYPASS_SELFTEST
- bool "bypass self test during DRAM initialization"
- help
- Say Y here to bypass DRAM self test to speed up the boot time
-
-config ASPEED_ECC
- bool "aspeed SDRAM error correcting code"
- depends on DM && OF_CONTROL && ARCH_ASPEED
- help
- enable SDRAM ECC function
-
-if ASPEED_ECC
-config ASPEED_ECC_SIZE
- int "ECC size: 0=driver auto-caluated"
- depends on ASPEED_ECC
- default 0
- help
- SDRAM size with the error correcting code enabled. The unit is
- in Megabytes. Noted that only the 8/9 of the configured size
- can be used by the system. The remaining 1/9 will be used by
- the ECC engine. If the size is set to 0, the sdram driver will
- calculate the SDRAM size and set the whole range be ECC enabled.
-endif # end of ASPEED_ECC
-endif # end of ASPEED_AST2600
-endif # end of RAM || SPL_RAM
+endif # End of ASPEED_RAM