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Michal Simeke42840b2019-03-27 20:14:19 +01001// SPDX-License-Identifier: GPL-2.0
2/*
3 * dts file for Xilinx Versal a2197 RevA System Controller
4 *
5 * (C) Copyright 2019, Xilinx, Inc.
6 *
Michal Simeka8c94362023-07-10 14:35:49 +02007 * Michal Simek <michal.simek@amd.com>
Michal Simeke42840b2019-03-27 20:14:19 +01008 */
9/dts-v1/;
10
11#include "zynqmp.dtsi"
12#include "zynqmp-clk-ccf.dtsi"
13#include <dt-bindings/gpio/gpio.h>
Michal Simekfe8cb0c2021-05-10 14:55:34 +020014#include <dt-bindings/phy/phy.h>
Michal Simeke42840b2019-03-27 20:14:19 +010015
16/ {
17 model = "Versal System Controller on a2197 Processor Char board RevA"; /* Tenzing */
Michal Simek36aeb172019-06-28 13:16:10 +020018 compatible = "xlnx,zynqmp-p-a2197-00-revA", "xlnx,zynqmp-a2197-revA",
Michal Simeke42840b2019-03-27 20:14:19 +010019 "xlnx,zynqmp-a2197", "xlnx,zynqmp";
20
21 aliases {
22 ethernet0 = &gem0;
Michal Simeke42840b2019-03-27 20:14:19 +010023 i2c0 = &i2c0;
24 i2c1 = &i2c1;
25 mmc0 = &sdhci0;
26 mmc1 = &sdhci1;
Michal Simek53b145d2021-06-03 11:46:50 +020027 nvmem0 = &eeprom;
Michal Simeke42840b2019-03-27 20:14:19 +010028 rtc0 = &rtc;
29 serial0 = &uart0;
30 serial1 = &uart1;
31 serial2 = &dcc;
32 usb0 = &usb0;
33 usb1 = &usb1;
34 };
35
36 chosen {
37 bootargs = "earlycon";
38 stdout-path = "serial0:115200n8";
Michal Simeke42840b2019-03-27 20:14:19 +010039 };
40
41 memory@0 {
42 device_type = "memory";
Michal Simek2ceb5b52019-10-14 10:35:03 +020043 reg = <0x0 0x0 0x0 0x80000000>;
Michal Simeke42840b2019-03-27 20:14:19 +010044 };
Michal Simekfe8cb0c2021-05-10 14:55:34 +020045
Michal Simeke3157622024-01-08 10:24:45 +010046 si5332_1: si5332-1 { /* clk0_sgmii - u142 */
Michal Simekfe8cb0c2021-05-10 14:55:34 +020047 compatible = "fixed-clock";
48 #clock-cells = <0>;
Michal Simekd959bfc2021-10-15 14:48:20 +020049 clock-frequency = <125000000>;
Michal Simekfe8cb0c2021-05-10 14:55:34 +020050 };
51
Michal Simeke3157622024-01-08 10:24:45 +010052 si5332_2: si5332-2 { /* clk1_usb - u142 */
Michal Simekfe8cb0c2021-05-10 14:55:34 +020053 compatible = "fixed-clock";
54 #clock-cells = <0>;
55 clock-frequency = <27000000>;
56 };
Michal Simeke42840b2019-03-27 20:14:19 +010057};
58
59&sdhci0 { /* emmc MIO 13-23 - with some settings 16GB */
60 status = "okay";
61 non-removable;
62 disable-wp;
Paul Alvina1398f02024-09-25 09:03:13 +020063 no-sd;
64 no-sdio;
65 cap-mmc-hw-reset;
Michal Simeke42840b2019-03-27 20:14:19 +010066 bus-width = <8>;
Michal Simek3b662642020-07-22 17:42:43 +020067 xlnx,mio-bank = <0>;
Michal Simeke42840b2019-03-27 20:14:19 +010068};
69
70&uart0 { /* uart0 MIO38-39 */
71 status = "okay";
Michal Simeke42840b2019-03-27 20:14:19 +010072};
73
74&uart1 { /* uart1 MIO40-41 */
75 status = "okay";
Michal Simeke42840b2019-03-27 20:14:19 +010076};
77
78&sdhci1 { /* sd1 MIO45-51 cd in place */
79 status = "okay";
80 no-1-8-v;
81 disable-wp;
Michal Simek3b662642020-07-22 17:42:43 +020082 xlnx,mio-bank = <1>;
Michal Simeke42840b2019-03-27 20:14:19 +010083};
84
Michal Simekfe8cb0c2021-05-10 14:55:34 +020085&psgtr {
86 status = "okay";
87 /* sgmii, usb3 */
88 clocks = <&si5332_1>, <&si5332_2>;
89 clock-names = "ref0", "ref1";
90};
91
Michal Simeke42840b2019-03-27 20:14:19 +010092&gem0 {
93 status = "okay";
94 phy-handle = <&phy0>;
95 phy-mode = "sgmii"; /* DTG generates this properly 1512 */
Michal Simek0641df72023-09-22 12:35:36 +020096 mdio: mdio {
97 #address-cells = <1>;
98 #size-cells = <0>;
99 /* reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>; */
100 phy0: ethernet-phy@0 {
101 reg = <0>;
102 };
Michal Simeke42840b2019-03-27 20:14:19 +0100103 };
104};
105
106&gpio {
107 status = "okay";
108 gpio-line-names = "", "", "", "", "", /* 0 - 4 */
109 "", "", "DC_SYS_CTRL0", "DC_SYS_CTRL1", "DC_SYS_CTRL2", /* 5 - 9 */
110 "DC_SYS_CTRL3", "DC_SYS_CTRL4", "DC_SYS_CTRL5", "EMMC_DAT0", "EMMC_DAT1", /* 10 - 14 */
111 "EMMC_DAT2", "EMMC_DAT3", "EMMC_DAT4", "EMMC_DAT5", "EMMC_DAT6", /* 15 - 19 */
112 "EMMC_DAT7", "EMMC_CMD", "EMMC_CLK", "EMMC_RST_B", "", /* 20 - 24 */
113 "", "", "", "", "", /* 25 - 29 */
114 "", "", "", "", "LP_I2C0_PMC_SCL", /* 30 - 34 */
115 "LP_I2C0_PMC_SDA", "LP_I2C1_SCL", "LP_I2C1_SDA", "UART0_RXD_IN", "UART0_TXD_OUT", /* 35 - 39 */
116 "UART1_TXD_OUT", "UART1_RXD_IN", "ETH_RESET_B", "", "", /* 40 - 44 */
117 "SD1_CD_B", "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3", /* 45 - 49 */
118 "SD1_CMD", "SD1_CLK", "USB0_CLK", "USB0_DIR", "USB0_DATA2", /* 50 - 54 */
119 "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3", /* 55 - 59 */
120 "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "USB1_CLK", /* 60 - 64 */
121 "USB1_DIR", "USB1_DATA2", "USB1_NXT", "USB1_DATA0", "USB1_DATA1", /* 65 - 69 */
122 "USB1_STP", "USB1_DATA3", "USB1_DATA4", "USB1_DATA5", "USB1_DATA6", /* 70 - 74 */
123 "USB1_DATA7", "ETH_MDC", "ETH_MDIO", /* 75 - 77, MIO end and EMIO start */
124 "SYSCTLR_VERSAL_MODE0", "SYSCTLR_VERSAL_MODE1", /* 78 - 79 */
125 "SYSCTLR_VERSAL_MODE2", "SYSCTLR_VERSAL_MODE3", "SYSCTLR_POR_B_LS", "DC_PRSNT", "SYSCTLR_POWER_EN", /* 80 - 84 */
Michal Simeka8c5ce42024-09-13 11:28:46 +0200126 "SYSCTLR_JTAG_S0", "SYSCTLR_JTAG_S1", "SYSCTLR_IIC_MUX0_RESET_B", "SYSCTLR_IIC_MUX1_RESET_B", "SYSCTLR_LP_I2C_SM_ALERT", /* 85 - 89 */
Michal Simeke42840b2019-03-27 20:14:19 +0100127 "SYSCTLR_GPIO0", "SYSCTLR_GPIO1", "SYSCTLR_GPIO2", "SYSCTLR_GPIO3", "SYSCTLR_GPIO4", /* 90 - 94 */
128 "SYSCTLR_GPIO5", "VCCO_500_RBIAS", "VCCO_501_RBIAS", "VCCO_502_RBIAS", "VCCO_500_RBIAS_LED", /* 95 - 99 */
129 "VCCO_501_RBIAS_LED", "VCCO_502_RBIAS_LED", "SYSCTLR_VCCINT_EN", "SYSCTLR_VCC_IO_SOC_EN", "SYSCTLR_VCC_PMC_EN", /* 100 - 104 */
130 "SYSCTLR_VCC_RAM_EN", "SYSCTLR_VCC_PSLP_EN", "SYSCTLR_VCC_PSFP_EN", "SYSCTLR_VCCAUX_EN", "SYSCTLR_VCCAUX_PMC_EN", /* 105 - 109 */
131 "SYSCTLR_VCCO_500_EN", "SYSCTLR_VCCO_501_EN", "SYSCTLR_VCCO_502_EN", "SYSCTLR_VCCO_503_EN", "SYSCTLR_VCC1V8_EN", /* 110 - 114 */
132 "SYSCTLR_VCC3V3_EN", "SYSCTLR_VCC1V2_DDR4_EN", "SYSCTLR_VCC1V1_LP4_EN", "SYSCTLR_VDD1_1V8_LP4_EN", "SYSCTLR_VADJ_FMC_EN", /* 115 - 119 */
133 "SYSCTLR_MGTYAVCC_EN", "SYSCTLR_MGTYAVTT_EN", "SYSCTLR_MGTYVCCAUX_EN", "SYSCTLR_UTIL_1V13_EN", "SYSCTLR_UTIL_1V8_EN", /* 120 - 124 */
134 "SYSCTLR_UTIL_2V5_EN", "FMCP1_FMC_PRSNT_M2C_B", "FMCP2_FMC_PRSNT_M2C_B", "FMCP1_FMCP_PRSNT_M2C_B", "FMCP2_FMCP_PRSNT_M2C_B", /* 125 - 129 */
135 "PMBUS1_INA226_ALERT", "PMBUS2_INA226_ALERT", "SYSCTLR_USBC_SBU1", "SYSCTLR_USBC_SBU2", "TI_CABLE1", /* 130 - 134 */
136 "TI_CABLE2", "SYSCTLR_MIC2005_EN_B", "SYSCTLR_MIC2005_FAULT_B", "SYSCTLR_TUSB320_INT_B", "SYSCTLR_TUSB320_ID", /* 135 - 139 */
137 "PMBUS1_ALERT", "PMBUS2_ALERT", "SYSCTLR_ETH_RESET_B", "SYSCTLR_VCC0V85_TG", "MAX6643_OT_B", /* 140 - 144 */
138 "MAX6643_FANFINAL_B", "MAX6643_FULLSPD", "", "", "", /* 145 - 149 */
139 "", "", "", "", "", /* 150 - 154 */
140 "", "", "", "", "", /* 155 - 159 */
141 "", "", "", "", "", /* 160 - 164 */
142 "", "", "", "", "", /* 165 - 169 */
Michal Simekfdf3fc62023-07-10 14:37:31 +0200143 "", "", "", ""; /* 170 - 173 */
Michal Simeke42840b2019-03-27 20:14:19 +0100144};
145
146&i2c0 { /* MIO 34-35 - can't stay here */
147 status = "okay";
148 clock-frequency = <400000>;
149 i2c-mux@74 { /* u33 */
150 compatible = "nxp,pca9548";
151 #address-cells = <1>;
152 #size-cells = <0>;
153 reg = <0x74>;
154 /* reset-gpios = <&gpio SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */
155 i2c@0 { /* PMBUS1 */
156 #address-cells = <1>;
157 #size-cells = <0>;
158 reg = <0>;
159 /* On connector J98 */
160 reg_vcc_fmc: tps544@7 { /* u80 - FIXME name - don't know what it does */
Michal Simek610accf2024-09-25 09:02:07 +0200161 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
Michal Simeke42840b2019-03-27 20:14:19 +0100162 reg = <0x7>;
163 regulator-name = "reg_vcc_fmc";
164 regulator-min-microvolt = <1800000>;
165 regulator-max-microvolt = <2600000>;
166 /* enable-gpio = <&gpio0 23 0x4>; optional */
167 };
168 reg_vcc_ram: tps544@8 { /* u83 - FIXME name - don't know what it does */
Michal Simek610accf2024-09-25 09:02:07 +0200169 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
Michal Simeke42840b2019-03-27 20:14:19 +0100170 reg = <0x8>;
171 };
172 reg_vcc_pslp: tps544@9 { /* u85 - FIXME name - don't know what it does */
Michal Simek610accf2024-09-25 09:02:07 +0200173 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
Michal Simeke42840b2019-03-27 20:14:19 +0100174 reg = <0x9>;
175 };
176 reg_vcc_psfp: tps544@a { /* u86 - FIXME name - don't know what it does */
Michal Simek610accf2024-09-25 09:02:07 +0200177 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
Michal Simeke42840b2019-03-27 20:14:19 +0100178 reg = <0xa>;
179 };
Nishant Mittal6815dd52019-07-24 14:58:52 +0530180 reg_vccint: tps53681@60 { /* u70 - FIXME name - don't know what it does - also vcc_io_soc */
Nishant Mittalce2c40d2019-07-24 14:58:52 +0530181 compatible = "ti,tps53681", "ti,tps53679";
Nishant Mittal6815dd52019-07-24 14:58:52 +0530182 reg = <0x60>;
Michal Simeke42840b2019-03-27 20:14:19 +0100183 /* vccint, vcc_io_soc */
184 };
185 };
186 i2c@1 { /* PMBUS1_INA226 */
187 #address-cells = <1>;
188 #size-cells = <0>;
189 reg = <1>;
Michal Simek892249d2019-10-14 10:27:42 +0200190 /* FIXME check alerts coming to SC */
Michal Simeke42840b2019-03-27 20:14:19 +0100191 vcc_fmc: ina226@42 { /* u81 */
192 compatible = "ti,ina226";
193 reg = <0x42>;
194 shunt-resistor = <5000>;
195 };
196 vcc_ram: ina226@43 { /* u82 */
197 compatible = "ti,ina226";
198 reg = <0x43>;
199 shunt-resistor = <5000>;
200 };
201 vcc_pslp: ina226@44 { /* u84 */
202 compatible = "ti,ina226";
203 reg = <0x44>;
204 shunt-resistor = <5000>;
205 };
206 vcc_psfp: ina226@45 { /* u87 */
207 compatible = "ti,ina226";
208 reg = <0x45>;
209 shunt-resistor = <5000>;
210 };
211 };
212 i2c@2 { /* PMBUS2 */
213 #address-cells = <1>;
214 #size-cells = <0>;
215 reg = <2>;
216 /* On connector J104 */
217 reg_vccaus: tps544@d { /* u88 - FIXME name - don't know what it does */
Michal Simek610accf2024-09-25 09:02:07 +0200218 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
Michal Simeke42840b2019-03-27 20:14:19 +0100219 reg = <0xd>;
220 };
221 reg_vccaux_fmc: tps544@e { /* u90 - FIXME name - don't know what it does */
Michal Simek610accf2024-09-25 09:02:07 +0200222 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
Michal Simeke42840b2019-03-27 20:14:19 +0100223 reg = <0xe>;
224 };
225 reg_vcco_500: tps544@f { /* u93 - FIXME name - don't know what it does */
Michal Simek610accf2024-09-25 09:02:07 +0200226 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
Michal Simeke42840b2019-03-27 20:14:19 +0100227 reg = <0xf>;
228 };
229 reg_vcco_501: tps544@10 { /* u95 - FIXME name - don't know what it does */
Michal Simek610accf2024-09-25 09:02:07 +0200230 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
Michal Simeke42840b2019-03-27 20:14:19 +0100231 reg = <0x10>;
232 };
233 reg_vcco_502: tps544@11 { /* u97 - FIXME name - don't know what it does */
Michal Simek610accf2024-09-25 09:02:07 +0200234 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
Michal Simeke42840b2019-03-27 20:14:19 +0100235 reg = <0x11>;
236 };
237 reg_vcco_503: tps544@12 { /* u99 - FIXME name - don't know what it does */
Michal Simek610accf2024-09-25 09:02:07 +0200238 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
Michal Simeke42840b2019-03-27 20:14:19 +0100239 reg = <0x12>;
240 };
241 reg_vcc1v8: tps544@13 { /* u101 - FIXME name - don't know what it does */
Michal Simek610accf2024-09-25 09:02:07 +0200242 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
Michal Simeke42840b2019-03-27 20:14:19 +0100243 reg = <0x13>;
244 };
245 reg_vcc3v3: tps544@14 { /* u102 - FIXME name - don't know what it does */
Michal Simek610accf2024-09-25 09:02:07 +0200246 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
Michal Simeke42840b2019-03-27 20:14:19 +0100247 reg = <0x14>;
248 };
249 reg_vcc1v2_ddr4: tps544@15 { /* u104 - FIXME name - don't know what it does */
Michal Simek610accf2024-09-25 09:02:07 +0200250 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
Michal Simeke42840b2019-03-27 20:14:19 +0100251 reg = <0x15>;
252 };
253 reg_vcc1v1_lp4: tps544@16 { /* u106 - FIXME name - don't know what it does */
Michal Simek610accf2024-09-25 09:02:07 +0200254 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
Michal Simeke42840b2019-03-27 20:14:19 +0100255 reg = <0x16>;
256 };
257 reg_vcc1_1V8_lp4: tps544@17 { /* u108 - FIXME name - don't know what it does */
Michal Simek610accf2024-09-25 09:02:07 +0200258 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
Michal Simeke42840b2019-03-27 20:14:19 +0100259 reg = <0x17>;
260 };
261 reg_vadj_fmc: tps544@19 { /* u109 - FIXME name - don't know what it does */
Michal Simek610accf2024-09-25 09:02:07 +0200262 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
Michal Simeke42840b2019-03-27 20:14:19 +0100263 reg = <0x19>;
264 };
265 reg_mgtyavcc: tps544@1a { /* u111 - FIXME name - don't know what it does */
Michal Simek610accf2024-09-25 09:02:07 +0200266 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
Michal Simeke42840b2019-03-27 20:14:19 +0100267 reg = <0x1a>;
268 };
269 reg_mgtyavtt: tps544@1b { /* u114 - FIXME name - don't know what it does */
Michal Simek610accf2024-09-25 09:02:07 +0200270 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
Michal Simeke42840b2019-03-27 20:14:19 +0100271 reg = <0x1b>;
272 };
273 reg_mgtyvccaux: tps544@1c { /* u115 - FIXME name - don't know what it does */
Michal Simek610accf2024-09-25 09:02:07 +0200274 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
Michal Simeke42840b2019-03-27 20:14:19 +0100275 reg = <0x1c>;
276 };
277 reg_util_1v13: tps544@1d { /* u117 - FIXME name - don't know what it does */
Michal Simek610accf2024-09-25 09:02:07 +0200278 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
Michal Simeke42840b2019-03-27 20:14:19 +0100279 reg = <0x1d>;
280 };
281 reg_util_1v8: tps544@1e { /* u118 - FIXME name - don't know what it does */
Michal Simek610accf2024-09-25 09:02:07 +0200282 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
Michal Simeke42840b2019-03-27 20:14:19 +0100283 reg = <0x1e>;
284 };
285 reg_util_2v5: tps544@1f { /* u119 - FIXME name - don't know what it does */
Michal Simek610accf2024-09-25 09:02:07 +0200286 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
Michal Simeke42840b2019-03-27 20:14:19 +0100287 reg = <0x1f>;
288 };
289 };
290 i2c@3 { /* PMBUS2_INA226 */
291 #address-cells = <1>;
292 #size-cells = <0>;
293 reg = <3>;
294 /* FIXME check alerts coming to SC */
295 vccaux: ina226@40 { /* u89 */
296 compatible = "ti,ina226";
297 reg = <0x40>;
298 shunt-resistor = <5000>;
299 };
300 vccaux_fmc: ina226@41 { /* u91 */
301 compatible = "ti,ina226";
302 reg = <0x41>;
303 shunt-resistor = <5000>;
304 };
305 vcco_500: ina226@42 { /* u92 */
306 compatible = "ti,ina226";
307 reg = <0x42>;
308 shunt-resistor = <5000>;
309 };
310 vcco_501: ina226@43 { /* u94 */
311 compatible = "ti,ina226";
312 reg = <0x43>;
313 shunt-resistor = <5000>;
314 };
315 vcco_502: ina226@44 { /* u96 */
316 compatible = "ti,ina226";
317 reg = <0x44>;
318 shunt-resistor = <5000>;
319 };
320 vcco_503: ina226@45 { /* u98 */
321 compatible = "ti,ina226";
322 reg = <0x45>;
323 shunt-resistor = <5000>;
324 };
325 vcc_1v8: ina226@46 { /* u100 */
326 compatible = "ti,ina226";
327 reg = <0x46>;
328 shunt-resistor = <5000>;
329 };
330 vcc_3v3: ina226@47 { /* u103 */
331 compatible = "ti,ina226";
332 reg = <0x47>;
333 shunt-resistor = <5000>;
334 };
335 vcc_1v2_ddr4: ina226@48 { /* u105 */
336 compatible = "ti,ina226";
337 reg = <0x48>;
338 shunt-resistor = <1000>;
339 };
340 vcc1v1_lp4: ina226@49 { /* u107 */
341 compatible = "ti,ina226";
342 reg = <0x49>;
343 shunt-resistor = <5000>;
344 };
345 vadj_fmc: ina226@4a { /* u110 */
346 compatible = "ti,ina226";
347 reg = <0x4a>;
348 shunt-resistor = <5000>;
349 };
350 mgtyavcc: ina226@4b { /* u112 */
351 compatible = "ti,ina226";
352 reg = <0x4b>;
353 shunt-resistor = <1000>;
354 };
355 mgtyavtt: ina226@4c { /* u113 */
356 compatible = "ti,ina226";
357 reg = <0x4c>;
358 shunt-resistor = <1000>;
359 };
360 mgtyvccaux: ina226@4d { /* u116 */
361 compatible = "ti,ina226";
362 reg = <0x4d>;
363 shunt-resistor = <5000>;
364 };
365 vcc_bat: ina226@4e { /* u12 */
366 compatible = "ti,ina226";
367 reg = <0x4e>;
368 shunt-resistor = <10000000>; /* 10 ohm */
369 };
370 };
371 i2c@4 { /* LP_I2C_SM */
372 #address-cells = <1>;
373 #size-cells = <0>;
374 reg = <4>;
375 /* connected to J212G */
376 /* zynqmp sm alert or samtec J212H */
377 };
378 /* 5-7 unused */
379 };
380};
381
382&i2c1 { /* i2c1 MIO 36-37 */
383 status = "okay";
384 clock-frequency = <400000>;
385
386 /* Must be enabled via J242 */
387 eeprom_versal: eeprom@51 { /* x-prc-01-revA u116, x-prc-02-revA u12 */
388 compatible = "atmel,24c02";
389 reg = <0x51>;
390 };
391
392 i2c-mux@74 { /* u35 */
393 compatible = "nxp,pca9548";
394 #address-cells = <1>;
395 #size-cells = <0>;
396 reg = <0x74>;
397 /* reset-gpios = <&gpio SYSCTLR_IIC_MUX1_RESET_B GPIO_ACTIVE_HIGH>; */
398 dc_i2c: i2c@0 { /* DC_I2C */
399 #address-cells = <1>;
400 #size-cells = <0>;
401 reg = <0>;
402 /* Use for storing information about SC board */
403 eeprom: eeprom@54 { /* u34 - m24128 16kB */
404 compatible = "st,24c128", "atmel,24c128";
405 reg = <0x54>;
406 };
407 si570_ref_clk: clock-generator@5d { /* u32 */
408 #clock-cells = <0>;
409 compatible = "silabs,si570";
410 reg = <0x5d>; /* 570JAC000900DG */
411 temperature-stability = <50>;
Michal Simek9579da32019-06-25 08:55:52 +0200412 factory-fout = <33333333>;
Michal Simeke42840b2019-03-27 20:14:19 +0100413 clock-frequency = <33333333>;
Michal Simek9579da32019-06-25 08:55:52 +0200414 clock-output-names = "ref_clk";
Michal Simekf86d2b52021-03-09 12:43:42 +0100415 silabs,skip-recall;
Michal Simeke42840b2019-03-27 20:14:19 +0100416 };
417 /* Connection via Samtec J212D */
418 /* Use for storing information about X-PRC card */
419 x_prc_eeprom: eeprom@52 { /* x-prc-01-revA u120, x-prc-02-revA u16 */
420 compatible = "atmel,24c02";
421 reg = <0x52>;
422 };
423
424 /* Use for setting up certain features on X-PRC card */
425 x_prc_tca9534: gpio@22 { /* x-prc-01-revA u121, x-prc-02-revA u17 */
426 compatible = "nxp,pca9534";
427 reg = <0x22>;
428 gpio-controller; /* IRQ not connected */
429 #gpio-cells = <2>;
430 gpio-line-names = "sw4_1", "sw4_2", "sw4_3", "sw4_4",
431 "", "", "", "";
Michal Simek5368d402024-09-13 11:28:43 +0200432 gtr-sel0-hog {
Michal Simeke42840b2019-03-27 20:14:19 +0100433 gpio-hog;
434 gpios = <0 0>;
435 input; /* FIXME add meaning */
436 line-name = "sw4_1";
437 };
Michal Simek5368d402024-09-13 11:28:43 +0200438 gtr-sel1-hog {
Michal Simeke42840b2019-03-27 20:14:19 +0100439 gpio-hog;
440 gpios = <1 0>;
441 input; /* FIXME add meaning */
442 line-name = "sw4_2";
443 };
Michal Simek5368d402024-09-13 11:28:43 +0200444 gtr-sel2-hog {
Michal Simeke42840b2019-03-27 20:14:19 +0100445 gpio-hog;
446 gpios = <2 0>;
447 input; /* FIXME add meaning */
448 line-name = "sw4_3";
449 };
Michal Simek5368d402024-09-13 11:28:43 +0200450 gtr-sel3-hog {
Michal Simeke42840b2019-03-27 20:14:19 +0100451 gpio-hog;
452 gpios = <3 0>;
453 input; /* FIXME add meaning */
454 line-name = "sw4_4";
455 };
456 };
457 };
458 i2c@1 { /* FMCP1_IIC */
459 #address-cells = <1>;
460 #size-cells = <0>;
461 reg = <1>;
462 /* FIXME connection to Samtec J51C */
463 /* expected eeprom 0x50 SE cards */
464 };
465 i2c@2 { /* FMCP2_IIC */
466 #address-cells = <1>;
467 #size-cells = <0>;
468 reg = <2>;
469 /* FIXME connection to Samtec J53C */
470 /* expected eeprom 0x50 SE cards */
471 };
472 i2c@3 { /* DDR4_DIMM1 */
473 #address-cells = <1>;
474 #size-cells = <0>;
475 reg = <3>;
476 si570_ddr_dimm1: clock-generator@60 { /* u2 */
477 #clock-cells = <0>;
478 compatible = "silabs,si570";
479 reg = <0x60>; /* 570BAB000299DG */
480 temperature-stability = <50>;
Michal Simek9579da32019-06-25 08:55:52 +0200481 factory-fout = <200000000>;
482 clock-frequency = <200000000>;
483 clock-output-names = "si570_ddrdimm1_clk";
Michal Simeke42840b2019-03-27 20:14:19 +0100484 };
485 /* 0x50 SPD? */
486 };
487 i2c@4 { /* DDR4_DIMM2 */
488 #address-cells = <1>;
489 #size-cells = <0>;
490 reg = <4>;
491 si570_ddr_dimm2: clock-generator@60 { /* u3 */
492 #clock-cells = <0>;
493 compatible = "silabs,si570";
494 reg = <0x60>; /* 570BAB000299DG */
495 temperature-stability = <50>;
Michal Simek9579da32019-06-25 08:55:52 +0200496 factory-fout = <200000000>;
497 clock-frequency = <200000000>;
498 clock-output-names = "si570_ddrdimm2_clk";
Michal Simeke42840b2019-03-27 20:14:19 +0100499 };
500 /* 0x50 SPD? */
501 };
502 i2c@5 { /* LPDDR4_SI570_CLK */
503 #address-cells = <1>;
504 #size-cells = <0>;
505 reg = <5>;
506 si570_lpddr4: clock-generator@60 { /* u4 */
507 #clock-cells = <0>;
508 compatible = "silabs,si570";
509 reg = <0x60>; /* 570BAB000299DG */
510 temperature-stability = <50>;
Michal Simek9579da32019-06-25 08:55:52 +0200511 factory-fout = <200000000>;
512 clock-frequency = <200000000>;
513 clock-output-names = "si570_lpddr4_clk";
Michal Simeke42840b2019-03-27 20:14:19 +0100514 };
515 };
516 i2c@6 { /* HSDP_SI570 */
517 #address-cells = <1>;
518 #size-cells = <0>;
519 reg = <6>;
Michal Simek4ac631d2022-03-07 08:53:38 +0100520 si570_hsdp: clock-generator@60 { /* u5 */
Michal Simeke42840b2019-03-27 20:14:19 +0100521 #clock-cells = <0>;
522 compatible = "silabs,si570";
Michal Simek4ac631d2022-03-07 08:53:38 +0100523 reg = <0x60>; /* 570JAC000900DG */
Michal Simeke42840b2019-03-27 20:14:19 +0100524 temperature-stability = <50>;
Michal Simek9579da32019-06-25 08:55:52 +0200525 factory-fout = <156250000>;
526 clock-frequency = <156250000>;
527 clock-output-names = "si570_hsdp_clk";
Michal Simeke42840b2019-03-27 20:14:19 +0100528 };
529 };
530 i2c@7 { /* PCIE_CLK */
531 #address-cells = <1>;
532 #size-cells = <0>;
533 reg = <7>;
534 /* u36 0xd8 or 0xde - pcie clk buf - 9ZML1241EKILF PCIe GEN 4 CLOCK BUFFER FIXME - no driver */
535 /* u37 0xd0 DNP - pcie clocking 1 - 9FGV1006BQ505LTGI - PCIe GEN 4 CLOCK GENERATOR FIXME - no linux driver */
536 /* u38 0xca - pcie clocking 2 - 9ZML1241EKILF PCIe GEN 4 CLOCK BUFFER FIXME - no driver */
Michal Simek11fae8c2023-11-08 08:36:40 +0100537 /* u39 8T49N240 - pcie clocking 3 */
Michal Simeke42840b2019-03-27 20:14:19 +0100538 };
539 };
540};
541
542&usb0 {
543 status = "okay";
Manish Naranif3c63382021-07-14 06:17:19 -0600544 phy-names = "usb3-phy";
545 phys = <&psgtr 1 PHY_TYPE_USB3 0 1>;
Michal Simeke42840b2019-03-27 20:14:19 +0100546};
547
548&dwc3_0 {
549 status = "okay";
550 dr_mode = "peripheral";
551 snps,dis_u2_susphy_quirk;
552 snps,dis_u3_susphy_quirk;
553 maximum-speed = "super-speed";
Michal Simeke42840b2019-03-27 20:14:19 +0100554};
555
556&usb1 {
557 status = "okay";
Michal Simeke42840b2019-03-27 20:14:19 +0100558};
559
560&dwc3_1 {
561 /delete-property/ phy-names ;
562 /delete-property/ phys ;
563 dr_mode = "host";
564 maximum-speed = "high-speed";
565 snps,dis_u2_susphy_quirk ;
566 snps,dis_u3_susphy_quirk ;
567 status = "okay";
568};
569
570&xilinx_ams {
571 status = "okay";
572};
573
574&ams_ps {
575 status = "okay";
576};
577
578&ams_pl {
579 status = "okay";
580};