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Michal Simeke42840b2019-03-27 20:14:19 +01001// SPDX-License-Identifier: GPL-2.0
2/*
3 * dts file for Xilinx Versal a2197 RevA System Controller
4 *
5 * (C) Copyright 2019, Xilinx, Inc.
6 *
7 * Michal Simek <michal.simek@xilinx.com>
8 */
9/dts-v1/;
10
11#include "zynqmp.dtsi"
12#include "zynqmp-clk-ccf.dtsi"
13#include <dt-bindings/gpio/gpio.h>
Michal Simekfe8cb0c2021-05-10 14:55:34 +020014#include <dt-bindings/phy/phy.h>
Michal Simeke42840b2019-03-27 20:14:19 +010015
16/ {
17 model = "Versal System Controller on a2197 Processor Char board RevA"; /* Tenzing */
Michal Simek36aeb172019-06-28 13:16:10 +020018 compatible = "xlnx,zynqmp-p-a2197-00-revA", "xlnx,zynqmp-a2197-revA",
Michal Simeke42840b2019-03-27 20:14:19 +010019 "xlnx,zynqmp-a2197", "xlnx,zynqmp";
20
21 aliases {
22 ethernet0 = &gem0;
Michal Simeke42840b2019-03-27 20:14:19 +010023 i2c0 = &i2c0;
24 i2c1 = &i2c1;
25 mmc0 = &sdhci0;
26 mmc1 = &sdhci1;
Michal Simek53b145d2021-06-03 11:46:50 +020027 nvmem0 = &eeprom;
Michal Simeke42840b2019-03-27 20:14:19 +010028 rtc0 = &rtc;
29 serial0 = &uart0;
30 serial1 = &uart1;
31 serial2 = &dcc;
32 usb0 = &usb0;
33 usb1 = &usb1;
34 };
35
36 chosen {
37 bootargs = "earlycon";
38 stdout-path = "serial0:115200n8";
Michal Simeke42840b2019-03-27 20:14:19 +010039 };
40
41 memory@0 {
42 device_type = "memory";
Michal Simek2ceb5b52019-10-14 10:35:03 +020043 reg = <0x0 0x0 0x0 0x80000000>;
Michal Simeke42840b2019-03-27 20:14:19 +010044 };
Michal Simekfe8cb0c2021-05-10 14:55:34 +020045
46 si5332_1: si5332_1 { /* clk0_sgmii - u142 */
47 compatible = "fixed-clock";
48 #clock-cells = <0>;
49 clock-frequency = <33333333>; /* FIXME */
50 };
51
52 si5332_2: si5332_2 { /* clk1_usb - u142 */
53 compatible = "fixed-clock";
54 #clock-cells = <0>;
55 clock-frequency = <27000000>;
56 };
Michal Simeke42840b2019-03-27 20:14:19 +010057};
58
59&sdhci0 { /* emmc MIO 13-23 - with some settings 16GB */
60 status = "okay";
61 non-removable;
62 disable-wp;
63 bus-width = <8>;
Michal Simek3b662642020-07-22 17:42:43 +020064 xlnx,mio-bank = <0>;
Michal Simeke42840b2019-03-27 20:14:19 +010065};
66
67&uart0 { /* uart0 MIO38-39 */
68 status = "okay";
Michal Simeke42840b2019-03-27 20:14:19 +010069};
70
71&uart1 { /* uart1 MIO40-41 */
72 status = "okay";
Michal Simeke42840b2019-03-27 20:14:19 +010073};
74
75&sdhci1 { /* sd1 MIO45-51 cd in place */
76 status = "okay";
77 no-1-8-v;
78 disable-wp;
Michal Simek3b662642020-07-22 17:42:43 +020079 xlnx,mio-bank = <1>;
Michal Simeke42840b2019-03-27 20:14:19 +010080};
81
Michal Simekfe8cb0c2021-05-10 14:55:34 +020082&psgtr {
83 status = "okay";
84 /* sgmii, usb3 */
85 clocks = <&si5332_1>, <&si5332_2>;
86 clock-names = "ref0", "ref1";
87};
88
Michal Simeke42840b2019-03-27 20:14:19 +010089&gem0 {
90 status = "okay";
91 phy-handle = <&phy0>;
92 phy-mode = "sgmii"; /* DTG generates this properly 1512 */
93 is-internal-pcspma;
94 /* phy-reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>; */
Michal Simek393decf2019-08-08 12:44:22 +020095 phy0: ethernet-phy@0 {
Michal Simeke42840b2019-03-27 20:14:19 +010096 reg = <0>;
97 };
98};
99
100&gpio {
101 status = "okay";
102 gpio-line-names = "", "", "", "", "", /* 0 - 4 */
103 "", "", "DC_SYS_CTRL0", "DC_SYS_CTRL1", "DC_SYS_CTRL2", /* 5 - 9 */
104 "DC_SYS_CTRL3", "DC_SYS_CTRL4", "DC_SYS_CTRL5", "EMMC_DAT0", "EMMC_DAT1", /* 10 - 14 */
105 "EMMC_DAT2", "EMMC_DAT3", "EMMC_DAT4", "EMMC_DAT5", "EMMC_DAT6", /* 15 - 19 */
106 "EMMC_DAT7", "EMMC_CMD", "EMMC_CLK", "EMMC_RST_B", "", /* 20 - 24 */
107 "", "", "", "", "", /* 25 - 29 */
108 "", "", "", "", "LP_I2C0_PMC_SCL", /* 30 - 34 */
109 "LP_I2C0_PMC_SDA", "LP_I2C1_SCL", "LP_I2C1_SDA", "UART0_RXD_IN", "UART0_TXD_OUT", /* 35 - 39 */
110 "UART1_TXD_OUT", "UART1_RXD_IN", "ETH_RESET_B", "", "", /* 40 - 44 */
111 "SD1_CD_B", "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3", /* 45 - 49 */
112 "SD1_CMD", "SD1_CLK", "USB0_CLK", "USB0_DIR", "USB0_DATA2", /* 50 - 54 */
113 "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3", /* 55 - 59 */
114 "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "USB1_CLK", /* 60 - 64 */
115 "USB1_DIR", "USB1_DATA2", "USB1_NXT", "USB1_DATA0", "USB1_DATA1", /* 65 - 69 */
116 "USB1_STP", "USB1_DATA3", "USB1_DATA4", "USB1_DATA5", "USB1_DATA6", /* 70 - 74 */
117 "USB1_DATA7", "ETH_MDC", "ETH_MDIO", /* 75 - 77, MIO end and EMIO start */
118 "SYSCTLR_VERSAL_MODE0", "SYSCTLR_VERSAL_MODE1", /* 78 - 79 */
119 "SYSCTLR_VERSAL_MODE2", "SYSCTLR_VERSAL_MODE3", "SYSCTLR_POR_B_LS", "DC_PRSNT", "SYSCTLR_POWER_EN", /* 80 - 84 */
120 "SYSCTLR_JTAG_S0", "SYSCTLR_JTAG_S1", "SYSCTLR_IIC_MUX0_RESET_B", "SYSCTLR_IIC_MUX1_RESET_B", "SYSCTLR_LP_I2C_SM_ALERT", /* 85 -89 */
121 "SYSCTLR_GPIO0", "SYSCTLR_GPIO1", "SYSCTLR_GPIO2", "SYSCTLR_GPIO3", "SYSCTLR_GPIO4", /* 90 - 94 */
122 "SYSCTLR_GPIO5", "VCCO_500_RBIAS", "VCCO_501_RBIAS", "VCCO_502_RBIAS", "VCCO_500_RBIAS_LED", /* 95 - 99 */
123 "VCCO_501_RBIAS_LED", "VCCO_502_RBIAS_LED", "SYSCTLR_VCCINT_EN", "SYSCTLR_VCC_IO_SOC_EN", "SYSCTLR_VCC_PMC_EN", /* 100 - 104 */
124 "SYSCTLR_VCC_RAM_EN", "SYSCTLR_VCC_PSLP_EN", "SYSCTLR_VCC_PSFP_EN", "SYSCTLR_VCCAUX_EN", "SYSCTLR_VCCAUX_PMC_EN", /* 105 - 109 */
125 "SYSCTLR_VCCO_500_EN", "SYSCTLR_VCCO_501_EN", "SYSCTLR_VCCO_502_EN", "SYSCTLR_VCCO_503_EN", "SYSCTLR_VCC1V8_EN", /* 110 - 114 */
126 "SYSCTLR_VCC3V3_EN", "SYSCTLR_VCC1V2_DDR4_EN", "SYSCTLR_VCC1V1_LP4_EN", "SYSCTLR_VDD1_1V8_LP4_EN", "SYSCTLR_VADJ_FMC_EN", /* 115 - 119 */
127 "SYSCTLR_MGTYAVCC_EN", "SYSCTLR_MGTYAVTT_EN", "SYSCTLR_MGTYVCCAUX_EN", "SYSCTLR_UTIL_1V13_EN", "SYSCTLR_UTIL_1V8_EN", /* 120 - 124 */
128 "SYSCTLR_UTIL_2V5_EN", "FMCP1_FMC_PRSNT_M2C_B", "FMCP2_FMC_PRSNT_M2C_B", "FMCP1_FMCP_PRSNT_M2C_B", "FMCP2_FMCP_PRSNT_M2C_B", /* 125 - 129 */
129 "PMBUS1_INA226_ALERT", "PMBUS2_INA226_ALERT", "SYSCTLR_USBC_SBU1", "SYSCTLR_USBC_SBU2", "TI_CABLE1", /* 130 - 134 */
130 "TI_CABLE2", "SYSCTLR_MIC2005_EN_B", "SYSCTLR_MIC2005_FAULT_B", "SYSCTLR_TUSB320_INT_B", "SYSCTLR_TUSB320_ID", /* 135 - 139 */
131 "PMBUS1_ALERT", "PMBUS2_ALERT", "SYSCTLR_ETH_RESET_B", "SYSCTLR_VCC0V85_TG", "MAX6643_OT_B", /* 140 - 144 */
132 "MAX6643_FANFINAL_B", "MAX6643_FULLSPD", "", "", "", /* 145 - 149 */
133 "", "", "", "", "", /* 150 - 154 */
134 "", "", "", "", "", /* 155 - 159 */
135 "", "", "", "", "", /* 160 - 164 */
136 "", "", "", "", "", /* 165 - 169 */
137 "", "", "", ""; /* 170 - 174 */
138};
139
140&i2c0 { /* MIO 34-35 - can't stay here */
141 status = "okay";
142 clock-frequency = <400000>;
143 i2c-mux@74 { /* u33 */
144 compatible = "nxp,pca9548";
145 #address-cells = <1>;
146 #size-cells = <0>;
147 reg = <0x74>;
148 /* reset-gpios = <&gpio SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */
149 i2c@0 { /* PMBUS1 */
150 #address-cells = <1>;
151 #size-cells = <0>;
152 reg = <0>;
153 /* On connector J98 */
154 reg_vcc_fmc: tps544@7 { /* u80 - FIXME name - don't know what it does */
155 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
156 reg = <0x7>;
157 regulator-name = "reg_vcc_fmc";
158 regulator-min-microvolt = <1800000>;
159 regulator-max-microvolt = <2600000>;
160 /* enable-gpio = <&gpio0 23 0x4>; optional */
161 };
162 reg_vcc_ram: tps544@8 { /* u83 - FIXME name - don't know what it does */
163 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
164 reg = <0x8>;
165 };
166 reg_vcc_pslp: tps544@9 { /* u85 - FIXME name - don't know what it does */
167 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
168 reg = <0x9>;
169 };
170 reg_vcc_psfp: tps544@a { /* u86 - FIXME name - don't know what it does */
171 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
172 reg = <0xa>;
173 };
Nishant Mittal6815dd52019-07-24 14:58:52 +0530174 reg_vccint: tps53681@60 { /* u70 - FIXME name - don't know what it does - also vcc_io_soc */
Nishant Mittalce2c40d2019-07-24 14:58:52 +0530175 compatible = "ti,tps53681", "ti,tps53679";
Nishant Mittal6815dd52019-07-24 14:58:52 +0530176 reg = <0x60>;
Michal Simeke42840b2019-03-27 20:14:19 +0100177 /* vccint, vcc_io_soc */
178 };
179 };
180 i2c@1 { /* PMBUS1_INA226 */
181 #address-cells = <1>;
182 #size-cells = <0>;
183 reg = <1>;
Michal Simek892249d2019-10-14 10:27:42 +0200184 /* FIXME check alerts coming to SC */
Michal Simeke42840b2019-03-27 20:14:19 +0100185 vcc_fmc: ina226@42 { /* u81 */
186 compatible = "ti,ina226";
187 reg = <0x42>;
188 shunt-resistor = <5000>;
189 };
190 vcc_ram: ina226@43 { /* u82 */
191 compatible = "ti,ina226";
192 reg = <0x43>;
193 shunt-resistor = <5000>;
194 };
195 vcc_pslp: ina226@44 { /* u84 */
196 compatible = "ti,ina226";
197 reg = <0x44>;
198 shunt-resistor = <5000>;
199 };
200 vcc_psfp: ina226@45 { /* u87 */
201 compatible = "ti,ina226";
202 reg = <0x45>;
203 shunt-resistor = <5000>;
204 };
205 };
206 i2c@2 { /* PMBUS2 */
207 #address-cells = <1>;
208 #size-cells = <0>;
209 reg = <2>;
210 /* On connector J104 */
211 reg_vccaus: tps544@d { /* u88 - FIXME name - don't know what it does */
212 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
213 reg = <0xd>;
214 };
215 reg_vccaux_fmc: tps544@e { /* u90 - FIXME name - don't know what it does */
216 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
217 reg = <0xe>;
218 };
219 reg_vcco_500: tps544@f { /* u93 - FIXME name - don't know what it does */
220 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
221 reg = <0xf>;
222 };
223 reg_vcco_501: tps544@10 { /* u95 - FIXME name - don't know what it does */
224 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
225 reg = <0x10>;
226 };
227 reg_vcco_502: tps544@11 { /* u97 - FIXME name - don't know what it does */
228 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
229 reg = <0x11>;
230 };
231 reg_vcco_503: tps544@12 { /* u99 - FIXME name - don't know what it does */
232 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
233 reg = <0x12>;
234 };
235 reg_vcc1v8: tps544@13 { /* u101 - FIXME name - don't know what it does */
236 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
237 reg = <0x13>;
238 };
239 reg_vcc3v3: tps544@14 { /* u102 - FIXME name - don't know what it does */
240 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
241 reg = <0x14>;
242 };
243 reg_vcc1v2_ddr4: tps544@15 { /* u104 - FIXME name - don't know what it does */
244 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
245 reg = <0x15>;
246 };
247 reg_vcc1v1_lp4: tps544@16 { /* u106 - FIXME name - don't know what it does */
248 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
249 reg = <0x16>;
250 };
251 reg_vcc1_1V8_lp4: tps544@17 { /* u108 - FIXME name - don't know what it does */
252 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
253 reg = <0x17>;
254 };
255 reg_vadj_fmc: tps544@19 { /* u109 - FIXME name - don't know what it does */
256 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
257 reg = <0x19>;
258 };
259 reg_mgtyavcc: tps544@1a { /* u111 - FIXME name - don't know what it does */
260 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
261 reg = <0x1a>;
262 };
263 reg_mgtyavtt: tps544@1b { /* u114 - FIXME name - don't know what it does */
264 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
265 reg = <0x1b>;
266 };
267 reg_mgtyvccaux: tps544@1c { /* u115 - FIXME name - don't know what it does */
268 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
269 reg = <0x1c>;
270 };
271 reg_util_1v13: tps544@1d { /* u117 - FIXME name - don't know what it does */
272 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
273 reg = <0x1d>;
274 };
275 reg_util_1v8: tps544@1e { /* u118 - FIXME name - don't know what it does */
276 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
277 reg = <0x1e>;
278 };
279 reg_util_2v5: tps544@1f { /* u119 - FIXME name - don't know what it does */
280 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
281 reg = <0x1f>;
282 };
283 };
284 i2c@3 { /* PMBUS2_INA226 */
285 #address-cells = <1>;
286 #size-cells = <0>;
287 reg = <3>;
288 /* FIXME check alerts coming to SC */
289 vccaux: ina226@40 { /* u89 */
290 compatible = "ti,ina226";
291 reg = <0x40>;
292 shunt-resistor = <5000>;
293 };
294 vccaux_fmc: ina226@41 { /* u91 */
295 compatible = "ti,ina226";
296 reg = <0x41>;
297 shunt-resistor = <5000>;
298 };
299 vcco_500: ina226@42 { /* u92 */
300 compatible = "ti,ina226";
301 reg = <0x42>;
302 shunt-resistor = <5000>;
303 };
304 vcco_501: ina226@43 { /* u94 */
305 compatible = "ti,ina226";
306 reg = <0x43>;
307 shunt-resistor = <5000>;
308 };
309 vcco_502: ina226@44 { /* u96 */
310 compatible = "ti,ina226";
311 reg = <0x44>;
312 shunt-resistor = <5000>;
313 };
314 vcco_503: ina226@45 { /* u98 */
315 compatible = "ti,ina226";
316 reg = <0x45>;
317 shunt-resistor = <5000>;
318 };
319 vcc_1v8: ina226@46 { /* u100 */
320 compatible = "ti,ina226";
321 reg = <0x46>;
322 shunt-resistor = <5000>;
323 };
324 vcc_3v3: ina226@47 { /* u103 */
325 compatible = "ti,ina226";
326 reg = <0x47>;
327 shunt-resistor = <5000>;
328 };
329 vcc_1v2_ddr4: ina226@48 { /* u105 */
330 compatible = "ti,ina226";
331 reg = <0x48>;
332 shunt-resistor = <1000>;
333 };
334 vcc1v1_lp4: ina226@49 { /* u107 */
335 compatible = "ti,ina226";
336 reg = <0x49>;
337 shunt-resistor = <5000>;
338 };
339 vadj_fmc: ina226@4a { /* u110 */
340 compatible = "ti,ina226";
341 reg = <0x4a>;
342 shunt-resistor = <5000>;
343 };
344 mgtyavcc: ina226@4b { /* u112 */
345 compatible = "ti,ina226";
346 reg = <0x4b>;
347 shunt-resistor = <1000>;
348 };
349 mgtyavtt: ina226@4c { /* u113 */
350 compatible = "ti,ina226";
351 reg = <0x4c>;
352 shunt-resistor = <1000>;
353 };
354 mgtyvccaux: ina226@4d { /* u116 */
355 compatible = "ti,ina226";
356 reg = <0x4d>;
357 shunt-resistor = <5000>;
358 };
359 vcc_bat: ina226@4e { /* u12 */
360 compatible = "ti,ina226";
361 reg = <0x4e>;
362 shunt-resistor = <10000000>; /* 10 ohm */
363 };
364 };
365 i2c@4 { /* LP_I2C_SM */
366 #address-cells = <1>;
367 #size-cells = <0>;
368 reg = <4>;
369 /* connected to J212G */
370 /* zynqmp sm alert or samtec J212H */
371 };
372 /* 5-7 unused */
373 };
374};
375
376&i2c1 { /* i2c1 MIO 36-37 */
377 status = "okay";
378 clock-frequency = <400000>;
379
380 /* Must be enabled via J242 */
381 eeprom_versal: eeprom@51 { /* x-prc-01-revA u116, x-prc-02-revA u12 */
382 compatible = "atmel,24c02";
383 reg = <0x51>;
384 };
385
386 i2c-mux@74 { /* u35 */
387 compatible = "nxp,pca9548";
388 #address-cells = <1>;
389 #size-cells = <0>;
390 reg = <0x74>;
391 /* reset-gpios = <&gpio SYSCTLR_IIC_MUX1_RESET_B GPIO_ACTIVE_HIGH>; */
392 dc_i2c: i2c@0 { /* DC_I2C */
393 #address-cells = <1>;
394 #size-cells = <0>;
395 reg = <0>;
396 /* Use for storing information about SC board */
397 eeprom: eeprom@54 { /* u34 - m24128 16kB */
398 compatible = "st,24c128", "atmel,24c128";
399 reg = <0x54>;
400 };
401 si570_ref_clk: clock-generator@5d { /* u32 */
402 #clock-cells = <0>;
403 compatible = "silabs,si570";
404 reg = <0x5d>; /* 570JAC000900DG */
405 temperature-stability = <50>;
Michal Simek9579da32019-06-25 08:55:52 +0200406 factory-fout = <33333333>;
Michal Simeke42840b2019-03-27 20:14:19 +0100407 clock-frequency = <33333333>;
Michal Simek9579da32019-06-25 08:55:52 +0200408 clock-output-names = "ref_clk";
Michal Simekf86d2b52021-03-09 12:43:42 +0100409 silabs,skip-recall;
Michal Simeke42840b2019-03-27 20:14:19 +0100410 };
411 /* Connection via Samtec J212D */
412 /* Use for storing information about X-PRC card */
413 x_prc_eeprom: eeprom@52 { /* x-prc-01-revA u120, x-prc-02-revA u16 */
414 compatible = "atmel,24c02";
415 reg = <0x52>;
416 };
417
418 /* Use for setting up certain features on X-PRC card */
419 x_prc_tca9534: gpio@22 { /* x-prc-01-revA u121, x-prc-02-revA u17 */
420 compatible = "nxp,pca9534";
421 reg = <0x22>;
422 gpio-controller; /* IRQ not connected */
423 #gpio-cells = <2>;
424 gpio-line-names = "sw4_1", "sw4_2", "sw4_3", "sw4_4",
425 "", "", "", "";
426 gtr_sel0 {
427 gpio-hog;
428 gpios = <0 0>;
429 input; /* FIXME add meaning */
430 line-name = "sw4_1";
431 };
432 gtr_sel1 {
433 gpio-hog;
434 gpios = <1 0>;
435 input; /* FIXME add meaning */
436 line-name = "sw4_2";
437 };
438 gtr_sel2 {
439 gpio-hog;
440 gpios = <2 0>;
441 input; /* FIXME add meaning */
442 line-name = "sw4_3";
443 };
444 gtr_sel3 {
445 gpio-hog;
446 gpios = <3 0>;
447 input; /* FIXME add meaning */
448 line-name = "sw4_4";
449 };
450 };
451 };
452 i2c@1 { /* FMCP1_IIC */
453 #address-cells = <1>;
454 #size-cells = <0>;
455 reg = <1>;
456 /* FIXME connection to Samtec J51C */
457 /* expected eeprom 0x50 SE cards */
458 };
459 i2c@2 { /* FMCP2_IIC */
460 #address-cells = <1>;
461 #size-cells = <0>;
462 reg = <2>;
463 /* FIXME connection to Samtec J53C */
464 /* expected eeprom 0x50 SE cards */
465 };
466 i2c@3 { /* DDR4_DIMM1 */
467 #address-cells = <1>;
468 #size-cells = <0>;
469 reg = <3>;
470 si570_ddr_dimm1: clock-generator@60 { /* u2 */
471 #clock-cells = <0>;
472 compatible = "silabs,si570";
473 reg = <0x60>; /* 570BAB000299DG */
474 temperature-stability = <50>;
Michal Simek9579da32019-06-25 08:55:52 +0200475 factory-fout = <200000000>;
476 clock-frequency = <200000000>;
477 clock-output-names = "si570_ddrdimm1_clk";
Michal Simeke42840b2019-03-27 20:14:19 +0100478 };
479 /* 0x50 SPD? */
480 };
481 i2c@4 { /* DDR4_DIMM2 */
482 #address-cells = <1>;
483 #size-cells = <0>;
484 reg = <4>;
485 si570_ddr_dimm2: clock-generator@60 { /* u3 */
486 #clock-cells = <0>;
487 compatible = "silabs,si570";
488 reg = <0x60>; /* 570BAB000299DG */
489 temperature-stability = <50>;
Michal Simek9579da32019-06-25 08:55:52 +0200490 factory-fout = <200000000>;
491 clock-frequency = <200000000>;
492 clock-output-names = "si570_ddrdimm2_clk";
Michal Simeke42840b2019-03-27 20:14:19 +0100493 };
494 /* 0x50 SPD? */
495 };
496 i2c@5 { /* LPDDR4_SI570_CLK */
497 #address-cells = <1>;
498 #size-cells = <0>;
499 reg = <5>;
500 si570_lpddr4: clock-generator@60 { /* u4 */
501 #clock-cells = <0>;
502 compatible = "silabs,si570";
503 reg = <0x60>; /* 570BAB000299DG */
504 temperature-stability = <50>;
Michal Simek9579da32019-06-25 08:55:52 +0200505 factory-fout = <200000000>;
506 clock-frequency = <200000000>;
507 clock-output-names = "si570_lpddr4_clk";
Michal Simeke42840b2019-03-27 20:14:19 +0100508 };
509 };
510 i2c@6 { /* HSDP_SI570 */
511 #address-cells = <1>;
512 #size-cells = <0>;
513 reg = <6>;
514 si570_hsdp: clock-generator@5d { /* u5 */
515 #clock-cells = <0>;
516 compatible = "silabs,si570";
517 reg = <0x5d>; /* 570JAC000900DG */
518 temperature-stability = <50>;
Michal Simek9579da32019-06-25 08:55:52 +0200519 factory-fout = <156250000>;
520 clock-frequency = <156250000>;
521 clock-output-names = "si570_hsdp_clk";
Michal Simeke42840b2019-03-27 20:14:19 +0100522 };
523 };
524 i2c@7 { /* PCIE_CLK */
525 #address-cells = <1>;
526 #size-cells = <0>;
527 reg = <7>;
528 /* u36 0xd8 or 0xde - pcie clk buf - 9ZML1241EKILF PCIe GEN 4 CLOCK BUFFER FIXME - no driver */
529 /* u37 0xd0 DNP - pcie clocking 1 - 9FGV1006BQ505LTGI - PCIe GEN 4 CLOCK GENERATOR FIXME - no linux driver */
530 /* u38 0xca - pcie clocking 2 - 9ZML1241EKILF PCIe GEN 4 CLOCK BUFFER FIXME - no driver */
531 clock_8t49n287: clock-generator@d8 { /* u39 8T49N240 - pcie clocking 3 */
532 #clock-cells = <1>; /* author David Cater <david.cater@idt.com>*/
533 compatible = "idt,8t49n240", "idt,8t49n241"; /* FIXME no driver for 240 */
534 reg = <0xd8>;
535 /* Documentation/devicetree/bindings/clock/idt,idt8t49n24x.txt */
536 /* FIXME there input via J241 Samtec CLK1 and CLK0 from U38 - selection PIN */
537
538 };
539
540 };
541 };
542};
543
544&usb0 {
545 status = "okay";
546 xlnx,usb-polarity = <0>;
547 xlnx,usb-reset-mode = <0>;
Manish Naranif3c63382021-07-14 06:17:19 -0600548 phy-names = "usb3-phy";
549 phys = <&psgtr 1 PHY_TYPE_USB3 0 1>;
Michal Simeke42840b2019-03-27 20:14:19 +0100550};
551
552&dwc3_0 {
553 status = "okay";
554 dr_mode = "peripheral";
555 snps,dis_u2_susphy_quirk;
556 snps,dis_u3_susphy_quirk;
557 maximum-speed = "super-speed";
Michal Simeke42840b2019-03-27 20:14:19 +0100558};
559
560&usb1 {
561 status = "okay";
562 xlnx,usb-polarity = <0>;
563 xlnx,usb-reset-mode = <0>;
564};
565
566&dwc3_1 {
567 /delete-property/ phy-names ;
568 /delete-property/ phys ;
569 dr_mode = "host";
570 maximum-speed = "high-speed";
571 snps,dis_u2_susphy_quirk ;
572 snps,dis_u3_susphy_quirk ;
573 status = "okay";
574};
575
576&xilinx_ams {
577 status = "okay";
578};
579
580&ams_ps {
581 status = "okay";
582};
583
584&ams_pl {
585 status = "okay";
586};