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git01.mediatek.com / filogic / uboot / 5e6fe8b51a6519628375f15d9ae42917b1c4fc39 / . / arch / arm / dts / tegra30-htc-endeavoru.dts
blob: db8ac457880e3ce53c2f141f21c386d6058b64b5 [file] [log] [blame]
Svyatoslav Ryhel4c5fe372023-06-30 10:29:06 +0300[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
2/dts-v1/;
3
4/* This dts file describes the HTC One X smartphone */
5/* CPU Speedo ID 4, Soc Speedo ID 1, CPU Process: 1, Core Process: 0 */
6
7#include <dt-bindings/input/input.h>
Svyatoslav Ryhel4c5fe372023-06-30 10:29:06 +0300[diff] [blame]8#include "tegra30.dtsi"
9
10/ {
11 model = "HTC One X";
12 compatible = "htc,endeavoru", "nvidia,tegra30";
13
14 chosen {
15 stdout-path = &uarta;
16 };
17
18 aliases {
19 i2c0 = &pwr_i2c;
20
21 mmc0 = &sdmmc4; /* eMMC */
22
23 rtc0 = &pmic;
24 rtc1 = "/rtc@7000e000";
25
26 usb0 = &micro_usb;
27 };
28
29 memory {
30 device_type = "memory";
31 reg = <0x80000000 0x40000000>;
32 };
33
34 host1x@50000000 {
35 dc@54200000 {
Svyatoslav Ryheled349a02025-03-01 14:48:09 +0200[diff] [blame]36 backlight: backlight {
37 compatible = "nvidia,tegra-pwm-backlight";
Svyatoslav Ryhel4c5fe372023-06-30 10:29:06 +0300[diff] [blame]38
Svyatoslav Ryheled349a02025-03-01 14:48:09 +0200[diff] [blame]39 nvidia,pwm-source = <1>;
40 nvidia,default-brightness = <0x8E>;
Svyatoslav Ryhel4c5fe372023-06-30 10:29:06 +0300[diff] [blame]41 };
42 };
43
44 dsia: dsi@54300000 {
45 status = "okay";
46
47 avdd-dsi-csi-supply = <&avdd_dsi_csi>;
48
Svyatoslav Ryhelb00c3e32024-11-24 14:06:32 +0200[diff] [blame]49 panel@0 {
50 compatible = "htc,edge-panel";
51 reg = <0>;
52
53 reset-gpios = <&gpio TEGRA_GPIO(N, 6) GPIO_ACTIVE_LOW>;
54
55 vdd-supply = <&vdd_3v3_panel>;
56 vddio-supply = <&vdd_1v8_panel>;
57
58 backlight = <&backlight>;
59 };
Svyatoslav Ryhel4c5fe372023-06-30 10:29:06 +0300[diff] [blame]60 };
61 };
62
Svyatoslav Ryhel3135d862023-11-28 13:43:31 +0200[diff] [blame]63 pinmux@70000868 {
64 pinctrl-names = "default";
65 pinctrl-0 = <&state_default>;
66
67 state_default: pinmux {
68 /* PORT A */
69 clk_32k_out {
70 nvidia,pins = "clk_32k_out_pa0";
71 nvidia,function = "blink";
72 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
73 nvidia,tristate = <TEGRA_PIN_DISABLE>;
74 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
75 };
76 bt_uart_cts {
77 nvidia,pins = "uart3_cts_n_pa1";
78 nvidia,function = "uartc";
79 nvidia,pull = <TEGRA_PIN_PULL_UP>;
80 nvidia,tristate = <TEGRA_PIN_DISABLE>;
81 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
82 };
83 aud_aic3008_i2s {
84 nvidia,pins = "dap2_fs_pa2",
85 "dap2_sclk_pa3",
86 "dap2_din_pa4",
87 "dap2_dout_pa5";
88 nvidia,function = "i2s1";
89 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
90 nvidia,tristate = <TEGRA_PIN_DISABLE>;
91 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
92 };
93 wifi_sdio_clock {
94 nvidia,pins = "sdmmc3_clk_pa6";
95 nvidia,function = "sdmmc3";
96 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
97 nvidia,tristate = <TEGRA_PIN_DISABLE>;
98 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
99 };
100 wifi_sdio_command {
101 nvidia,pins = "sdmmc3_cmd_pa7";
102 nvidia,function = "sdmmc3";
103 nvidia,pull = <TEGRA_PIN_PULL_UP>;
104 nvidia,tristate = <TEGRA_PIN_DISABLE>;
105 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
106 };
107
108 /* PORT B */
109 mdm_imc_uart {
110 nvidia,pins = "gmi_a17_pb0",
111 "gmi_a18_pb1";
112 nvidia,function = "uartd";
113 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
114 nvidia,tristate = <TEGRA_PIN_DISABLE>;
115 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
116 };
117 aud_3v3_en {
118 nvidia,pins = "lcd_pwr0_pb2",
119 "lcd_pclk_pb3";
120 nvidia,function = "displaya";
121 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
122 nvidia,tristate = <TEGRA_PIN_DISABLE>;
123 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
124 };
125 wifi_sdio_data {
126 nvidia,pins = "sdmmc3_dat3_pb4",
127 "sdmmc3_dat2_pb5",
128 "sdmmc3_dat1_pb6",
129 "sdmmc3_dat0_pb7";
130 nvidia,function = "sdmmc3";
131 nvidia,pull = <TEGRA_PIN_PULL_UP>;
132 nvidia,tristate = <TEGRA_PIN_DISABLE>;
133 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
134 };
135
136 /* PORT C */
137 bt_uart_rts {
138 nvidia,pins = "uart3_rts_n_pc0";
139 nvidia,function = "uartc";
140 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
141 nvidia,tristate = <TEGRA_PIN_DISABLE>;
142 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
143 };
144 mdm_ap2bb_rst_pwrdwn {
145 nvidia,pins = "lcd_pwr1_pc1";
146 nvidia,function = "rsvd4";
147 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
148 nvidia,tristate = <TEGRA_PIN_DISABLE>;
149 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
150 };
151 cam_spi_clk_do {
152 nvidia,pins = "uart2_txd_pc2",
153 "uart2_rxd_pc3";
154 nvidia,function = "spi4";
155 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
156 nvidia,tristate = <TEGRA_PIN_DISABLE>;
157 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
158 };
159 per_sensor_i2c {
160 nvidia,pins = "gen1_i2c_scl_pc4",
161 "gen1_i2c_sda_pc5";
162 nvidia,function = "i2c1";
163 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
164 nvidia,tristate = <TEGRA_PIN_DISABLE>;
165 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
166 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
167 };
168 mdm_ap2bb_slave_wakeup {
169 nvidia,pins = "lcd_pwr2_pc6";
170 nvidia,function = "displaya";
171 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
172 nvidia,tristate = <TEGRA_PIN_DISABLE>;
173 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
174 };
175 mhl_int {
176 nvidia,pins = "gmi_wp_n_pc7";
177 nvidia,function = "rsvd1";
178 nvidia,pull = <TEGRA_PIN_PULL_UP>;
179 nvidia,tristate = <TEGRA_PIN_DISABLE>;
180 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
181 };
182
183 /* PORT D */
184 sdmmc3_data {
185 nvidia,pins = "sdmmc3_dat5_pd0",
186 "sdmmc3_dat4_pd1";
187 nvidia,function = "sdmmc3";
188 nvidia,pull = <TEGRA_PIN_PULL_UP>;
189 nvidia,tristate = <TEGRA_PIN_DISABLE>;
190 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
191 };
192 aud_1v8_en {
193 nvidia,pins = "lcd_dc1_pd2";
194 nvidia,function = "rsvd4";
195 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
196 nvidia,tristate = <TEGRA_PIN_DISABLE>;
197 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
198 };
199 sdmmc3_dat6_pd3 {
200 nvidia,pins = "sdmmc3_dat6_pd3",
201 "sdmmc3_dat7_pd4";
202 nvidia,function = "rsvd1";
203 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
204 nvidia,tristate = <TEGRA_PIN_DISABLE>;
205 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
206 };
207
208 /* PORT E */
209 mhl_usb_sel {
210 nvidia,pins = "lcd_d0_pe0";
211 nvidia,function = "displaya";
212 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
213 nvidia,tristate = <TEGRA_PIN_DISABLE>;
214 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
215 };
216 lcd_d1_pe1 {
217 nvidia,pins = "lcd_d1_pe1";
218 nvidia,function = "displaya";
219 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
220 nvidia,tristate = <TEGRA_PIN_DISABLE>;
221 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
222 };
223 peh_cap_int {
224 nvidia,pins = "lcd_d2_pe2";
225 nvidia,function = "rsvd3";
226 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
227 nvidia,tristate = <TEGRA_PIN_DISABLE>;
228 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
229 };
230 mhl_1v2_en {
231 nvidia,pins = "lcd_d3_pe3",
232 "lcd_d4_pe4";
233 nvidia,function = "displaya";
234 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
235 nvidia,tristate = <TEGRA_PIN_DISABLE>;
236 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
237 };
238 dsp_lcm_1v8_en {
239 nvidia,pins = "lcd_d5_pe5";
240 nvidia,function = "displaya";
241 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
242 nvidia,tristate = <TEGRA_PIN_DISABLE>;
243 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
244 };
245 mhl_rst {
246 nvidia,pins = "lcd_d6_pe6";
247 nvidia,function = "rsvd3";
248 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
249 nvidia,tristate = <TEGRA_PIN_DISABLE>;
250 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
251 };
252 peh_vibrator_on {
253 nvidia,pins = "lcd_d7_pe7";
254 nvidia,function = "displaya";
255 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
256 nvidia,tristate = <TEGRA_PIN_DISABLE>;
257 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
258 };
259
260 /* PORT F */
261 cam_vcm_2v85_pwr {
262 nvidia,pins = "lcd_d8_pf0";
263 nvidia,function = "rsvd4";
264 nvidia,pull = <TEGRA_PIN_PULL_UP>;
265 nvidia,tristate = <TEGRA_PIN_DISABLE>;
266 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
267 };
268 lcd_d9_d13 {
269 nvidia,pins = "lcd_d9_pf1",
270 "lcd_d10_pf2",
271 "lcd_d11_pf3",
272 "lcd_d12_pf4",
273 "lcd_d13_pf5";
274 nvidia,function = "displaya";
275 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
276 nvidia,tristate = <TEGRA_PIN_DISABLE>;
277 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
278 };
279 cam_cam2_core_1v8_en {
280 nvidia,pins = "lcd_d14_pf6";
281 nvidia,function = "rsvd4";
282 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
283 nvidia,tristate = <TEGRA_PIN_DISABLE>;
284 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
285 };
286 sys_pmu_msecure {
287 nvidia,pins = "lcd_d15_pf7";
288 nvidia,function = "rsvd4";
289 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
290 nvidia,tristate = <TEGRA_PIN_DISABLE>;
291 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
292 };
293
294 /* PORT G */
295 bootstraps {
296 nvidia,pins = "gmi_ad0_pg0",
297 "gmi_ad1_pg1",
298 "gmi_ad2_pg2",
299 "gmi_ad3_pg3",
300 "gmi_ad4_pg4",
301 "gmi_ad5_pg5",
302 "gmi_ad6_pg6",
303 "gmi_ad7_pg7";
304 nvidia,function = "rsvd4";
305 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
306 nvidia,tristate = <TEGRA_PIN_DISABLE>;
307 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
308 };
309
310 /* PORT H */
311 haptic_pwm {
312 nvidia,pins = "gmi_ad8_ph0";
313 nvidia,function = "pwm0";
314 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
315 nvidia,tristate = <TEGRA_PIN_DISABLE>;
316 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
317 };
318 gmi_ad9 {
319 nvidia,pins = "gmi_ad9_ph1";
320 nvidia,function = "rsvd4";
321 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
322 nvidia,tristate = <TEGRA_PIN_DISABLE>;
323 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
324 };
325 gmi_ad10 {
326 nvidia,pins = "gmi_ad10_ph2";
327 nvidia,function = "nand";
328 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
329 nvidia,tristate = <TEGRA_PIN_DISABLE>;
330 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
331 };
332 dsp_tp_rst {
333 nvidia,pins = "gmi_ad11_ph3",
334 "gmi_ad12_ph4",
335 "gmi_ad13_ph5",
336 "gmi_ad14_ph6";
337 nvidia,function = "rsvd4";
338 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
339 nvidia,tristate = <TEGRA_PIN_DISABLE>;
340 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
341 };
342 gmi_ad15 {
343 nvidia,pins = "gmi_ad15_ph7";
344 nvidia,function = "nand";
345 nvidia,pull = <TEGRA_PIN_PULL_UP>;
346 nvidia,tristate = <TEGRA_PIN_ENABLE>;
347 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
348 };
349
350 /* PORT I */
351 gmi_wr_n {
352 nvidia,pins = "gmi_wr_n_pi0",
353 "gmi_oe_n_pi1",
354 "gmi_dqs_pi2",
355 "gmi_cs6_n_pi3";
356 nvidia,function = "rsvd4";
357 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
358 nvidia,tristate = <TEGRA_PIN_DISABLE>;
359 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
360 };
361 gmi_rst_n_pi4 {
362 nvidia,pins = "gmi_rst_n_pi4";
363 nvidia,function = "rsvd4";
364 nvidia,pull = <TEGRA_PIN_PULL_UP>;
365 nvidia,tristate = <TEGRA_PIN_ENABLE>;
366 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
367 };
368 sim_detect {
369 nvidia,pins = "gmi_iordy_pi5";
370 nvidia,function = "rsvd1";
371 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
372 nvidia,tristate = <TEGRA_PIN_ENABLE>;
373 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
374 };
375 peh_gyr_int {
376 nvidia,pins = "gmi_cs7_n_pi6",
377 "gmi_wait_pi7";
378 nvidia,function = "rsvd4";
379 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
380 nvidia,tristate = <TEGRA_PIN_DISABLE>;
381 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
382 };
383
384 /* PORT J */
385 mdm_bb2ap_host_wakeup {
386 nvidia,pins = "gmi_cs0_n_pj0";
387 nvidia,function = "gmi";
388 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
389 nvidia,tristate = <TEGRA_PIN_DISABLE>;
390 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
391 };
392 dsp_lcm_de {
393 nvidia,pins = "lcd_de_pj1";
394 nvidia,function = "displaya";
395 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
396 nvidia,tristate = <TEGRA_PIN_DISABLE>;
397 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
398 };
399 peh_comp_int {
400 nvidia,pins = "gmi_cs1_n_pj2";
401 nvidia,function = "rsvd1";
402 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
403 nvidia,tristate = <TEGRA_PIN_DISABLE>;
404 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
405 };
406 lcd_hsync {
407 nvidia,pins = "lcd_hsync_pj3";
408 nvidia,function = "displaya";
409 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
410 nvidia,tristate = <TEGRA_PIN_DISABLE>;
411 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
412 };
413 mdm_ap_usb_uart_oe {
414 nvidia,pins = "lcd_vsync_pj4";
415 nvidia,function = "displaya";
416 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
417 nvidia,tristate = <TEGRA_PIN_DISABLE>;
418 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
419 };
420 mcam_spi_di_cs0 {
421 nvidia,pins = "uart2_cts_n_pj5",
422 "uart2_rts_n_pj6";
423 nvidia,function = "spi4";
424 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
425 nvidia,tristate = <TEGRA_PIN_DISABLE>;
426 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
427 };
428 mdm_tx {
429 nvidia,pins = "gmi_a16_pj7";
430 nvidia,function = "uartd";
431 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
432 nvidia,tristate = <TEGRA_PIN_DISABLE>;
433 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
434 };
435
436 /* PORT K */
437 gmi_adv_n {
438 nvidia,pins = "gmi_adv_n_pk0",
439 "gmi_clk_pk1",
440 "gmi_cs2_n_pk3";
441 nvidia,function = "rsvd4";
442 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
443 nvidia,tristate = <TEGRA_PIN_DISABLE>;
444 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
445 };
446 gmi_cs4_n {
447 nvidia,pins = "gmi_cs4_n_pk2";
448 nvidia,function = "rsvd4";
449 nvidia,pull = <TEGRA_PIN_PULL_UP>;
450 nvidia,tristate = <TEGRA_PIN_DISABLE>;
451 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
452 };
453 gmi_cs3_n {
454 nvidia,pins = "gmi_cs3_n_pk4";
455 nvidia,function = "rsvd1";
456 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
457 nvidia,tristate = <TEGRA_PIN_DISABLE>;
458 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
459 };
460 spdif_out {
461 nvidia,pins = "spdif_out_pk5";
462 nvidia,function = "spdif";
463 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
464 nvidia,tristate = <TEGRA_PIN_ENABLE>;
465 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
466 };
467 spdif_in {
468 nvidia,pins = "spdif_in_pk6";
469 nvidia,function = "spdif";
470 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
471 nvidia,tristate = <TEGRA_PIN_ENABLE>;
472 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
473 };
474 mdm_rts {
475 nvidia,pins = "gmi_a19_pk7";
476 nvidia,function = "uartd";
477 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
478 nvidia,tristate = <TEGRA_PIN_DISABLE>;
479 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
480 };
481
482 /* PORT L */
483 port_l {
484 nvidia,pins = "vi_d2_pl0",
485 "vi_d3_pl1",
486 "vi_d4_pl2",
487 "vi_d5_pl3",
488 "vi_d6_pl4",
489 "vi_d7_pl5",
490 "vi_d8_pl6",
491 "vi_d9_pl7";
492 nvidia,function = "sdmmc2";
493 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
494 nvidia,tristate = <TEGRA_PIN_DISABLE>;
495 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
496 };
497
498 /* PORT M */
499 dsp_lcd_id {
500 nvidia,pins = "lcd_d16_pm0",
501 "lcd_d17_pm1";
502 nvidia,function = "displaya";
503 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
504 nvidia,tristate = <TEGRA_PIN_DISABLE>;
505 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
506 };
507 front_cam_rst {
508 nvidia,pins = "lcd_d18_pm2";
509 nvidia,function = "rsvd4";
510 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
511 nvidia,tristate = <TEGRA_PIN_DISABLE>;
512 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
513 };
514 mdm_v_dcin_modem_en {
515 nvidia,pins = "lcd_d19_pm3",
516 "lcd_d20_pm4";
517 nvidia,function = "rsvd4";
518 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
519 nvidia,tristate = <TEGRA_PIN_DISABLE>;
520 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
521 };
522 nfc_pins {
523 nvidia,pins = "lcd_d21_pm5",
524 "lcd_d22_pm6";
525 nvidia,function = "rsvd4";
526 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
527 nvidia,tristate = <TEGRA_PIN_DISABLE>;
528 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
529 };
530 cam_vaa_2v85_en {
531 nvidia,pins = "lcd_d23_pm7";
532 nvidia,function = "rsvd4";
533 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
534 nvidia,tristate = <TEGRA_PIN_DISABLE>;
535 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
536 };
537
538 /* PORT N */
539 mdm_ap2bb_rst_host_pwr {
540 nvidia,pins = "dap1_fs_pn0",
541 "dap1_din_pn1",
542 "dap1_sclk_pn3";
543 nvidia,function = "i2s0";
544 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
545 nvidia,tristate = <TEGRA_PIN_ENABLE>;
546 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
547 };
548 mdm_bb_fatal_int {
549 nvidia,pins = "dap1_dout_pn2";
550 nvidia,function = "i2s0";
551 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
552 nvidia,tristate = <TEGRA_PIN_ENABLE>;
553 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
554 };
555 lcd_cs0_n {
556 nvidia,pins = "lcd_cs0_n_pn4";
557 nvidia,function = "rsvd4";
558 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
559 nvidia,tristate = <TEGRA_PIN_DISABLE>;
560 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
561 };
562 lcd_sdout {
563 nvidia,pins = "lcd_sdout_pn5";
564 nvidia,function = "displaya";
565 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
566 nvidia,tristate = <TEGRA_PIN_DISABLE>;
567 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
568 };
569 dsp_lcd_rst {
570 nvidia,pins = "lcd_dc0_pn6";
571 nvidia,function = "displaya";
572 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
573 nvidia,tristate = <TEGRA_PIN_DISABLE>;
574 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
575 };
576 mhl_hpd {
577 nvidia,pins = "hdmi_int_pn7";
578 nvidia,function = "rsvd1";
579 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
580 nvidia,tristate = <TEGRA_PIN_ENABLE>;
581 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
582 };
583
584 /* PORT O */
585 ap_usb_uart_sel {
586 nvidia,pins = "ulpi_data7_po0";
587 nvidia,function = "spi2";
588 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
589 nvidia,tristate = <TEGRA_PIN_DISABLE>;
590 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
591 };
592 bsp_ap_debug_tx {
593 nvidia,pins = "ulpi_data0_po1";
594 nvidia,function = "uarta";
595 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
596 nvidia,tristate = <TEGRA_PIN_DISABLE>;
597 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
598 };
599 bsp_ap_debug_rx {
600 nvidia,pins = "ulpi_data1_po2";
601 nvidia,function = "uarta";
602 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
603 nvidia,tristate = <TEGRA_PIN_DISABLE>;
604 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
605 };
606 ulpi_data2 {
607 nvidia,pins = "ulpi_data2_po3";
608 nvidia,function = "spi3";
609 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
610 nvidia,tristate = <TEGRA_PIN_DISABLE>;
611 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
612 };
613 con_wifi_irq {
614 nvidia,pins = "ulpi_data3_po4";
615 nvidia,function = "hsi";
616 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
617 nvidia,tristate = <TEGRA_PIN_DISABLE>;
618 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
619 };
620 per_gsensor_int {
621 nvidia,pins = "ulpi_data4_po5";
622 nvidia,function = "ulpi";
623 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
624 nvidia,tristate = <TEGRA_PIN_DISABLE>;
625 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
626 };
627 ulpi_data5_data6 {
628 nvidia,pins = "ulpi_data5_po6",
629 "ulpi_data6_po7";
630 nvidia,function = "ulpi";
631 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
632 nvidia,tristate = <TEGRA_PIN_DISABLE>;
633 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
634 };
635
636 /* PORT P */
637 aud_ap_pcm {
638 nvidia,pins = "dap3_fs_pp0",
639 "dap3_din_pp1",
640 "dap3_dout_pp2",
641 "dap3_sclk_pp3";
642 nvidia,function = "i2s2";
643 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
644 nvidia,tristate = <TEGRA_PIN_DISABLE>;
645 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
646 };
647 aud_btpcm {
648 nvidia,pins = "dap4_fs_pp4",
649 "dap4_din_pp5";
650 nvidia,function = "i2s3";
651 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
652 nvidia,tristate = <TEGRA_PIN_DISABLE>;
653 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
654 };
655 aud_ext {
656 nvidia,pins = "dap4_dout_pp6",
657 "dap4_sclk_pp7";
658 nvidia,function = "rsvd4";
659 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
660 nvidia,tristate = <TEGRA_PIN_DISABLE>;
661 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
662 };
663
664 /* PORT Q */
665 port_q {
666 nvidia,pins = "kb_col0_pq0",
667 "kb_col1_pq1",
668 "kb_col2_pq2",
669 "kb_col3_pq3",
670 "kb_col4_pq4",
671 "kb_col5_pq5",
672 "kb_col6_pq6",
673 "kb_col7_pq7";
674 nvidia,function = "kbc";
675 nvidia,pull = <TEGRA_PIN_PULL_UP>;
676 nvidia,tristate = <TEGRA_PIN_DISABLE>;
677 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
678 };
679
680 /* PORT R */
681 raw_intr0 {
682 nvidia,pins = "kb_row0_pr0";
683 nvidia,function = "kbc";
684 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
685 nvidia,tristate = <TEGRA_PIN_ENABLE>;
686 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
687 };
688 per_torch_en {
689 nvidia,pins = "kb_row1_pr1";
690 nvidia,function = "kbc";
691 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
692 nvidia,tristate = <TEGRA_PIN_DISABLE>;
693 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
694 };
695 gyro_pwr {
696 nvidia,pins = "kb_row2_pr2";
697 nvidia,function = "rsvd4";
698 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
699 nvidia,tristate = <TEGRA_PIN_DISABLE>;
700 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
701 };
702 haptic_en {
703 nvidia,pins = "kb_row3_pr3";
704 nvidia,function = "rsvd3";
705 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
706 nvidia,tristate = <TEGRA_PIN_DISABLE>;
707 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
708 };
709 kb_row4_row5 {
710 nvidia,pins = "kb_row4_pr4",
711 "kb_row5_pr5";
712 nvidia,function = "rsvd4";
713 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
714 nvidia,tristate = <TEGRA_PIN_DISABLE>;
715 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
716 };
717 cam_id {
718 nvidia,pins = "kb_row6_pr6",
719 "kb_row7_pr7";
720 nvidia,function = "kbc";
721 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
722 nvidia,tristate = <TEGRA_PIN_ENABLE>;
723 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
724 };
725
726 /* PORT S */
727 dsp_vol_up {
728 nvidia,pins = "kb_row8_ps0";
729 nvidia,function = "kbc";
730 nvidia,pull = <TEGRA_PIN_PULL_UP>;
731 nvidia,tristate = <TEGRA_PIN_DISABLE>;
732 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
733 };
734 con_usb_id_1 {
735 nvidia,pins = "kb_row9_ps1",
736 "kb_row10_ps2";
737 nvidia,function = "kbc";
738 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
739 nvidia,tristate = <TEGRA_PIN_DISABLE>;
740 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
741 };
742 port_s {
743 nvidia,pins = "kb_row11_ps3",
744 "kb_row12_ps4",
745 "kb_row13_ps5",
746 "kb_row14_ps6",
747 "kb_row15_ps7";
748 nvidia,function = "kbc";
749 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
750 nvidia,tristate = <TEGRA_PIN_DISABLE>;
751 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
752 };
753
754 /* PORT T */
755 dsp_tw_i2c {
756 nvidia,pins = "gen2_i2c_scl_pt5",
757 "gen2_i2c_sda_pt6";
758 nvidia,function = "i2c2";
759 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
760 nvidia,tristate = <TEGRA_PIN_DISABLE>;
761 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
762 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
763 };
764 per_emmc_cmd {
765 nvidia,pins = "sdmmc4_cmd_pt7";
766 nvidia,function = "sdmmc4";
767 nvidia,pull = <TEGRA_PIN_PULL_UP>;
768 nvidia,tristate = <TEGRA_PIN_DISABLE>;
769 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
770 };
771
772 /* PORT U */
773 con_bt_en {
774 nvidia,pins = "pu0", "pu1", "pu2",
775 "pu3", "pu4";
776 nvidia,function = "rsvd4";
777 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
778 nvidia,tristate = <TEGRA_PIN_DISABLE>;
779 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
780 };
781 per_capsensor_int_cpu {
782 nvidia,pins = "pu5";
783 nvidia,function = "rsvd4";
784 nvidia,pull = <TEGRA_PIN_PULL_UP>;
785 nvidia,tristate = <TEGRA_PIN_DISABLE>;
786 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
787 };
788 dsp_ap_kpdpwr {
789 nvidia,pins = "pu6";
790 nvidia,function = "pwm3";
791 nvidia,pull = <TEGRA_PIN_PULL_UP>;
792 nvidia,tristate = <TEGRA_PIN_ENABLE>;
793 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
794 };
795 jtag_rtck {
796 nvidia,pins = "jtag_rtck_pu7";
797 nvidia,function = "rtck";
798 nvidia,pull = <TEGRA_PIN_PULL_UP>;
799 nvidia,tristate = <TEGRA_PIN_DISABLE>;
800 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
801 };
802
803 /* PORT V */
804 mdm_bb2ap_suspend_req {
805 nvidia,pins = "pv0";
806 nvidia,function = "rsvd1";
807 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
808 nvidia,tristate = <TEGRA_PIN_DISABLE>;
809 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
810 };
811 dsp_tp_att {
812 nvidia,pins = "pv1";
813 nvidia,function = "rsvd1";
814 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
815 nvidia,tristate = <TEGRA_PIN_DISABLE>;
816 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
817 };
818 con_wifi_en {
819 nvidia,pins = "pv2", "pv3";
820 nvidia,function = "rsvd2";
821 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
822 nvidia,tristate = <TEGRA_PIN_DISABLE>;
823 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
824 };
825 mhl_ddc {
826 nvidia,pins = "ddc_scl_pv4",
827 "ddc_sda_pv5";
828 nvidia,function = "i2c4";
829 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
830 nvidia,tristate = <TEGRA_PIN_DISABLE>;
831 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
832 };
833 crt_hsync {
834 nvidia,pins = "crt_hsync_pv6";
835 nvidia,function = "crt";
836 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
837 nvidia,tristate = <TEGRA_PIN_DISABLE>;
838 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
839 };
840 crt_vsync {
841 nvidia,pins = "crt_vsync_pv7";
842 nvidia,function = "rsvd4";
843 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
844 nvidia,tristate = <TEGRA_PIN_DISABLE>;
845 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
846 };
847
848 /* PORT W */
849 pwr_chg_stat {
850 nvidia,pins = "lcd_cs1_n_pw0";
851 nvidia,function = "rsvd4";
852 nvidia,pull = <TEGRA_PIN_PULL_UP>;
853 nvidia,tristate = <TEGRA_PIN_DISABLE>;
854 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
855 };
856 dsp_bl_pwm_cpu {
857 nvidia,pins = "lcd_m1_pw1";
858 nvidia,function = "displaya";
859 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
860 nvidia,tristate = <TEGRA_PIN_DISABLE>;
861 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
862 };
863 aud_hp_det {
864 nvidia,pins = "spi2_cs1_n_pw2";
865 nvidia,function = "spi2";
866 nvidia,pull = <TEGRA_PIN_PULL_UP>;
867 nvidia,tristate = <TEGRA_PIN_DISABLE>;
868 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
869 };
870 dsp_vol_down {
871 nvidia,pins = "spi2_cs2_n_pw3";
872 nvidia,function = "spi2";
873 nvidia,pull = <TEGRA_PIN_PULL_UP>;
874 nvidia,tristate = <TEGRA_PIN_ENABLE>;
875 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
876 };
877 aud_mclk {
878 nvidia,pins = "clk1_out_pw4";
879 nvidia,function = "rsvd4";
880 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
881 nvidia,tristate = <TEGRA_PIN_DISABLE>;
882 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
883 };
884 aud_aic3008_rst {
885 nvidia,pins = "clk2_out_pw5";
886 nvidia,function = "rsvd4";
887 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
888 nvidia,tristate = <TEGRA_PIN_DISABLE>;
889 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
890 };
891 con_bt_tx {
892 nvidia,pins = "uart3_txd_pw6";
893 nvidia,function = "uartc";
894 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
895 nvidia,tristate = <TEGRA_PIN_DISABLE>;
896 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
897 };
898 con_bt_rx {
899 nvidia,pins = "uart3_rxd_pw7";
900 nvidia,function = "uartc";
901 nvidia,pull = <TEGRA_PIN_PULL_UP>;
902 nvidia,tristate = <TEGRA_PIN_DISABLE>;
903 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
904 };
905
906 /* PORT X */
907 aud_spi_do {
908 nvidia,pins = "spi2_mosi_px0",
909 "spi2_sck_px2",
910 "spi2_cs0_n_px3";
911 nvidia,function = "spi2";
912 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
913 nvidia,tristate = <TEGRA_PIN_DISABLE>;
914 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
915 };
916 aud_spi_di {
917 nvidia,pins = "spi2_miso_px1";
918 nvidia,function = "spi2";
919 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
920 nvidia,tristate = <TEGRA_PIN_DISABLE>;
921 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
922 };
923 spi1_mosi {
924 nvidia,pins = "spi1_mosi_px4";
925 nvidia,function = "spi1";
926 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
927 nvidia,tristate = <TEGRA_PIN_DISABLE>;
928 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
929 };
930 pwr_chg_int {
931 nvidia,pins = "spi1_sck_px5";
932 nvidia,function = "spi2";
933 nvidia,pull = <TEGRA_PIN_PULL_UP>;
934 nvidia,tristate = <TEGRA_PIN_DISABLE>;
935 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
936 };
937 spi1_cs0_n {
938 nvidia,pins = "spi1_cs0_n_px6";
939 nvidia,function = "spi1";
940 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
941 nvidia,tristate = <TEGRA_PIN_DISABLE>;
942 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
943 };
944 audio_mclk_en {
945 nvidia,pins = "spi1_miso_px7";
946 nvidia,function = "rsvd4";
947 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
948 nvidia,tristate = <TEGRA_PIN_DISABLE>;
949 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
950 };
951
952 /* PORT Y */
953 led_drv_en_trig {
954 nvidia,pins = "ulpi_clk_py0",
955 "ulpi_dir_py1";
956 nvidia,function = "rsvd2";
957 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
958 nvidia,tristate = <TEGRA_PIN_DISABLE>;
959 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
960 };
961 mhl_3v3_en {
962 nvidia,pins = "ulpi_nxt_py2";
963 nvidia,function = "ulpi";
964 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
965 nvidia,tristate = <TEGRA_PIN_DISABLE>;
966 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
967 };
968 peh_v_srio_1v8_en {
969 nvidia,pins = "ulpi_stp_py3";
970 nvidia,function = "ulpi";
971 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
972 nvidia,tristate = <TEGRA_PIN_DISABLE>;
973 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
974 };
975 aud_remo_tx {
976 nvidia,pins = "sdmmc1_dat3_py4";
977 nvidia,function = "uarte";
978 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
979 nvidia,tristate = <TEGRA_PIN_DISABLE>;
980 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
981 };
982 aud_remo_rx {
983 nvidia,pins = "sdmmc1_dat2_py5";
984 nvidia,function = "uarte";
985 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
986 nvidia,tristate = <TEGRA_PIN_DISABLE>;
987 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
988 };
989 nfc_irq {
990 nvidia,pins = "sdmmc1_dat1_py6";
991 nvidia,function = "rsvd2";
992 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
993 nvidia,tristate = <TEGRA_PIN_ENABLE>;
994 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
995 };
996 testpoint1 {
997 nvidia,pins = "sdmmc1_dat0_py7";
998 nvidia,function = "sdmmc1";
999 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1000 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1001 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1002 };
1003
1004 /* PORT Z */
1005 aud_remo_oe {
1006 nvidia,pins = "sdmmc1_clk_pz0";
1007 nvidia,function = "sdmmc1";
1008 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1009 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1010 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1011 };
1012 testpoint2 {
1013 nvidia,pins = "sdmmc1_cmd_pz1";
1014 nvidia,function = "sdmmc1";
1015 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1016 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1017 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1018 };
1019 mdm_usb_uart_oe {
1020 nvidia,pins = "lcd_sdin_pz2";
1021 nvidia,function = "displaya";
1022 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1023 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1024 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1025 };
1026 lcd_wr_n {
1027 nvidia,pins = "lcd_wr_n_pz3";
1028 nvidia,function = "displaya";
1029 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1030 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1031 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1032 };
1033 lcd_sck {
1034 nvidia,pins = "lcd_sck_pz4";
1035 nvidia,function = "displaya";
1036 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1037 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1038 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1039 };
1040 sys_clk_req {
1041 nvidia,pins = "sys_clk_req_pz5";
1042 nvidia,function = "sysclk";
1043 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1044 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1045 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1046 };
1047 sys_pwr_i2c {
1048 nvidia,pins = "pwr_i2c_scl_pz6",
1049 "pwr_i2c_sda_pz7";
1050 nvidia,function = "i2cpwr";
1051 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1052 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1053 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1054 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1055 };
1056
1057 /* PORT AA */
1058 bsp_emmc {
1059 nvidia,pins = "sdmmc4_dat0_paa0",
1060 "sdmmc4_dat1_paa1",
1061 "sdmmc4_dat2_paa2",
1062 "sdmmc4_dat3_paa3",
1063 "sdmmc4_dat4_paa4",
1064 "sdmmc4_dat5_paa5",
1065 "sdmmc4_dat6_paa6",
1066 "sdmmc4_dat7_paa7";
1067 nvidia,function = "sdmmc4";
1068 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1069 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1070 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1071 };
1072
1073 /* PORT BB */
1074 cam1_rst {
1075 nvidia,pins = "pbb0";
1076 nvidia,function = "rsvd3";
1077 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1078 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1079 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1080 };
1081 cam_i2c {
1082 nvidia,pins = "cam_i2c_scl_pbb1",
1083 "cam_i2c_sda_pbb2";
1084 nvidia,function = "i2c3";
1085 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1086 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1087 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1088 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1089 };
1090 per_flash_en {
1091 nvidia,pins = "pbb3";
1092 nvidia,function = "vgp3";
1093 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1094 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1095 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1096 };
1097 cam_vddio_1v8_en {
1098 nvidia,pins = "pbb4";
1099 nvidia,function = "vgp4";
1100 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1101 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1102 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1103 };
1104 cam1_vcm_pd {
1105 nvidia,pins = "pbb5";
1106 nvidia,function = "vgp5";
1107 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1108 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1109 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1110 };
1111 aud_remo_pres {
1112 nvidia,pins = "pbb6";
1113 nvidia,function = "vgp6";
1114 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1115 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1116 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1117 };
1118 front_cam_standby {
1119 nvidia,pins = "pbb7";
1120 nvidia,function = "rsvd3";
1121 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1122 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1123 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1124 };
1125
1126 /* PORT CC */
1127 cam_mclk {
1128 nvidia,pins = "cam_mclk_pcc0";
1129 nvidia,function = "vi_alt3";
1130 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1131 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1132 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1133 };
1134 cam_sel {
1135 nvidia,pins = "pcc1";
1136 nvidia,function = "rsvd3";
1137 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1138 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1139 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1140 };
1141 pwr_themp_alert_int {
1142 nvidia,pins = "pcc2";
1143 nvidia,function = "rsvd3";
1144 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1145 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1146 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1147 };
1148 bsp_emmc_resout {
1149 nvidia,pins = "sdmmc4_rst_n_pcc3";
1150 nvidia,function = "rsvd2";
1151 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1152 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1153 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1154 };
1155 bsp_emmc_clk {
1156 nvidia,pins = "sdmmc4_clk_pcc4";
1157 nvidia,function = "sdmmc4";
1158 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1159 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1160 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1161 };
1162 aud_dock_out_en {
1163 nvidia,pins = "clk2_req_pcc5";
1164 nvidia,function = "rsvd4";
1165 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1166 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1167 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1168 };
1169
1170 /* PORT DD */
1171 /* PORT EE */
1172 clk3_out {
1173 nvidia,pins = "clk3_out_pee0";
1174 nvidia,function = "extperiph3";
1175 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1176 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1177 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1178 };
1179 raw_intr1 {
1180 nvidia,pins = "clk3_req_pee1";
1181 nvidia,function = "rsvd4";
1182 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1183 nvidia,tristate = <TEGRA_PIN_ENABLE>;
1184 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1185 };
1186 clk1_req {
1187 nvidia,pins = "clk1_req_pee2";
1188 nvidia,function = "dap";
1189 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1190 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1191 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1192 };
1193 hdmi_cec {
1194 nvidia,pins = "hdmi_cec_pee3";
1195 nvidia,function = "cec";
1196 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1197 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1198 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1199 };
1200 owr {
1201 nvidia,pins = "owr";
1202 nvidia,function = "owr";
1203 nvidia,pull = <TEGRA_PIN_PULL_UP>;
1204 nvidia,tristate = <TEGRA_PIN_DISABLE>;
1205 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1206 };
1207 };
1208 };
1209
Svyatoslav Ryhel4c5fe372023-06-30 10:29:06 +0300[diff] [blame]1210 uarta: serial@70006000 {
1211 status = "okay";
1212 };
1213
1214 pwr_i2c: i2c@7000d000 {
1215 status = "okay";
1216 clock-frequency = <100000>;
1217
1218 /* Texas Instruments TPS80032 PMIC */
1219 pmic: tps80032@48 {
1220 compatible = "ti,tps80032";
1221 reg = <0x48>;
1222
Svyatoslav Ryheld27e0012023-10-03 09:36:39 +0300[diff] [blame]1223 ti,system-power-controller;
1224
Svyatoslav Ryhel4c5fe372023-06-30 10:29:06 +0300[diff] [blame]1225 regulators {
Svyatoslav Ryheld27e0012023-10-03 09:36:39 +0300[diff] [blame]1226 vdd_1v8_vio: smps5 {
1227 regulator-name = "vdd_1v8_gen";
1228 regulator-min-microvolt = <1800000>;
1229 regulator-max-microvolt = <1800000>;
1230 regulator-always-on;
1231 regulator-boot-on;
1232 };
1233
Svyatoslav Ryhel4c5fe372023-06-30 10:29:06 +0300[diff] [blame]1234 /* DSI VDD */
1235 avdd_dsi_csi: ldo1 {
1236 regulator-name = "avdd_dsi_csi";
1237 regulator-min-microvolt = <1200000>;
1238 regulator-max-microvolt = <1200000>;
Svyatoslav Ryhel8c8fb852023-08-26 18:35:35 +0300[diff] [blame]1239 regulator-boot-on;
Svyatoslav Ryhel4c5fe372023-06-30 10:29:06 +0300[diff] [blame]1240 };
1241 };
1242 };
1243 };
1244
1245 sdmmc4: sdhci@78000600 {
1246 status = "okay";
1247 bus-width = <8>;
1248 non-removable;
Svyatoslav Ryheld27e0012023-10-03 09:36:39 +0300[diff] [blame]1249
1250 vmmc-supply = <&vcore_emmc>;
1251 vqmmc-supply = <&vdd_1v8_vio>;
Svyatoslav Ryhel4c5fe372023-06-30 10:29:06 +0300[diff] [blame]1252 };
1253
1254 micro_usb: usb@7d000000 {
1255 status = "okay";
1256 dr_mode = "otg";
1257 };
1258
Svyatoslav Ryhel6c438612023-08-25 20:23:14 +0300[diff] [blame]1259 usb-phy@7d000000 {
1260 status = "okay";
1261 nvidia,hssync-start-delay = <0>;
1262 nvidia,xcvr-lsfslew = <2>;
1263 nvidia,xcvr-lsrslew = <2>;
1264 };
1265
Svyatoslav Ryhel4c5fe372023-06-30 10:29:06 +0300[diff] [blame]1266 /* PMIC has a built-in 32KHz oscillator which is used by PMC */
1267 clk32k_in: clock-32k {
1268 compatible = "fixed-clock";
1269 #clock-cells = <0>;
1270 clock-frequency = <32768>;
1271 clock-output-names = "pmic-oscillator";
1272 };
1273
1274 gpio-keys {
1275 compatible = "gpio-keys";
1276
1277 key-power {
1278 label = "Power";
1279 gpios = <&gpio TEGRA_GPIO(U, 6) GPIO_ACTIVE_LOW>;
1280 linux,code = <KEY_ENTER>;
1281 };
1282
1283 key-volume-up {
1284 label = "Volume Up";
1285 gpios = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_LOW>;
1286 linux,code = <KEY_UP>;
1287 };
1288
1289 key-volume-down {
1290 label = "Volume Down";
1291 gpios = <&gpio TEGRA_GPIO(W, 3) GPIO_ACTIVE_LOW>;
1292 linux,code = <KEY_DOWN>;
1293 };
1294 };
1295
Svyatoslav Ryhel4c5fe372023-06-30 10:29:06 +0300[diff] [blame]1296 vcore_emmc: regulator-emmc {
1297 compatible = "regulator-fixed";
1298 regulator-name = "vdd_2v85_sdmmc";
1299 regulator-min-microvolt = <2850000>;
1300 regulator-max-microvolt = <2850000>;
1301 gpio = <&gpio TEGRA_GPIO(M, 3) GPIO_ACTIVE_HIGH>;
1302 enable-active-high;
1303 };
1304
1305 vdd_3v3_panel: regulator-lcm {
1306 compatible = "regulator-fixed";
1307 regulator-name = "v_lcm_3v3";
1308 regulator-min-microvolt = <3300000>;
1309 regulator-max-microvolt = <3300000>;
1310 gpio = <&gpio TEGRA_GPIO(E, 2) GPIO_ACTIVE_HIGH>;
1311 enable-active-high;
1312 };
1313
1314 vdd_1v8_panel: regulator-lcmio {
1315 compatible = "regulator-fixed";
1316 regulator-name = "v_lcmio_1v8";
1317 regulator-min-microvolt = <1800000>;
1318 regulator-max-microvolt = <1800000>;
1319 gpio = <&gpio TEGRA_GPIO(E, 5) GPIO_ACTIVE_HIGH>;
1320 enable-active-high;
1321 };
1322};